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7470612 |
Method of forming metal wiring layer of semiconductor device
A method of forming a metal wiring layer of a semiconductor device produces metal wiring that is free of defects. The method includes forming an insulating layer pattern defining a recess on a...
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7468318 |
Method for manufacturing mold type semiconductor device
A method for manufacturing a mold type semiconductor device is provided. The device includes a semiconductor chip having a semiconductor part and a metallic member connecting to the chip via a...
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7465659 |
Low dielectric (low k) barrier films with oxygen doping by plasma-enhanced chemical vapor deposition (PECVD)
Methods are provided for depositing a silicon carbide layer having significantly reduced current leakage. The silicon carbide layer may be a barrier layer or part of a barrier bilayer that also...
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7459387 |
Semiconductor electronic device and method of manufacturing thereof
A semiconductor electronic device includes a die of semiconductor material and a support. The die of semiconductor material includes an integrated electronic circuit and a plurality of contact pads...
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7452804 |
Single damascene with disposable stencil and method therefore
In a method of fabricating a semiconductor device, a liner is deposited over a conductive region of a wafer and a stencil layer is deposited over the liner. The stencil layer and the liner are...
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7453149 |
Composite barrier layer
A composite barrier layer provides superior barrier qualities and superior adhesion properties to both dielectric materials and conductive materials as the composite barrier layer extends...
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7452811 |
Method for forming a wiring of a semiconductor device, method for forming a metal layer of a semiconductor device and apparatus for performing the same
In a method for forming a wiring of a semiconductor device using an atomic layer deposition, an insulating interlayer is formed on a substrate. Tantalum amine derivatives represented by a chemical...
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7449409 |
Barrier layer for conductive features
Barrier layers for conductive features and methods of formation thereof are disclosed. A first barrier material is deposited on top surfaces of an insulating material, and a second barrier material...
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7446033 |
Method of forming a metal interconnection of a semiconductor device, and metal interconnection formed by such method
A metal interconnection of a semiconductor device, formed using a damascene process, has large grains and yet a smooth surface. First, a barrier layer and a metal layer are sequentially formed in...
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7446034 |
Process for making a metal seed layer
An exemplary method includes: providing a substrate with an exposed metal surface, performing a reducing process on the metal surface, and transferring the substrate in an inert or reducing ambient...
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7446050 |
Etching and plasma treatment process to improve a gate profile
A method for improving a polysilicon gate electrode profile to avoid preferential RIE etching in a polysilicon gate electrode etching process including carrying out a multi-step etching process...
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7439175 |
Method for fabricating a thin film and metal line of semiconductor device
A method for forming a thin film of a semiconductor device is provided. The method includes forming a TaN film on a semiconductor substrate, and converting a portion of the TaN film into a Ta film...
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7435670 |
Bit line barrier metal layer for semiconductor device and process for preparing the same
The present invention relates to a bit line barrier metal layer for a semiconductor device and a process for preparing the same, the process comprising: forming bit line contact on an insulation...
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7435679 |
Alloyed underlayer for microelectronic interconnects
Apparatus and methods of fabricating a microelectronic interconnect having an underlayer which acts as both a barrier layer and a seed layer. The underlayer is formed by co-depositing a noble metal...
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7432192 |
Post ECP multi-step anneal/H2 treatment to reduce film impurity
A method of forming a copper interconnect in a dual damascene scheme is described. After a diffusion barrier layer and seed layer are sequentially formed on the sidewalls and bottoms of a trench...
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7422942 |
Method for fabricating a semiconductor device having an insulation film with reduced water content
A semiconductor device having a self-aligned contact hole is formed by providing a side wall oxide film on a gate electrode, covering the gate electrode and the side wall oxide film by an oxide...
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7420275 |
Boron-doped SIC copper diffusion barrier films
Copper diffusion barrier films having a boron-doped silicon carbide layer with at least 25% boron by atomic weight of the layer composition have advantages for semiconductor device integration...
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7419903 |
Thin films
Thin films are formed by formed by atomic layer deposition, whereby the composition of the film can be varied from monolayer to monolayer during cycles including alternating pulses of self-limiting...
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7419902 |
Method of manufacture of semiconductor integrated circuit
In a process for the manufacture of a semiconductor integrated circuit device having an inlaid interconnect structure by embedding a conductor film in a recess, such as a trench or hole, formed in...
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7419904 |
Method for forming barrier film and method for forming electrode film
In the present invention, a barrier film 20 is formed by forming a tungsten nitride film 21 and subsequently by forming a tungsten silicide film 22 . The tungsten silicide film 22 is exposed...
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7416973 |
Method of increasing the etch selectivity in a contact structure of semiconductor devices
By providing an additional silicon dioxide based etch stop layer, a corresponding etch process for forming contact openings for directly connecting polysilicon lines and active areas may be...
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7414313 |
Polymeric conductor donor and transfer method
The present invention relates to a donor laminate for transfer of a conductive layer comprising at least one electronically conductive polymer on to a receiver, wherein the receiver is a component...
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7405154 |
Structure and method of forming electrodeposited contacts
A contact metallurgy structure comprising a patterned dielectric layer having cavities on a substrate; a silicide or germanide layer such as of cobalt and/or nickel located at the bottom of...
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7399699 |
On-die reflectance arrangements
Improved semiconductor reflectance arrangements (e.g., semiconductor devices, systems including semiconductor devices, methods, etc.).
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7396739 |
Method for integrating an electronic component or similar into a substrate
A method for integrating an electronic component or the like into a substrate includes following process steps: formation of a dielectric insulating layer on the front side of a substrate; complete...
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7396759 |
Protection of Cu damascene interconnects by formation of a self-aligned buffer layer
Methods of protecting exposed metal damascene interconnect surfaces in a process for making electronic components and the electronic components made according to such methods. An integrated circuit...
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7393780 |
Dual layer barrier film techniques to prevent resist poisoning
Provided is a process for forming a barrier film to prevent resist poisoning in a semiconductor device by depositing a second nitrogen-free barrier layer on top of a first barrier layer containing...
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7390744 |
Method and composition for polishing a substrate
Polishing compositions and methods for removing conductive materials and barrier materials from a substrate surface are provided. Polishing compositions are provided for removing at least a barrier...
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7388290 |
Spacer patterned, high dielectric constant capacitor and methods for fabricating the same
A high dielectric constant memory cell capacitor and method for producing the same, wherein the memory cell capacitor utilizes relatively large surface area conductive structures of thin spacer...
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7384866 |
Methods of forming metal interconnections of semiconductor devices by treating a barrier metal layer
A metal interconnection of a semiconductor device is fabricated by forming a dielectric pattern including a hole therein on a substrate, and forming a barrier metal layer in the hole and on the...
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7381638 |
Fabrication technique using sputter etch and vacuum transfer
First material ( 106 ) is situated on the surface of a substructure ( 100 and 102 ) and in an opening ( 104 ), such as a Wench, that extends partway through the substructure. Second material (...
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7375024 |
Method for fabricating metal interconnection line with use of barrier metal layer formed in low temperature
The present invention relates to a method for fabricating a metal interconnection line with use of a barrier metal layer formed in a low temperature. The method includes the steps of: forming an...
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7354853 |
Selective dry etching of tantalum and tantalum nitride
The invention describes a method for the selective dry etching of tantalum and tantalum nitride films. Tantalum nitride layers ( 30 ) are often used in semiconductor manufacturing. The...
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7351635 |
Method of fabricating microelectronic device using super critical fluid
Methods of fabricating a microelectronic device having improved performance characteristics are disclosed which are characterized by using super critical fluid to perform a material removal step....
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7341947 |
Methods of forming metal-containing films over surfaces of semiconductor substrates
The invention includes a method of forming a metal-containing film over a surface of a semiconductor substrate. The surface is exposed to a supercritical fluid. The supercritical fluid has H 2 , at...
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7338893 |
Integration of pore sealing liner into dual-damascene methods and devices
A device employs damascene layers with a pore sealing liner and includes a semiconductor body. A metal interconnect layer comprising a metal interconnect is formed over the semiconductor body. A...
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7335991 |
Pattern forming structure, pattern forming method, device, electro-optical device, and electronic apparatus
There is provided a barrier structure provided with a concave portion corresponding to a pattern formed out of a functional liquid, the barrier structure comprising: a first concave portion...
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7335611 |
Copper conductor annealing process employing high speed optical annealing with a low temperature-deposited optical absorber layer
A method of forming a conductor in a thin film structure on a semiconductor substrate includes forming high aspect ratio openings in a base layer having vertical side walls, depositing a dielectric...
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7332427 |
Method of forming an interconnection line in a semiconductor device
A method of forming an interconnection line in a semiconductor device includes forming an interlayer insulating layer on an underlying layer having a lower conductive layer, patterning the...
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7329599 |
Method for fabricating a semiconductor device
Methods are provided for semiconductor devices having low contact resistance. The method in accordance with one embodiment of the invention comprises forming an insulating layer overlying a...
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7323409 |
Method for forming a void free via
A multilevel metal and via structure is described. The metal conductors include a base or seed layer, a bulk conductor layer, a capping layer, and a barrier layer, and the via structure include a...
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7323419 |
Method of fabricating semiconductor device
A method of fabricating a semiconductor device including a high-k dielectric for as a gate insulating layer is provided. The method includes forming a high-k dielectric layer and a conductive layer...
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7323408 |
Metal barrier cap fabrication by polymer lift-off
A new method is provided for the creation of copper interconnects. A pattern of copper interconnects is created, a protective layer of semiconductor material is deposited over the surface of the...
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7303996 |
High-K gate dielectric stack plasma treatment to adjust threshold voltage characteristics
A method for treating a gate structure comprising a high-K gate dielectric stack to improve electric performance characteristics including providing a gate dielectric layer stack including a binary...
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7300869 |
Integrated barrier and seed layer for copper interconnect technology
An integrated barrier and seed layer that is useful for creating conductive pathways in semiconductor devices. The barrier portion of the integrated layer prevents diffusion of the conductive...
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7288473 |
Metal layer in semiconductor device and method of forming the same
Canting or falling of an upper metal line may be prevented by improving adhesion between an insulation layer and a metal layer. A method for forming a semiconductor which improves adhesion between...
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7282438 |
Low-k SiC copper diffusion barrier films
Copper diffusion barrier films having low dielectric constants are suitable for a variety of copper/inter-metal dielectric integration schemes. Copper diffusion barrier films in accordance with the...
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7279411 |
Process for forming a redundant structure
Device and method of fabricating device. The device includes a dual damascene line having a metal line and a via, and a redundant liner arranged to divide the metal line. The method includes...
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7279423 |
Forming a copper diffusion barrier
Noble metal may be used as a non-oxidizing diffusion barrier to prevent diffusion from copper lines. A diffusion barrier may be formed of a noble metal formed over an adhesion promoting layer or by...
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7273804 |
Internally reinforced bond pads
Disclosed is a reinforced bond pad structure having nonplanar dielectric structures and a metallic bond layer conformally formed over the nonplanar dielectric structures. The nonplanar dielectric...
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