Matches 1 - 50 out of 520 1 2 3 4 5 6 7 8 9 10 11 >
Match Document Document Title
7601641 Two step optical planarizing layer etch  
Methods are provided for etching during fabrication of a semiconductor device. The method includes initially etching to partially remove a portion of one or more lithographic-aiding layers...
7585770 Method of growing carbon nanotubes and method of manufacturing field emission device having the same  
In a method of forming carbon nanotubes (CNTs) and a method of manufacturing a field emission display (FED) device using the CNTs, the method includes preparing a substrate on which a silicon layer...
7585761 Manufacturing method of semiconductor device  
It is an object of the present invention to suppress an influence of voltage drop due to wiring resistance to make an image quality of a display device uniform. In addition, it is also an object of...
7585760 Method for forming planarizing copper in a low-k dielectric  
Methods of fabricating an interconnect, which fundamentally comprises forming a second conductive film (e.g., aluminum) over first conductive film (e.g., copper) deposited in an opening formed in a...
7582556 Circuitry component and method for forming the same  
A circuit structure includes a semiconductor substrate, first and second metallic posts over the semiconductor substrate, an insulating layer over the semiconductor substrate and covering the first...
7579270 Method for manufacturing a semiconductor device  
It is an object of the present invention to provide a method for manufacturing a highly reliable semiconductor device with preferable yield. In the invention, two-step etching is performed when...
7572710 Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects  
The invention comprises methods of forming a conductive contact to a source/drain region of a field effect transistor, and methods of forming local interconnects. In one implementation, a method of...
7566971 Semiconductor device and manufacturing method thereof  
The invention provides a technology for manufacturing a higher performance and higher reliability semiconductor device at low cost and with high yield. The semiconductor device of the invention has...
7566652 Electrically inactive via for electromigration reliability improvement  
A semiconductor device 300 includes a metal line 304 formed in a first dielectric layer 302 . A capping layer 306 is formed the metal line 304 . A second dielectric layer 308 is formed...
7560378 Method for manufacturing semiconductor device  
A diffusion barrier film, a second insulating film, and a cap film are sequentially laminated on a first insulating film over a substrate. A wiring trench portion is formed extending therethrough...
7557031 Etch back with aluminum CMP for LCOS devices  
A method for manufacturing an LCOS device includes forming an interlayer dielectric layer overlying a surface region of a substrate. The interlayer dielectric layer is patterned to form a plurality...
7557030 Method for fabricating a recess gate in a semiconductor device  
A method for fabricating a recess gate in a semiconductor device is provided. The method includes selectively etching an active region of a substrate to form a recess pattern, performing a post...
7554199 Substrate for evaluation  
The CMP technology is provided for a damascene wiring structure having a plural-layer wiring that is excellent in flatness and resolvability of Cu residue. An evaluation substrate is provided for...
7531448 Manufacturing method of dual damascene structure  
A manufacturing method of a dual damascene structure is provided. First, a barrier layer, a first dielectric layer, a second dielectric layer, a cap layer, a metal-containing hard mask layer, a...
7528064 Interconnect structures with bond-pads and methods of forming bump sites on bond-pads  
Microelectronic workpieces that have bump sites over bond-pads and methods of fabricating such bump sites. One embodiment of such a workpiece, for example, includes a substrate having a plurality...
7527188 Self-encapsulated silver alloys for interconnects  
Alloys of silver and an alloying element that diffuses to the surface of the high conductivity metal and is oxidizable to form an alloying element oxide such as beryllium are provided along with...
7514779 Multilayer build-up wiring board  
Mesh holes 35 a and 59 a of upper solid layers 35 and upper solid layers 59 are formed to overlie on one another, so that the insulating properties of interlayer resin insulating layers 50...
7510972 Method of processing substrate, post-chemical mechanical polishing cleaning method, and method of and program for manufacturing electronic device  
A method of processing a substrate which enables a surface damaged layer and polishing remnants on the surface of an insulating film to be removed, and enable the amount removed of the surface...
7504699 Fabrication of a semiconductor device with air gaps for ultra-low capacitance interconnections  
A method of forming an air gap or gaps within solid structures and specifically semiconductor structures to reduce capacitive coupling between electrical elements such as metal lines, wherein a...
7498252 Dual layer dielectric stack for microelectronics having thick metal lines  
Embodiments of the invention include apparatuses and methods relating to dual layer dielectric stacks for thick metal lines of microelectronic devices. In one embodiment, the dual layer dielectric...
7485962 Semiconductor device, wiring substrate forming method, and substrate processing apparatus  
A substrate support ( 201 ) having a flat supporting surface ( 201 a ) is prepared, and a semiconductor substrate ( 1 ) is fixed to the substrate supporting surface ( 201 ) by attaching a wiring...
7485571 Method of making an integrated circuit  
General purpose methods for the fabrication of integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and...
7485566 Method of manufacturing semiconductor device  
A method of manufacturing a semiconductor device is provided. The method includes: (A) forming an insulating film with a porous structure on a substrate; (B) forming a trench in the insulating...
7479433 Method for manufacturing semiconductor device  
A method of manufacturing a semiconductor device includes depositing a mask material to be patterned into a desired target pattern on an underlying material; patterning the mask material into a...
7476605 Method of manufacturing semiconductor device  
A method for manufacturing a semiconductor device is provided, which comprises forming a first metal wiring layer above a semiconductor substrate, forming an inorganic insulating film above the...
7475368 Deflection analysis system and method for circuit design  
A system, a method and a computer program product for analyzing a circuit design provide for discretizing the circuit design into a series of pixels. A fraction of at least one constituent material...
7473636 Method to improve time dependent dielectric breakdown  
In the back end of an integrated circuit employing dual-damascene interconnects, the interconnect members have a first non-conformal liner that has a thicker portion at the top of the trench level...
7468320 Reduced electromigration and stressed induced migration of copper wires by surface coating  
The idea of the invention is to coat the free surface of patterned Cu conducting lines in on-chip interconnections (BEOL) wiring by a 1-20 nm thick metal layer prior to deposition of the interlevel...
7468317 Method of forming metal line of semiconductor device  
A method of forming a metal line, in which a nitride layer is used instead of a metal barrier layer, enabling a metal line structure with a relatively low resistance and therefore realizing a high...
7465977 Method for producing a packaged integrated circuit  
There is described a method for producing a packaged integrated circuit. The method comprises a first step of building an integrated circuit having a micro-structure suspended above a micro-cavity,...
7452802 Method of forming metal wiring for high voltage element  
Disclosed herein is a method of forming metal wirings for high voltage elements. According to the present invention, after a copper film is formed, a wet etch process using an interlayer insulating...
7446033 Method of forming a metal interconnection of a semiconductor device, and metal interconnection formed by such method  
A metal interconnection of a semiconductor device, formed using a damascene process, has large grains and yet a smooth surface. First, a barrier layer and a metal layer are sequentially formed in...
7439179 Healing detrimental bonds in deposited materials  
A method for healing detrimental bonds in deposited materials, for example porous, low-k dielectric materials, including oxydatively processing a deposited material, processing the deposited...
7416985 Semiconductor device having a multilayer interconnection structure and fabrication method thereof  
A multilayer interconnection structure includes a first interlayer insulation film, a second interlayer insulation film formed over the first interlayer insulation film, an interconnection trench...
7407879 Chemical planarization performance for copper/low-k interconnect structures  
An electrical interconnect structure on a substrate, which includes: a first low-k dielectric layer; a spin-on low k CMP protective layer that is covalently bonded to the first low-k dielectric...
7405154 Structure and method of forming electrodeposited contacts  
A contact metallurgy structure comprising a patterned dielectric layer having cavities on a substrate; a silicide or germanide layer such as of cobalt and/or nickel located at the bottom of...
7405152 Reducing wire erosion during damascene processing  
A damascene process incorporating a GCIB step is provided. The GCIB step can replace one or more CMP steps in the traditional damascene process. The GCIB step allows for selectable removal of...
7399699 On-die reflectance arrangements  
Improved semiconductor reflectance arrangements (e.g., semiconductor devices, systems including semiconductor devices, methods, etc.).
7399649 Semiconductor light-emitting device and fabrication method thereof  
An underlying layer ALY of GaN is formed on a sapphire substrate SSB; a transfer layer TLY of GaN with a bump and dip shaped surface is formed on the underlying layer ALY; a light absorption layer...
7397122 Metal wiring for semiconductor device and method for forming the same  
A metal wiring for a semiconductor device and a method for forming the same are provided. The metal wiring includes a first insulating layer and a second insulating layer; an interlayer insulating...
7396768 Copper damascene chemical mechanical polishing (CMP) for thin film head writer fabrication  
In one method and embodiment of the present invention, at least one coil layer is formed in a write head, using a two-slurry step of copper damascene chemical mechanical polishing method with a...
7396760 Method and system for reducing inter-layer capacitance in integrated circuits  
The present invention is directed to a method and system of intelligent dummy filling placement to reduce inter-layer capacitance caused by overlaps of dummy filling area on successive layers. The...
7387963 Semiconductor wafer and process for producing a semiconductor wafer  
A semiconductor wafer has an edge region with no defects larger than or equal to 0.3 μm. The wafers are produced by a process, comprising (a) providing a semiconductor wafer having a rounded and...
7384865 Semiconductor device with a metal line and method of forming the same  
A method of forming a metal line in a semiconductor device includes: forming a lower insulation layer for insulation from the lower substrate; forming a first metal line at a certain region on the...
7381638 Fabrication technique using sputter etch and vacuum transfer  
First material ( 106 ) is situated on the surface of a substructure ( 100 and 102 ) and in an opening ( 104 ), such as a Wench, that extends partway through the substructure. Second material (...
7378348 Polishing compound for insulating film for semiconductor integrated circuit and method for producing semiconductor integrated circuit  
An insulating film comprising an organic silicon material having a C—Si bond and a Si—O bond is used for a semiconductor integrated circuit, and for polishing of its surface, a polishing...
7375023 Method and apparatus for chemical mechanical polishing of semiconductor substrates  
Methods and apparatus for processing substrates to improve polishing uniformity, improve planarization, remove residual material and minimize defect formation are provided. In one aspect, a method...
7354853 Selective dry etching of tantalum and tantalum nitride  
The invention describes a method for the selective dry etching of tantalum and tantalum nitride films. Tantalum nitride layers ( 30 ) are often used in semiconductor manufacturing. The...
7354527 Chemical mechanical polishing pad and chemical mechanical polishing process  
A chemical mechanical polishing pad which has a storage elastic modulus E′(30° C.) at 30° C. of 120 MPa or less and an (E′(30° C.)/E′(60° C.)) ratio of the storage elastic modulus...
7351635 Method of fabricating microelectronic device using super critical fluid  
Methods of fabricating a microelectronic device having improved performance characteristics are disclosed which are characterized by using super critical fluid to perform a material removal step....
Matches 1 - 50 out of 520 1 2 3 4 5 6 7 8 9 10 11 >