Patents in Class 438/624

Matches 1 - 50 out of 1153

Match	Document	Document Title
1	7615484	Integrated circuit manufacturing method using hard mask An integrated circuit hard mask processing system is provided including providing a substrate having an integrated circuit; forming an interconnect layer over the integrated circuit; applying a...
2	RE40965	Method of forming low-resistance contact electrodes in semiconductor devices There is formed on a semiconductor substrate a lamination of a first insulating film of nondoped silicon glass or the like and, on this first insulating film, a second insulating film of boron...
3	7611983	Semiconductor device and a manufacturing method of the same A first BPSG film covering a transistor is formed. Next, a second BPSG film is formed on the first BPSG film. The B concentration in the first BPSG film is about five times higher than the B...
4	7592660	Semiconductor device and method for manufacturing the same There is provided a semiconductor device which includes a base insulating film formed on a semiconductor substrate, a capacitor formed on the base insulating film, an interlayer insulating film...
5	7592250	Multilayer wiring board, manufacturing method thereof, semiconductor device, and wireless electronic device A multilayer wiring board exhibiting excellent moldability and having a capacitor where variation of capacitance is suppressed, its producing method, a semiconductor device mounting a semiconductor...
6	7589014	Semiconductor device having multiple wiring layers and method of producing the same A method of producing a semiconductor device having a plurality of wiring layers forms a first interlayer-insulating film, forms a plurality of grooves for wiring in the first interlayer-insulating...
7	7580088	Contact for semiconductor and display devices A device and corresponding method of fabrication thereof are disclosed, where the device provides a contact for semiconductor and display devices, the device including a substrate, a first wiring...
8	7579590	Method of measuring thin layers using SIMS A method for measuring the thickness of a layer is provided, comprising (a) providing a structure ( 101 ) comprising a first layer disposed on a second layer; (b) impinging ( 103 ) the structure...
9	7579270	Method for manufacturing a semiconductor device It is an object of the present invention to provide a method for manufacturing a highly reliable semiconductor device with preferable yield. In the invention, two-step etching is performed when...
10	7579258	Semiconductor interconnect having adjacent reservoir for bonding and method for formation A semiconductor device and method has interconnects with adjoining reservoir openings. A dielectric layer is formed as part of an uppermost of the one or more interconnect layers. Openings formed...
11	7576006	Protective self-aligned buffer layers for damascene interconnects Capping protective self aligned buffer (PSAB) layers are layers of material that are selectively formed at the surface of metal layers in a partially fabricated semiconductor device. Encapsulating...
12	7572728	Semiconductor device and method for manufacturing the same A semiconductor device and method with a dual damascene pattern uses buffer layers to prevent photoresist layer poisoning due to a reaction between an interlayer dielectric and a photoresist layer....
13	7572727	Semiconductor formation method that utilizes multiple etch stop layers The present invention is a semiconductor contact formation system and method. Contact insulation regions are formed with multiple etch stop sublayers that facilitate formation of contacts. This...
14	7572710	Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects The invention comprises methods of forming a conductive contact to a source/drain region of a field effect transistor, and methods of forming local interconnects. In one implementation, a method of...
15	7569478	Method and apparatus for manufacturing semiconductor device, control program and computer storage medium In a method for manufacturing a semiconductor device having a dual damascene structure, a semiconductor substrate formed by stacking a trench mask and a via hole resist mask on an insulating film...
16	7569467	Semiconductor device and manufacturing method thereof A semiconductor device has a multi-layer wiring in which resistance against migration of the semiconductor device is raised to improve the yield. Semiconductor device 100 includes a first...
17	7566971	Semiconductor device and manufacturing method thereof The invention provides a technology for manufacturing a higher performance and higher reliability semiconductor device at low cost and with high yield. The semiconductor device of the invention has...
18	7563728	Methods of modifying interlayer adhesion Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method...
19	7563706	Material for forming insulating film with low dielectric constant, low dielectric insulating film, method for forming low dielectric insulating film and semiconductor device A material for forming an insulating film with low dielectric constant of this invention is a solution including a fine particle principally composed of a silicon atom and an oxygen atom and having...
20	7557030	Method for fabricating a recess gate in a semiconductor device A method for fabricating a recess gate in a semiconductor device is provided. The method includes selectively etching an active region of a substrate to form a recess pattern, performing a post...
21	7553759	Semiconductor device and method of manufacturing a semiconductor device A semiconductor device may include the following. A diffusion barrier formed over a semiconductor substrate having a conductive layer. An etching stop layer formed over a diffusion barrier....
22	7531448	Manufacturing method of dual damascene structure A manufacturing method of a dual damascene structure is provided. First, a barrier layer, a first dielectric layer, a second dielectric layer, a cap layer, a metal-containing hard mask layer, a...
23	7528059	Method for reducing polish-induced damage in a contact structure by forming a capping layer By forming a capping layer after a CMP process for planarizing the surface topography of an ILD layer, any surface irregularities may be efficiently sealed, thereby reducing the risk for forming...
24	7524752	Method of manufacturing semiconductor device In a method of manufacturing a semiconductor device which method is made up of a process of forming a wiring groove using a hard mask, a metal hard mask 107 is used to form a wiring groove 111 ,...
25	7524750	Integrated process modulation (IPM) a novel solution for gapfill with HDP-CVD A process is provided for depositing an silicon oxide film on a substrate disposed in a process chamber. A process gas that includes a halogen source, a fluent gas, a silicon source, and an...
26	7521355	Integrated circuit insulators and related methods A system and method for providing low dielectric constant insulators in integrated circuits is provided. One aspect of this disclosure relates to a method for forming an integrated circuit...
27	7521353	Method for reducing dielectric overetch when making contact to conductive features In a first preferred embodiment of the present invention, conductive features are formed on a first dielectric etch stop layer, and a second dielectric material is deposited over and between the...
28	7514779	Multilayer build-up wiring board Mesh holes 35 a and 59 a of upper solid layers 35 and upper solid layers 59 are formed to overlie on one another, so that the insulating properties of interlayer resin insulating layers 50...
29	7514365	Method of fabricating opening and plug A method of fabricating an opening or plug. In the process of forming the opening, before a photoresist layer is formed over a dielectric layer, a treatment process is performed to form a film on...
30	7510959	Method of manufacturing a semiconductor device having damascene structures with air gaps A method of manufacturing a semiconductor device having damascene structures with air gaps is provided. In one embodiment, the method comprises the steps of depositing and patterning a disposable...
31	7507656	Method and structure for low k interlayer dielectric layer An integrated circuit interconnect structure. The structure includes a substrate and a layer of transistor elements overlying the substrate. A first interlayer dielectric layer is formed overlying...
32	7504727	Semiconductor interconnect structure utilizing a porous dielectric material as an etch stop layer between adjacent non-porous dielectric materials Interconnect structures possessing a non-porous (dense) low-k organosilicate glass (OSG) film utilizing a porous low-k OSG film as an etch stop layer or a porous low-k OSG film using a non-porous...
33	7504699	Fabrication of a semiconductor device with air gaps for ultra-low capacitance interconnections A method of forming an air gap or gaps within solid structures and specifically semiconductor structures to reduce capacitive coupling between electrical elements such as metal lines, wherein a...
34	7504330	Method of forming an insulative film A method of forming an insulative film includes a step of vacuum laminating an insulative organic material on a substrate that has a peripheral ring electrode formed in a peripheral region of the...
35	7504287	Methods for fabricating an integrated circuit A method is provided for fabricating a semiconductor device which includes a first contact point and a second contact point located above the first contact point. A first material layer is...
36	7489039	Metal fill region of a semiconductor chip Disclosed is a metal fill region of a semiconductor chip including a plurality of layer sets of the semiconductor chip, each set including a first metal fill layer, a second metal fill layer, and...
37	7488680	Conductive through via process for electronic device carriers Conductive through vias are formed in electronic devices and electronic device carrier, such as, a silicon chip carrier. An annulus cavity is etched into the silicon carrier from the top side of...
38	7485570	Silicon oxycarbide, growth method of silicon oxycarbide layer, semiconductor device and manufacture method for semiconductor device A method of manufacturing a semiconductor device includes the steps of: preparing an underlying structure having a silicon carbide layer covering a copper wiring, and growing silicon oxycarbide on...
39	7485569	Printed circuit board including embedded chips and method of fabricating the same A printed circuit board having embedded chips, composed of a central layer having an embedded chip, an insulating layer formed on one surface or both surfaces of the central layer and having a via...
40	7482262	Method of manufacturing semiconductor device Disclosed are embodiments relating to a method of manufacturing a semiconductor device that may improve the yield rate of the semiconductor device. In embodiments, the method may include preparing...
41	7470611	In situ deposition of a low K dielectric layer, barrier layer, etch stop, and anti-reflective coating for damascene application The present invention provides a SiC material, formed according to certain process regimes, useful as a barrier layer, etch stop, and/or an ARC, in multiple levels, including the pre-metal...
42	7470597	Method of fabricating a multilayered dielectric diffusion barrier layer A method of fabricating a structure including a low-k multilayered dielectric diffusion barrier layer having at least one low-k sublayer and at least one air barrier sublayer is described herein....
43	7468317	Method of forming metal line of semiconductor device A method of forming a metal line, in which a nitride layer is used instead of a metal barrier layer, enabling a metal line structure with a relatively low resistance and therefore realizing a high...
44	7462558	Method for fabricating a circuit component A method for fabricating a metallization structure comprises depositing a first metal layer; depositing a first pattern-defining layer over said first metal layer, a first opening in said first...
45	7459787	Multi-layered copper line structure of semiconductor device and method for forming the same A multi-layered copper line structure of a semiconductor device with a lower copper line, an upper copper line, and a via contact, which electrically connects the lower copper line and the upper...
46	7459389	Method of forming a semiconductor device having air gaps and the structure so formed A method of forming a semiconductor device. Depositing alternating layers of a first and a second dielectric material, wherein the first and second dielectric materials are selectively etchable at...
47	7456093	Method for improving a semiconductor device delamination resistance A semiconductor device with improved resistance to delamination and method for forming the same the method including providing a semiconductor wafer comprising a metallization layer with an...
48	7452803	Method for fabricating chip structure A method for fabricating a metallization structure comprises depositing a first metal layer; depositing a first pattern-defining layer over said first metal layer, a first opening in said first...
49	7452802	Method of forming metal wiring for high voltage element Disclosed herein is a method of forming metal wirings for high voltage elements. According to the present invention, after a copper film is formed, a wet etch process using an interlayer insulating...
50	7452795	Semiconductor device and method for fabricating the same When a via-hole 26 and an interconnection trench 32 are formed in an interconnection films 16, 18 by using as a mask a hard mask 20 covering the region except via-hole forming region, and a...

Matches 1 - 50 out of 1153

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