Patents in Class 438/622

Matches 1 - 50 out of 1465

Match	Document	Document Title
1	7619310	Semiconductor interconnect and method of making same An integrated circuit interconnect structure includes a conductive line, a first barrier layer disposed on a bottom surface of conductive line, a second barrier layer disposed on the top surface of...
2	7618887	Semiconductor device with a metal line and method of forming the same A method of forming a metal line in a semiconductor device including forming a first insulation layer and a first etch stop layer on a conductive layer, and forming a first photosensitive layer...
3	7615481	Method of manufacturing multilevel interconnect structure and multilevel interconnect structure A method of manufacturing a multilevel interconnect structure using a screen printing method is disclosed. In the multilevel interconnect structure, an interlayer insulating film having a through...
4	7615480	Methods of post-contact back end of the line through-hole via integration Presented are methods of fabricating three-dimensional integrated circuits that include post-contact back end of line through-hole via integration for the three-dimensional integrated circuits. In...
5	7611982	Method of forming sheet having foreign material portions used for forming multi-layer wiring board and sheet having foreign portions The present invention relates to a laminated type electronic part and aims at providing a sheet manufacturing method and a sheet that contribute to high integration, downsizing and enhancement of...
6	7601632	Method of forming a metal line of a semiconductor device A first conductive layer is formed over a substrate in which contact holes are formed in an interlayer insulating layer. The first conductive layer is melted by an annealing process, thus coating...
7	7601631	Very low dielectric constant plasma-enhanced CVD films The present invention provides a method for depositing nano-porous low dielectric constant films by reacting an oxidizable silicon containing compound or mixture comprising an oxidizable silicon...
8	7601577	Work function control of metals Forming metal gate transistors that have different work functions is disclosed. In one example, a first metal, which is a ‘mid gap’ metal, is manipulated in first and second regions by second...
9	7598174	Feature patterning methods Methods of patterning features, methods of patterning material layers of semiconductor devices, and methods of manufacturing semiconductor devices are disclosed. In one embodiment, a method of...
10	7598167	Method of forming vias in semiconductor substrates without damaging active regions thereof and resulting structures Methods for forming through vias in a semiconductor substrate and resulting structures are disclosed. In one embodiment, a through via may be formed by forming a partial via from the active surface...
11	7598166	Dielectric layers for metal lines in semiconductor chips A semiconductor structure and methods for forming the same. The structure includes (a) a substrate; (b) a first device and a second device each being on the substrate; (c) a device cap dielectric...
12	7598165	Methods for forming a multiplexer of a memory device A method of forming a portion of a multiplexer of a memory device includes forming a plurality of conductive plugs on a semiconductor substrate and forming first and second bit lines overlying the...
13	7595269	Semiconductor device comprising a copper alloy as a barrier layer in a copper metallization layer By forming a tin and nickel-containing copper alloy on an exposed copper surface, which is treated to have a copper oxide thereon, a reliable and highly efficient capping layer may be provided. The...
14	7592252	Versatile system for charge dissipation in the formation of semiconductor device structures The present invention provides a system for dissipating any aberrant charge that may accumulate during the fabrication of a semiconductor device segment ( 200 ), obviating overstress or break down...
15	7592250	Multilayer wiring board, manufacturing method thereof, semiconductor device, and wireless electronic device A multilayer wiring board exhibiting excellent moldability and having a capacitor where variation of capacitance is suppressed, its producing method, a semiconductor device mounting a semiconductor...
16	7592248	Method of forming semiconductor device having nanotube structures A semiconductor device having upright dielectric nanotubes at an inter-layer dielectric level and method of manufacturing such a device is disclosed. The use of a catalyst is proposed in the...
17	7589014	Semiconductor device having multiple wiring layers and method of producing the same A method of producing a semiconductor device having a plurality of wiring layers forms a first interlayer-insulating film, forms a plurality of grooves for wiring in the first interlayer-insulating...
18	7589013	Electrode structure and method of manufacturing the same, phase-change memory device having the electrode structure and method of manufacturing the same Example embodiments of the present invention relate to an electrode structure, a method of manufacturing the electrode structure, a phase-change memory device having the electrode structure and a...
19	7589011	Semiconductor device and method of forming intermetal dielectric layer There is provided a semiconductor device in which extension units are formed in the ends of a slit that constitutes a slit pattern to relieve stress transmitted between interconnect layers. The...
20	7589008	Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using such methods Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces having such interconnects are disclosed herein. One aspect of the invention is directed toward a...
21	7588950	Test pattern for reliability measurement of copper interconnection line having moisture window and method for manufacturing the same Disclosed is a test pattern for a reliability measurement of a copper interconnection line having a moisture window and a method for manufacturing the same. The method includes the steps of: a...
22	7586194	Semiconductor device having exposed heat dissipating metal plate A semiconductor device including; a bottom plate having a laminated structure in which between a first and a second metal plates a third metal plate harder than these metal plates is clipped, a...
23	7586175	Semiconductor wafer having embedded electroplating current paths to provide uniform plating over wafer surface A semiconductor wafer having multi-layer metallization structures that are fabricated to include embedded interconnection structures which serve as low-resistance electroplating current paths to...
24	7585763	Methods of fabricating integrated circuit devices using anti-reflective coating as implant blocking layer A patterned anti-reflective coating may be used as a selective implant-blocking layer during fabrication of an integrated circuit transistor. In particular, the anti-reflective coating may be used...
25	7585758	Interconnect layers without electromigration A structure and a method for forming the same. The structure includes (a) an interlevel dielectric (ILD) layer; (b) a first electrically conductive line and a second electrically conductive line...
26	7579278	Topography directed patterning A pattern having exceptionally small features is formed on a partially fabricated integrated circuit during integrated circuit fabrication. The pattern comprises features formed by self-organizing...
27	7579270	Method for manufacturing a semiconductor device It is an object of the present invention to provide a method for manufacturing a highly reliable semiconductor device with preferable yield. In the invention, two-step etching is performed when...
28	7576405	Semiconductor integrated circuit for reducing leak current through MOS transistors A semiconductor device is composed of: a power control region within which function cells are arranged; a basic power supply line overlapping said power control region, and positioned in a power...
29	7576382	Semiconductor integrated device and method of providing shield interconnection therein A method of providing shield interconnection, the method shielding an interconnection pattern to be shielded with shield interconnection patterns for shielding on the substrate of a semiconductor...
30	7575999	Method for creating conductive elements for semiconductor device structures using laser ablation processes and methods of fabricating semiconductor device assemblies A method for forming at least one conductive element is disclosed. Particularly, a semiconductor substrate, including a plurality of semiconductor dice thereon, may be provided and a dielectric...
31	7575995	Method of forming fine metal pattern and method of forming metal line using the same There are provided a method of forming a fine metal pattern and a method of forming a metal line using the same. In the method of forming a fine metal pattern, a substrate is prepared where a first...
32	7575981	Method for fabricating isolation layer in semiconductor device A method for fabricating an isolation layer in a semiconductor device includes providing a substrate, forming a trench over the substrate, forming a liner nitride layer and a liner oxide layer...
33	7572710	Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects The invention comprises methods of forming a conductive contact to a source/drain region of a field effect transistor, and methods of forming local interconnects. In one implementation, a method of...
34	7569845	Phase-change memory and fabrication method thereof A phase-change memory comprises a bottom electrode formed on a substrate. A first isolation layer is formed on the bottom electrode. A top electrode is formed on the isolation layer. A first...
35	7569477	Method for fabricating fine pattern in semiconductor device A method for fabricating a fine pattern in a semiconductor device includes forming a first photoresist pattern over an etch target layer, forming a first hard mask layer over a substrate structure,...
36	7569476	Semiconductor integrated circuit device and a method of manufacturing the same In manufacturing a semiconductor integrated circuit device, an interconnect trench and a contact hole are formed in an interlayer insulating film formed over a first-level interconnect on a...
37	7566650	Integrated circuit solder bumping system An integrated circuit solder bumping system provides a substrate and forms a redistribution layer on the substrate. An insulation layer is formed on the redistribution layer. The insulation layer...
38	7563730	Hafnium lanthanide oxynitride films Electronic apparatus and methods of forming the electronic apparatus include a hafnium lanthanide oxynitride film on a substrate for use in a variety of electronic systems. The hafnium lanthanide...
39	7563728	Methods of modifying interlayer adhesion Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method...
40	7563705	Manufacturing method of semiconductor device A manufacturing method of a semiconductor device including a step of forming a via hole in an insulation layer including an organic low dielectric film, such as MSQ, SiC, and SiCN, and then...
41	7563704	Method of forming an interconnect including a dielectric cap having a tensile stress An interconnect structure and method of making the same are provided. The interconnect structure includes a dielectric layer having a patterned opening, a metal feature disposed in the patterned...
42	7563701	Self-aligned contacts for transistors Self-aligned contacts for transistors and methods for fabricating the contacts are described. An etch resistant material is patterned to create an opening that resides above a transistor gate...
43	7560376	Method for adjoining adjacent coatings on a processing element Two or more coatings applied to processing elements of a plasma processing system are treated with protective barriers or coatings. A method is described for adjoining two or more coatings on the...
44	7560375	Gas dielectric structure forming methods Methods of forming a gas dielectric structure for a semiconductor structure by using a sacrificial layer. In particular, one embodiment of the invention includes forming an opening for...
45	7557447	Semiconductor device and method for manufacturing same An improved migration resistance of the interconnect is provided and a diffusion of silicon into the inside of the interconnect is suppressed. A semiconductor device includes a silicon substrate, a...
46	7557025	Method of etching a dielectric layer to form a contact hole and a via hole and damascene method A method of etching a dielectric layer by a conductive mask includes providing the dielectric layer on a substrate, forming a pattern conductive mask on the dielectric layer, the pattern conductive...
47	7554176	Integrated circuits having a multi-layer structure with a seal ring A plurality of IC regions are formed on a semiconductor wafer, which is cut into individual chips incorporating ICs, wherein wiring layers and insulating layers are sequentially formed on a silicon...
48	7554145	Magnetic memory cells and manufacturing methods An improved magnetoresistive memory device has a reduced distance between the magnetic memory element and a conductive memory line used for writing to the magnetic memory element. The reduced...
49	7553756	Process for producing semiconductor integrated circuit device An object of the present invention is to prevent formation of a badly situated via metal in a Damascene wiring portion in multiple layers having an air-gap structure. In the present invention, a...
50	7553755	Method for symmetric deposition of metal layer A method for symmetric deposition of metal layer over a metal layer registration key comprises using MOCVD to form the metal layer. Once the symmetric metal layer is formed, a metal layer...

Matches 1 - 50 out of 1465

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