|
Match
|
Document |
Document Title |
|
|
7622378 |
Multi-step system and method for curing a dielectric film
A multi-step system and method for curing a dielectric film in which the system includes a drying system configured to reduce the amount of contaminants, such as moisture, in the dielectric film....
|
|
|
7601630 |
Semiconductor device and method for fabricating the same
A method of fabricating a semiconductor memory device and a structure that forms both a resistor and an etching protection layer to reduce a contact resistance. The method of fabricating a...
|
|
|
7598174 |
Feature patterning methods
Methods of patterning features, methods of patterning material layers of semiconductor devices, and methods of manufacturing semiconductor devices are disclosed. In one embodiment, a method of...
|
|
|
7592263 |
Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device. In this method, a concave portion is formed in one surface in the thickness direction of a primary base plate comprising a semiconductor substrate...
|
|
|
7585758 |
Interconnect layers without electromigration
A structure and a method for forming the same. The structure includes (a) an interlevel dielectric (ILD) layer; (b) a first electrically conductive line and a second electrically conductive line...
|
|
|
7582560 |
Method for fabricating semiconductor device
A method for fabricating a semiconductor device includes preparing a substrate comprising a first surface and a second surface formed at a lower position than the first surface, forming an...
|
|
|
7579278 |
Topography directed patterning
A pattern having exceptionally small features is formed on a partially fabricated integrated circuit during integrated circuit fabrication. The pattern comprises features formed by self-organizing...
|
|
|
7579270 |
Method for manufacturing a semiconductor device
It is an object of the present invention to provide a method for manufacturing a highly reliable semiconductor device with preferable yield. In the invention, two-step etching is performed when...
|
|
|
7566651 |
Low contact resistance metal contact
A semiconductor structure and methods of making the same. The semiconductor structure includes a substrate having a silicide region disposed above a doped region, and a metal contact extending...
|
|
|
7563714 |
Low resistance and inductance backside through vias and methods of fabricating same
A backside contact structure and method of fabricating the structure. The method includes: forming a dielectric isolation in a substrate, the substrate having a frontside and an opposing backside;...
|
|
|
7563709 |
Pattern formation method and method for forming semiconductor device
A pattern formation method includes the steps of forming a flowable film made of a material with flowability; forming at least one of a concave portion and a convex portion provided on a pressing...
|
|
|
7560375 |
Gas dielectric structure forming methods
Methods of forming a gas dielectric structure for a semiconductor structure by using a sacrificial layer. In particular, one embodiment of the invention includes forming an opening for...
|
|
|
7560016 |
Selectively accelerated plating of metal features
To make a metal feature, a non-plateable layer is applied to a workpiece surface and then patterned to form a first plating region and a first non-plating region. Then, metal is deposited on the...
|
|
|
7557039 |
Method for fabricating contact hole of semiconductor device
A method for forming a contact hole of a semiconductor device includes: forming a lower pattern over a substrate; forming a spin-on-glass (SOG) layer over the lower pattern; performing a first...
|
|
|
7553755 |
Method for symmetric deposition of metal layer
A method for symmetric deposition of metal layer over a metal layer registration key comprises using MOCVD to form the metal layer. Once the symmetric metal layer is formed, a metal layer...
|
|
|
7553754 |
Electronic device, method of manufacture of the same, and sputtering target
In an electronic device comprising a first electrodes consisting of a metal oxide and a second electrode consisting of an aluminum alloy film directly contacted and electrically connected to the...
|
|
|
7547594 |
Metal-oxide-semiconductor transistor and method of forming the same
A method of forming a metal-oxide-semiconductor (MOS) transistor device is provided. First, a semiconductor substrate is prepared. Subsequently, a gate structure is formed on the semiconductor...
|
|
|
7545034 |
Thermal energy removal structure and method
An electrical structure including a first substrate comprising a plurality of electrical components, a first thermally conductive film layer formed over and in contact with a first electrical...
|
|
|
7541277 |
Stress relaxation, selective nitride phase removal
A method for forming a dielectric cap layer over an interconnect layer formed by a back-end-of-the-line (BEOL) interconnect process, the interconnect process including: lithography, reactive ion...
|
|
|
7534722 |
Back-to-front via process
A method performed on a semiconductor chip having a doped semiconductor material abutting a substrate involves creating a first via through at least a portion of the substrate extending from an...
|
|
|
7531445 |
Formation of through-wafer electrical interconnections and other structures using a thin dielectric membrane
Providing through-wafer interconnections in a semiconductor wafer includes forming a sacrificial membrane in a pre-existing semiconductor wafer, depositing metallization over one side of the wafer...
|
|
|
7528895 |
Liquid crystal display device and method for making the same
A method for manufacturing a substrate of a TFT LCD device is disclosed with following steps: providing a transparent substrate having a thin film transistors area and a storing capacitor area;...
|
|
|
7528066 |
Structure and method for metal integration
An interconnect structure including a gouging feature at the bottom of one of the via openings and a method of forming the same are provided. In accordance with the present invention, the method of...
|
|
|
7524751 |
Method for forming contact hole in semiconductor device
Methods for forming a contact hole in a semiconductor device are provided. An exposed portion of an isolation layer, which may be generated during a process of forming a borderless contact hole,...
|
|
|
7514352 |
Method of manufacturing a semiconductor device having an interconnect structure that increases in impurity concentration as width increases
The present invention provides a semiconductor device capable of suppressing an increase in electrical resistance of a narrow interconnect, while keeping reliability of a wide interconnect from...
|
|
|
7511939 |
Layered capacitor architecture and fabrication method
A layered capacitor structure comprises two or more semiconductor/dielectric plates formed above an insulating surface which provides mechanical support, with the plates arranged in a vertical...
|
|
|
7510960 |
Bridge for semiconductor internal node
A method and apparatus for forming connections within a semiconductor device is disclosed. The semiconductor device incorporates a contact bridge between transistor contacts in close proximity. The...
|
|
|
7507664 |
Tungsten plug corrosion prevention method using ionized air
Disclosed herein is a method of making integrated circuits. In one embodiment the method includes forming tungsten plugs in the integrated circuit and forming electrically conductive interconnect...
|
|
|
7504287 |
Methods for fabricating an integrated circuit
A method is provided for fabricating a semiconductor device which includes a first contact point and a second contact point located above the first contact point. A first material layer is...
|
|
|
7498622 |
Latchup robust gate array using through wafer via
A structure and a method for preventing latchup in a gate array. The structure including: a NFET gate array and a PFET gate array in a substrate; an electrically conductive through via extending...
|
|
|
7494867 |
Semiconductor device having MIM capacitive elements and manufacturing method for the same
A method for manufacturing a semiconductor device is provided. The method includes forming a lower interconnection on a semiconductor substrate; forming a first interlayer insulation film in which...
|
|
|
7473631 |
Method of forming contact holes in a semiconductor device having first and second metal layers
An exemplary method of forming a contact hole in a semiconductor device includes: forming a first insulation layer on a lower substrate; forming a first conductive layer on the first insulation...
|
|
|
7470616 |
Damascene wiring fabrication methods incorporating dielectric cap etch process with hard mask retention
Methods for fabricating metal wiring layers of a semiconductor device are provided where damascene interconnect structures are formed in a BEOL process that incorporates a dielectric cap-open-first...
|
|
|
7465662 |
Method of making semiconductor device
A semiconductor device is manufactured by a method including forming a first interlayer insulating film. A first etching stopper film is formed on the first interlayer insulating film. A conductive...
|
|
|
7405151 |
Method for forming a semiconductor device
A method for forming a semiconductor device is described. An opening is formed in a first dielectric layer, exposing an active region of the transistor, and an atomic layer deposited (ALD) TaN...
|
|
|
7393773 |
Method and apparatus for producing co-planar bonding pads on a substrate
A method and apparatus for producing a substrate having a plurality of substantially co-planar bonding pads is provided. The substrate is employed in a probe apparatus used in wafer testing of...
|
|
|
7390741 |
Method for fabricating semiconductor device
A method for fabricating a semiconductor device comprises the steps of: forming interconnection grooves 38 in an inter-layer insulation film 34 ; forming an interconnection layer 44 of Cu as...
|
|
|
7378339 |
Barrier for use in 3-D integration of circuits
A method for forming a semiconductor device includes providing a first integrated circuit having a landing pad and attaching a second integrated circuit to the first integrated circuit using at...
|
|
|
7378330 |
Cleaving process to fabricate multilayered substrates using low implantation doses
A method of forming substrates, e.g., silicon on insulator, silicon on silicon. The method includes providing a donor substrate, e.g., silicon wafer. The method also includes forming a cleave layer...
|
|
|
7365384 |
Trench buried bit line memory devices and methods thereof
A memory device includes isolation trenches that are formed generally parallel to and along associated strips of active area. A conductive bit line is recessed within each isolation trench such...
|
|
|
7365004 |
Method for manufacturing semiconductor device
The invention is aimed to prevent that fall of characteristic of a solar battery and producing yield caused by particles of powder condition generating from working part at laser beam process in...
|
|
|
7354852 |
Method of forming interconnection in semiconductor device
A multilayer interconnection structure is formed by a method comprising the steps of: Forming a low dielectric constant film on a substrate, curing the low dielectric constant film by irradiating...
|
|
|
7348279 |
Method of making an integrated circuit, including forming a contact
In order to form a contact in a layer on a substrate, in particular a contact in a logic circuit in a semiconductor component, the mask layer is structured for etching of the contact holes with a...
|
|
|
7335517 |
Multichip semiconductor device, chip therefor and method of formation thereof
A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film...
|
|
|
7326642 |
Method of fabricating semiconductor device using low dielectric constant material film
The semiconductor device is capable of coping with speedup of operation using a low dielectric constant material film other than silicon. The base ( 10 ) formed by the substrate ( 11 ) and the low...
|
|
|
7316971 |
Wire bond pads
A wire bond pad and method of fabricating the wire bond pad. The method including: providing a substrate; forming an electrically conductive layer on a top surface of the substrate; patterning the...
|
|
|
7312145 |
Electronic member, method for making the same, and semiconductor device
The present invention provides an electronic device having high insulating reliability, in which metal portions of a circuit are not electrically conductive with each other via an adhesive layer...
|
|
|
7307012 |
Post vertical interconnects formed with silicide etch stop and method of making
A method to form a vertical interconnect advantageous for high-density semiconductor devices. A conductive etch stop layer, preferably of cobalt silicide, is formed. The etch stop layer may be in...
|
|
|
7304387 |
Semiconductor integrated circuit device
Provided are a semiconductor integrated device and a method for fabricating the same. The semiconductor integrated circuit includes a semiconductor substrate including a first dopant, a first...
|
|
|
7301236 |
Increasing electromigration lifetime and current density in IC using vertically upwardly extending dummy via
An integrated circuit with increased electromigration lifetime and allowable current density and methods of forming same are disclosed. In one embodiment, an integrated circuit includes a...
|