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7608534 Interconnection of through-wafer vias using bridge structures  
Bridge structures provide a surface on which to form interconnections to components through through-hole vias. The bridge structures at least partially, and preferably fully, span the gap between...
7605073 Sealants for metal interconnect protection in microelectronic devices having air gap interconnect structures  
Embodiments of the invention include apparatuses and methods relating to air gap interconnect structures having interconnects protected by a sealant. In various embodiments, the sealant includes...
7601629 Semiconductive device fabricated using subliming materials to form interlevel dielectrics  
The invention provides a method of fabricating a semiconductive device [ 200 ]. In this embodiment, the method comprises depositing a hydrocarbon layer [ 294 ] over a semiconductive substrate,...
7598166 Dielectric layers for metal lines in semiconductor chips  
A semiconductor structure and methods for forming the same. The structure includes (a) a substrate; (b) a first device and a second device each being on the substrate; (c) a device cap dielectric...
7589425 Method of manufacturing a semiconductor device having damascene structures with air gaps  
A method of manufacturing a semiconductor device having damascene structures with air gaps is provided. In one embodiment, the method comprises providing a substantially planar layer having a first...
7579278 Topography directed patterning  
A pattern having exceptionally small features is formed on a partially fabricated integrated circuit during integrated circuit fabrication. The pattern comprises features formed by self-organizing...
7575996 Semiconductor device and method for manufacturing the same  
Embodiments relate to a semiconductor device and a method for manufacturing the same. Embodiments may include forming a lower porous oxide layer on a semiconductor substrate having a conductive...
7569465 Use of voids between elements in semiconductor structures for isolation  
A flash EEPROM or other type of memory cell array having adjacent charge storage elements is formed with a gas filled void between them in order to reduce the level of capacitive coupling between...
7560375 Gas dielectric structure forming methods  
Methods of forming a gas dielectric structure for a semiconductor structure by using a sacrificial layer. In particular, one embodiment of the invention includes forming an opening for...
7560344 Semiconductor device having a pair of fins and method of manufacturing the same  
Example embodiments relate to a semiconductor device and a method of manufacturing the same. A semiconductor device according to example embodiments may have reduced disturbances during reading...
7553739 Integration control and reliability enhancement of interconnect air cavities  
An improved semiconductor device, integrated circuit, and integrated circuit fabrication method introduce highly controlled air cavities within high-speed copper interconnects. A polymer material...
7550317 Method for manufacture of wafer level package with air pads  
A structure for improving electrical performance and interconnection reliability of an integrated circuit in a Wafer Level Packaging (WLP) application comprises an air pad located under an...
7544602 Method and structure for ultra narrow crack stop for multilevel semiconductor device  
An integrated circuit design and a method of fabrication and, more particularly, a semiconductor structure having an ultra narrow crack stop for use in multilevel level devices and a method of...
7541277 Stress relaxation, selective nitride phase removal  
A method for forming a dielectric cap layer over an interconnect layer formed by a back-end-of-the-line (BEOL) interconnect process, the interconnect process including: lithography, reactive ion...
7538019 Forming compliant contact pads for semiconductor packages  
In one embodiment, the present invention includes a semiconductor package having a substrate with a first surface to support a semiconductor die. A second surface of the substrate includes...
7534696 Multilayer interconnect structure containing air gaps and method for making  
A multilevel air-gap-containing interconnect structure and a method of fabricating the same are provided. The multilevel air-gap-containing interconnect structure includes a collection of...
7531444 Method to create air gaps using non-plasma processes to damage ILD materials  
A method of forming airgaps is provided where a blocking mask is applied to a substrate to shield a portion of the substrate from a beam of energy. After irradiation, the blocking mask is removed...
7524734 Wiring substrate, electro-optic device, electric apparatus, method of manufacturing wiring substrate, method of manufacturing electro-optic device, and method of manufacturing electric apparatus  
A wiring substrate includes a substrate, a first film, and a second film formed between the substrate and the first film, and an empty space is formed between at least a part of the second film and...
7521276 Compliant terminal mountings with vented spaces and methods  
A method of making chip assemblies includes providing an in-process assembly including a semiconductor wafer, a wafer compliant structure overlying a front surface of the wafer and cavities, and...
7517794 Method for fabricating nanoscale features  
One embodiment of the present invention is a method for fabricating a nanoscale shift register. In a described embodiment, a nanoimprinting-resist layer applied above a silicon-on-insulator...
7510959 Method of manufacturing a semiconductor device having damascene structures with air gaps  
A method of manufacturing a semiconductor device having damascene structures with air gaps is provided. In one embodiment, the method comprises the steps of depositing and patterning a disposable...
7507656 Method and structure for low k interlayer dielectric layer  
An integrated circuit interconnect structure. The structure includes a substrate and a layer of transistor elements overlying the substrate. A first interlayer dielectric layer is formed overlying...
7504699 Fabrication of a semiconductor device with air gaps for ultra-low capacitance interconnections  
A method of forming an air gap or gaps within solid structures and specifically semiconductor structures to reduce capacitive coupling between electrical elements such as metal lines, wherein a...
7501354 Formation of low K material utilizing process having readily cleaned by-products  
Nano-porous low dielectric constant films are deposited utilizing materials having reactive by-products readily removed from a processing chamber by plasma cleaning. In accordance with one...
7498256 Copper contact via structure using hybrid barrier layer  
Contact via structures using a hybrid barrier layer, are disclosed. One contact via structure includes: an opening through a dielectric to a silicide region; a first layer in the opening in direct...
7491578 Method of forming crack trapping and arrest in thin film structures  
The present invention relates to a process for preparing a robust crack-absorbing integrated circuit chip comprising a crack trapping structure containing two metal plates and a via-bar structure...
7485567 Microelectronic circuit structure with layered low dielectric constant regions and method of forming same  
A method for manufacturing a microelectronic circuit includes the steps of providing a first wiring level comprising first wiring level conductors separated by a first wiring level dielectric...
7482261 Interconnect structure for BEOL applications  
A semiconductor interconnect structure is provided that includes a new capping layer/dielectric material interface which is embedded inside the dielectric material. In particular, the new interface...
7462905 Nonvolatile semiconductor memory device, semiconductor device and method of manufacturing nonvolatile semiconductor memory device  
A nonvolatile semiconductor memory device includes a semiconductor substrate, a first floating gate formed on a main surface of the semiconductor substrate, a second floating gate formed on the...
7459389 Method of forming a semiconductor device having air gaps and the structure so formed  
A method of forming a semiconductor device. Depositing alternating layers of a first and a second dielectric material, wherein the first and second dielectric materials are selectively etchable at...
7449407 Air gap for dual damascene applications  
An air gap structure and formation method for substantially reducing capacitance in a dual damascene based interconnect structure is disclosed. The air gap extends above, and may also additionally...
7439172 Circuit structure with low dielectric constant regions and method of forming same  
A method for manufacturing a circuit includes the step of providing a first wiring level comprising first wiring level conductors separated by a first wiring level dielectric material. A first...
7422975 Composite inter-level dielectric structure for an integrated circuit  
A method is provided for making an inter-level dielectric for a microelectronic device formed on a substrate. The method begins by forming first and second spacer layers over a substrate layer. The...
7422940 Layer arrangement  
A process for producing a layer arrangement, in which a plurality of electrically conductive structures are formed on a substrate, a first electrically insulating layer is formed on the plurality...
7396757 Interconnect structure with dielectric air gaps  
An interconnect structure with improved performance and capacitance by providing air gaps inside the dielectric layer by use of a multi-phase photoresist material. The interconnect features are...
7393776 Method of forming closed air gap interconnects and structures formed thereby  
A method to form a closed air gap interconnect structure is described. A starting structure made of regions of a permanent support dielectric under the interconnect lines and surrounding...
7387912 Packaging of electronic chips with air-bridge structures  
A circuit assembly for fabricating an air bridge structure and a method of fabricating an integrated circuit package capable of supporting a circuit assembly including an air bridge structure. A...
7385295 Fabrication of nano-gap electrode arrays by the construction and selective chemical etching of nano-crosswire stacks  
Methods of fabricating nano-gap electrode structures in array configurations, and the structures so produced. The fabrication method involves depositing first and second pluralities of electrodes...
7371653 Metal interconnection structure of semiconductor device and method of forming the same  
Provided is a metal interconnection structure of a semiconductor device, having: a lower metal layer disposed on an insulating layer formed on a semiconductor device; a contact plug disposed on the...
7364964 Method of fabricating an interconnection layer above a ferroelectric capacitor  
A highly reliable semiconductor device having a ferroelectric capacitor structure by sufficiently preventing the H 2 attack without damaging the function of an interlayer insulating film covering...
7358179 Method of manufacturing semiconductor device including air space formed around gate electrode  
After a HEMT is formed, side walls are formed on a semiconductor substrate. Next, a sacrificial layer is formed to cover the HEMT. Next, contact holes are formed in the sacrificial layer to expose...
7358148 Adjustable self-aligned air gap dielectric for low capacitance wiring  
An adjustable self aligned low capacitance integrated circuit air gap structure comprises a first interconnect adjacent a second interconnect on an interconnect level, spacers formed along adjacent...
7356913 Process for manufacturing a microsystem  
A process for making microswitches or microvalves, composed of a substrate and used for shifting between a first state of functioning and a second state of functioning by means of a bimetal-effect...
7352019 Capacitance reduction by tunnel formation for use with a semiconductor device  
A method used during the manufacture of a semiconductor device comprises providing at least first, second, and third spaced conductive structures, where the second conductive structure is...
7344972 Photosensitive dielectric layer  
The invention provides a layer of photosensitive material that may be directly patterned. The photosensitive material may then be decomposed to leave voids or air gaps in the layer. This may...
7332406 Air gap interconnect structure and method  
A low-k dielectric sacrificial material is formed within a microelectronic structure covered with a layer defining an exhaust vent. At an appropriate time, the underlying sacrificial material is...
7310595 Numerically modeling inductive circuit elements  
A method of determining electrical parameters of inductive elements includes a novel technique of inverting an impedance matrix representative of said inductive circuit element. The method reduces...
7307018 Method of fabricating conductive lines  
A method of forming a conductive line suitable for decreasing a sheet resistance of the conductive lines. The method comprises steps of providing a material layer having a conductive layer formed...
7307011 Structure and method for forming a dielectric chamber and electronic device including the dielectric chamber  
A method (and structure) that selectively forms a dielectric chamber on an electronic device by forming a dummy structure over a semiconductor substrate, depositing a dielectric layer over the...
7297593 Method of manufacturing a floating gate of a flash memory device  
A method of forming a floating gate of a flash memory device wherein a hard mask nitride film is stripped using two or more etching steps. Accordingly, a seam can be prevented when depositing a...
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