Patents in Class 438/618

Matches 1 - 50 out of 1078

Match	Document	Document Title
1	7619309	Integrated connection arrangements A connection arrangement having an outer conductive structure arranged at least partly or completely in a cutout of an electrical insulation layer is provided. An inner conductive structure is...
2	7615489	Method for forming metal interconnects and reducing metal seed layer overhang A method for forming metal interconnects on a substrate is described. A substrate with a dielectric layer is positioned within a processing chamber. A first barrier layer is deposited on the...
3	7615486	Apparatus and method for integrated surface treatment and deposition for copper interconnect A method and system for depositing films on a substrate for copper interconnect in an integrated system are provided to enable controlled-ambient transitions within an integrated system to limit...
4	7615479	Assembly comprising functional block deposited therein An electronic assembly. The assembly includes a substrate, a plurality of recessed regions, and a plurality of functional blocks. Each functional block is deposited in one of the recessed regions....
5	7611986	Dual damascene patterning method A method for patterning a dual damascene structure in a semiconductor substrate is disclosed. The patterning is a metal hardmask based pattering eliminating at least resist poisoning and further...
6	7611982	Method of forming sheet having foreign material portions used for forming multi-layer wiring board and sheet having foreign portions The present invention relates to a laminated type electronic part and aims at providing a sheet manufacturing method and a sheet that contribute to high integration, downsizing and enhancement of...
7	7608534	Interconnection of through-wafer vias using bridge structures Bridge structures provide a surface on which to form interconnections to components through through-hole vias. The bridge structures at least partially, and preferably fully, span the gap between...
8	7605085	Method of manufacturing interconnecting structure with vias First wirings and first dummy wirings are formed in a p-SiOC film formed on a substrate. A p-SiOC film is formed, and a cap film is formed on the p-SiOC film. A dual damascene wiring, including...
9	7605072	Interconnect structure with a barrier-redundancy feature An interconnect structure that includes a barrier-redundancy feature which is capable of avoiding a sudden open circuit after an electromigration (EM) failure as well as a method of forming the...
10	7605071	Controlling lateral distribution of air gaps in interconnects Properties of a hard mask liner are used against the diffusion of a removal agent to prevent air cavity formation in specific areas of an interconnect stack. According to one embodiment, there is...
11	7601630	Semiconductor device and method for fabricating the same A method of fabricating a semiconductor memory device and a structure that forms both a resistor and an etching protection layer to reduce a contact resistance. The method of fabricating a...
12	7601604	Method for fabricating conducting plates for a high-Q MIM capacitor A method of forming one or more capacitors on or in a substrate and a capacitor structure resulting therefrom is disclosed. The method includes forming a trench in the substrate, lining the trench...
13	7598169	Method to remove beol sacrificial materials and chemical residues by irradiation A method to fabricate interconnect structures that are part of integrated circuits and microelectronic devices by utilization of an irradiation to remove and clean a sacrificial material used...
14	7598166	Dielectric layers for metal lines in semiconductor chips A semiconductor structure and methods for forming the same. The structure includes (a) a substrate; (b) a first device and a second device each being on the substrate; (c) a device cap dielectric...
15	7598165	Methods for forming a multiplexer of a memory device A method of forming a portion of a multiplexer of a memory device includes forming a plurality of conductive plugs on a semiconductor substrate and forming first and second bit lines overlying the...
16	7595556	Semiconductor device and method for manufacturing the same Embodiments relate to a semiconductor device and a method for manufacturing the same. According to embodiments, the semiconductor device may include a semiconductor substrate formed with a metal...
17	7592247	Sub-lithographic local interconnects, and methods for forming same The present invention relates to a semiconductor device having first and second active device regions that are located in a semiconductor substrate and are isolated from each other by an isolation...
18	7589012	Method for fabricating semiconductor memory device Disclosed herein is a method for fabricating a semiconductor memory device that can prevent oxidation of bit lines when forming an interlayer dielectric for isolating the bit lines. The bit line is...
19	7589011	Semiconductor device and method of forming intermetal dielectric layer There is provided a semiconductor device in which extension units are formed in the ends of a slit that constitutes a slit pattern to relieve stress transmitted between interconnect layers. The...
20	7585770	Method of growing carbon nanotubes and method of manufacturing field emission device having the same In a method of forming carbon nanotubes (CNTs) and a method of manufacturing a field emission display (FED) device using the CNTs, the method includes preparing a substrate on which a silicon layer...
21	7585758	Interconnect layers without electromigration A structure and a method for forming the same. The structure includes (a) an interlevel dielectric (ILD) layer; (b) a first electrically conductive line and a second electrically conductive line...
22	7582554	Method for manufacturing semiconductor device A method for manufacturing a semiconductor device according to the present invention includes the steps of providing a semiconductor substrate in which an element isolation region and active...
23	7582551	Wiring substrate and wiring substrate manufacturing method A method of manufacturing a wiring substrate comprises: a first step of forming, on a support plate, an electrode pad made of metal; a second step of etching the support plate in such a manner that...
24	7579270	Method for manufacturing a semiconductor device It is an object of the present invention to provide a method for manufacturing a highly reliable semiconductor device with preferable yield. In the invention, two-step etching is performed when...
25	7579269	Microelectronic spring contact elements Spring contact elements are fabricated by depositing at least one layer of metallic material into openings defined in masking layers deposited on a surface of a substrate which may be an electronic...
26	7579225	Method of forming semiconductor device having stacked transistors There is provided a method of forming a semiconductor device having stacked transistors. When forming a contact hole for connecting the stacked transistors to each other, ohmic layers on the bottom...
27	7575999	Method for creating conductive elements for semiconductor device structures using laser ablation processes and methods of fabricating semiconductor device assemblies A method for forming at least one conductive element is disclosed. Particularly, a semiconductor substrate, including a plurality of semiconductor dice thereon, may be provided and a dielectric...
28	7575995	Method of forming fine metal pattern and method of forming metal line using the same There are provided a method of forming a fine metal pattern and a method of forming a metal line using the same. In the method of forming a fine metal pattern, a substrate is prepared where a first...
29	7572694	Method of manufacturing a semiconductor device A method for manufacturing a semiconductor device includes forming an insulation film over a semiconductor substrate having a conduction layer; forming a trench pattern over the insulation film;...
30	7569475	Interconnect structure having enhanced electromigration reliability and a method of fabricating same An interconnect structure having improved electromigration (EM) reliability is provided. The inventive interconnect structure avoids a circuit dead opening that is caused by EM failure by...
31	7566650	Integrated circuit solder bumping system An integrated circuit solder bumping system provides a substrate and forms a redistribution layer on the substrate. An insulation layer is formed on the redistribution layer. The insulation layer...
32	7566646	Three dimensional programmable device and method for fabricating the same A three-dimensional memory device having polycrystalline silicon diode isolation elements for phase change memory cells and method for fabricating the same. The memory device includes a plurality...
33	7566643	Liquid phase deposition of contacts in programmable resistance and switching devices A programmable resistance, chalcogenide, switching or phase-change material device includes a substrate with a plurality of stacked layers including a conducting bottom composite electrode layer,...
34	7560375	Gas dielectric structure forming methods Methods of forming a gas dielectric structure for a semiconductor structure by using a sacrificial layer. In particular, one embodiment of the invention includes forming an opening for...
35	7560016	Selectively accelerated plating of metal features To make a metal feature, a non-plateable layer is applied to a workpiece surface and then patterned to form a first plating region and a first non-plating region. Then, metal is deposited on the...
36	7557046	Systems and methods for interconnect metallization using a stop-etch layer Systems and methods for single lithography step interconnection metallization using a stop-etch layer are described. A method comprises depositing a stop-etch layer over a semiconductor device,...
37	7557030	Method for fabricating a recess gate in a semiconductor device A method for fabricating a recess gate in a semiconductor device is provided. The method includes selectively etching an active region of a substrate to form a recess pattern, performing a post...
38	7557025	Method of etching a dielectric layer to form a contact hole and a via hole and damascene method A method of etching a dielectric layer by a conductive mask includes providing the dielectric layer on a substrate, forming a pattern conductive mask on the dielectric layer, the pattern conductive...
39	7557014	Semiconductor system-in-package A semiconductor apparatus comprises a support substrate having through holes filles with conductor adapted to a first pitch; a capacitor formed on or above said support substrate; a wiring layer...
40	7554145	Magnetic memory cells and manufacturing methods An improved magnetoresistive memory device has a reduced distance between the magnetic memory element and a conductive memory line used for writing to the magnetic memory element. The reduced...
41	7553755	Method for symmetric deposition of metal layer A method for symmetric deposition of metal layer over a metal layer registration key comprises using MOCVD to form the metal layer. Once the symmetric metal layer is formed, a metal layer...
42	7553686	Al₂O₃atomic layer deposition to enhance the deposition of hydrophobic or hydrophilic coatings on micro-electromechanical devices Micro-mechanical devices, such as MEMS, having layers thereon, and methods of forming the layers, are disclosed. In one aspect, a method may include forming a layer including an oxide of aluminum...
43	7550394	Semiconductor device and fabrication process thereof A method of fabricating a semiconductor device includes a dry etching process of a silicon surface. The dry etching process is conducted by an etching gas containing at least one gas species...
44	7550377	Method for fabricating single-damascene structure, dual damascene structure, and opening thereof A method for fabricating a single-damascene opening is described. The method includes providing a substrate having a conductive line formed therein. A barrier layer, a dielectric layer, a metal...
45	7544601	Semiconductor device and a method for manufacturing the same Disclosed are embodiments relating to a semiconductor device and a method of manufacturing a semiconductor device that may prevent an increase of a dielectric effective constant of the IMD. In...
46	7541277	Stress relaxation, selective nitride phase removal A method for forming a dielectric cap layer over an interconnect layer formed by a back-end-of-the-line (BEOL) interconnect process, the interconnect process including: lithography, reactive ion...
47	7541276	Methods for forming dual damascene wiring for semiconductor devices using protective via capping layer Exemplary embodiments of the invention generally include methods for forming multilayer metal interconnect structures using dual damascene methods that incorporate a via capping process to protect...
48	7540970	Methods of fabricating a semiconductor device Methods of fabricating a semiconductor device are provided. Methods of forming a finer pattern of a semiconductor device using a buffer layer for retarding, or preventing, bridge formation between...
49	7538435	Wafer structure and bumping process A wafer structure including a semiconductor substrate, elastic elements, under bump metallurgic (UBM) layers and bumps is provided. The semiconductor substrate has an active surface, and it...
50	7538005	Semiconductor device and method for fabricating the same A semiconductor device is composed of: an interconnect made of a first conductive film and a second conductive film that are stacked in sequence from the interconnect underside on an insulating...

Matches 1 - 50 out of 1078

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