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6897089 |
Method and system for fabricating semiconductor components using wafer level contact printing
A method for fabricating semiconductor components includes the steps of providing semiconductor dice on a substrate and forming a polymer layer on the substrate. In addition, the method includes...
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6897141 |
Solder terminal and fabricating method thereof
A solder terminal and a fabrication method thereof are provided. According to one embodiment of the present invention, a solder terminal structure includes an adhesion metal layer formed on an...
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6893952 |
Methods of forming a ball grid array including a non-conductive polymer core and a silver or silver alloy outer layer
A ball grid array for a flip-chip assembly is disclosed. The ball grid array includes a plurality of bumps bonded between an active surface of a semiconductor die and a top surface of a printed...
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6892925 |
Solder hierarchy for lead free solder joint
A lead free solder hierarchy for use in the second level solder connection of electronic components such as joining an electronic module to a circuit board. An off-eutectic solder concentration of...
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6890793 |
Method for producing a semiconductor die package using leadframe with locating holes
A method for producing a die package is disclosed. A bumped die comprises solder bumps mounted to a leadframe including a first lead comprising a first locating hole and a second lead comprising a...
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6890844 |
Methods and apparatus for forming solder balls
Methods and apparatus for forming a plurality of uniformly sized solder balls utilize a stencil having a plurality of holes of uniform volume disposed on a substrate. Solder is disposed in the...
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6890794 |
Flip chip with novel power and ground arrangement
A method of forming a flip chip device comprises providing a semiconductor die having a core area and a periphery area. The periphery area includes an electrostatic discharge (ESD) structure. The...
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6887776 |
Methods to form metal lines using selective electrochemical deposition
Methods are provided for forming a transistor for use in an active matrix liquid crystal display (AMLCD). In one aspect a method is provided for processing a substrate including providing a glass...
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6884708 |
Method of partially plating substrate for electronic devices
The object of the present invention is to provide a free and precise control of the plating amount while easily determining a selected portion to be plated. Small balls 24 are arranged at, and...
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6884650 |
Side-bonding method of flip-chip semiconductor device, MEMS device package and package method using the same
A side-bonding method of a flip-chip semiconductor device, a MEMS device package and a package method using the same, in which firm bonding and insensitivity to surface roughness may be obtained,...
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6884642 |
Wafer-level testing apparatus and method
A semiconductor component configured for wafer-level testing includes a semiconductor die having at least one die contact electrically exposed for coupling with a redistribution circuit that...
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6882901 |
Ultra-precision robotic system
A multiple degree-of-freedom ultra-precision (DOF) robotic system yielding either rigid body guidance or large deformation analysis (LDRS, i.e. semi-flexible and flexible robotics) is developed...
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6881612 |
Method of bonding a semiconductor element to a substrate
A conductive member is provided on each of electrodes of a semiconductor element. The conductive member is pressed into a shape having a height of approximately two-thirds of the original height to...
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6881662 |
Pattern formation process for an integrated circuit substrate
A pattern formation process for an integrated circuit substrate, which is not employing the conventional method of filling resin material directly in via filling process but adapting the metal...
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6881654 |
Solder bump structure and laser repair process for memory device
A solder bump structure and laser repair process for memory device include forming a first dielectric layer on a bump pad of a semiconductor wafer. After that, the first dielectric layer is etched...
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6879048 |
Glass frit wafer bonding process and packages formed thereby
A method of glass frit bonding wafers to form a package, in which the width of the glass bond line between the wafers is minimized to reduce package size. The method entails the use of a glass frit...
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6878633 |
Flip-chip structure and method for high quality inductors and transformers
A structure and method for achieving a flip-chip semiconductor device having plated copper inductors ( 4 ), transformers ( 16 ), interconnect, and power busing that is electrically superior, lower...
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6878396 |
Micro C-4 semiconductor die and method for depositing connection sites thereon
A semiconductor die having multiple solder bumps, each having a diameter less than about 100 microns, and the method for making such a die are described. The solder bumps are preferably about 10...
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6875681 |
Wafer passivation structure and method of fabrication
A wafer passivation structure and its method of fabrication is described. According to one embodiment of the present invention a metal layer having a bond pad spaced by a gap from a metal member is...
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6875682 |
Mesh pad structure to eliminate IMD crack on pad
A method is disclosed of forming a bonding pad that is immune to IMD cracking. A partially processed semiconductor wafer is provided having all metal levels completed. A blank dielectric layer is...
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6872650 |
Ball electrode forming method
A ball electrode forming method comprises steps of: preparing a semiconductor apparatus having a plurality of electrode pads; arranging a mask having an upper surface and a lower surface, an area...
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6872590 |
Package substrate for electrolytic leadless plating and manufacturing method thereof
Disclosed is a package substrate for electrolytic leadless plating, characterized in that a wire bonding pad onto which a semiconductor chip is mounted is subjected to electrolytic leadless Au...
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6872592 |
Methods for providing an integrated circuit package with an alignment mechanism
An integrated circuit package is provided with an alignment mechanism by 1) heating a wetting media that has been applied to a number of annular ring shaped alignment pads provided on the...
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6869809 |
Wafer level testing and bumping process
A wafer level testing and bumping process is provided. A plurality of test pads serving as testing point for testing and analyzing the circuits within the wafer is formed on the active surface of...
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6869838 |
Deposition of passivation layers for active matrix liquid crystal display (AMLCD) applications
A method of passivation layer deposition using a cyclical deposition process is described. The cyclical deposition process may comprise alternately adsorbing a silicon-containing precursor and a...
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6869822 |
Method of making a semiconductor device with adhesive sealing subjected to two-fold hardening
According to a method of making a semiconductor device, a semiconductor chip is bonded to a substrate via bumps by flip-chip bonding. Then, a sealing adhesive composition is loaded between the...
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6867124 |
Integrated circuit packaging design and method
A system may direct first energy to only a first interconnect element, the first interconnect element contacting a first conductive contact of a first device and a second conductive contact of a...
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6867121 |
Method of apparatus for interconnecting a relatively fine pitch circuit layer and adjacent power plane(s) in a laminated construction
The present invention provides for a method of interconnecting a bumped circuit having relatively fine traces to an overlying conductive layer of a laminated circuit assembly. The overlying...
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6867122 |
Redistribution process
A redistribution process is described. A wafer is provided, wherein a first titanium layer, a first copper layer and a second titanium are sequentially formed over the surface of the wafer. The...
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6867123 |
Semiconductor integrated circuit device and its manufacturing method
A semiconductor wafer which has finished formation of a relocating wiring layer thereon is stored and after determination of a design, solder bumps are formed over bump lands (one end of the...
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6867503 |
Controlling interdiffusion rates in metal interconnection structures
A metal interconnection structure for semiconductor chips has a metal interface layer ( 105 ), preferably nickel, deposited over the metal of the chip contact pad ( 104 , usually aluminum or...
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6864165 |
Method of fabricating integrated electronic chip with an interconnect device
A method is described for forming an integrated structure, including a semiconductor device and connectors for connecting to a motherboard. A first layer is formed on a plate transparent to...
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6864166 |
Method of manufacturing wire bonded microelectronic device assemblies
Aspects of the invention provide microelectronic device assemblies including microelectronic components wire bonded to substrates, and methods of forming such assemblies. In one embodiment of the...
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6861295 |
Low-pin-count chip package and manufacturing method thereof
A low-pin-count chip package including a die pad for receiving a semiconductor chip and a plurality of connection pads electrically coupled to the semiconductor chip. The semiconductor chip, the...
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6861344 |
Method of manufacturing a semiconductor integrated circuit device
The corrosion of a pad portion on TEG is prevented, and the wettability of a solder and the shear strength after solder formation of a pad portion of an actual device are improved. A third layer...
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6861343 |
Buffer metal layer
An integrated circuit having a top passivation layer and bonding pads, where the improvement is a metal layer overlying all of the integrated circuit. The metal layer overlies the top passivation...
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6858475 |
Method of forming an integrated circuit substrate
A method of forming an integrated circuit substrate that may be adapted to be attached to one or more electronic components. The method includes applying a resist to a back side of a substrate...
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6855623 |
Recessed tape and method for forming a BGA assembly
A system for attaching a plurality of solder balls to an electronic device is disclosed. The system includes, in one embodiment, a heat-resistant tape having a first side comprising a plurality of...
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6853058 |
Process for providing electrical connection between a semiconductor die and a semiconductor die receiving member
A semiconductor package assembly is disclosed having a semiconductor die receiving member configured to accept a semiconductor die in either the flip-chip or the wirebond orientations. First...
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6852571 |
Method of manufacturing stacked semiconductor device
Flux is supplied to the surface of each land by a flux supplying apparatus. A solder ball having a predetermined size is supplied onto a land by using a ball supplying apparatus. A memory IC is...
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6852616 |
Semiconductor device and method for producing the same
A first element electrode and a second element electrode connected electrically to a semiconductor element on a substrate are formed, and then an insulating film is formed on the substrate...
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6849533 |
Method for fabricating microelectronic product with attenuated bond pad corrosion
A method for fabricating a microelectronic product provides for forming a planarizing layer upon a bond pad and a topographic feature, both formed laterally separated over a substrate. The...
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6849944 |
Using a supporting structure to control collapse of a die towards a die pad during a reflow process for coupling the die to the die pad
In one embodiment, an integrated circuit package includes a die associated with an integrated circuit and a die pad. The die has a bottom surface, and the pad has a top surface opposite the bottom...
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6844254 |
Semiconductor device having bonding pad electrode of multi-layer structure
A semiconductor device having bonding pad electrode or electrodes of a multi-layer structure. The bonding pad electrode comprises a lower electrode layer formed on a semiconductor substrate, and a...
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6844235 |
Reticle repeater monitor wafer and method for verifying reticles
According to one embodiment, verifying a reticle may include patterning an inspected layer ( 102 - 2 ) according to a reticle pattern, depositing a contrast enhancing layer ( 104 - 0 ) on a...
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6844216 |
Method of attaching solder balls to BGA package utilizing a tool to pick and dip the solder ball in flux
A method of attaching solder balls to a BGA package using a ball pickup tool. An array of solder balls is formed on a first substrate for interconnecting with conductive sites on another substrate....
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6841415 |
Flip chip mounting method which avoids void formation between a semiconductor chip and a substrate
The present invention is to provide a flip chip mounting method which does not cause void formation between a semiconductor chip and a substrate, and in the flip chip mounting method, the method...
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6841478 |
Method of forming a multi-layered copper bond pad for an integrated circuit
A multi layered copper bond pad for a semiconductor die which inhibits formation of copper oxide is disclosed. A small dose of titanium is implanted in the copper surface. The implanted titanium...
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6841462 |
Method of manufacturing semiconductor chip having supporting member
A semiconductor chip includes a substrate having a main surface, the main surface including a flame-shaped first area, which is along sides of the main surface, and a second area encompassed by the...
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6830999 |
Method of fabricating flip chip semiconductor device utilizing polymer layer for reducing thermal expansion coefficient differential
An improved flip chip assembly is disclosed of the type where a semiconductor chip having a certain thermal expansion coefficient is directly mounted via solder bumps on the metallization pattern...
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