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7601564 |
Semiconductor device including memory cell and anti-fuse element
A semiconductor device includes an anti-fuse portion and a memory cell portion each including a MOSFET structure having a gate insulating film formed on a semiconductor substrate and a gate...
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7576407 |
Devices and methods for constructing electrically programmable integrated fuses for low power applications
Electrically programmable integrated fuses are provided for low power applications. Integrated fuse devices have stacked structures with a polysilicon layer and a conductive layer formed on the...
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7575984 |
Conductive hard mask to protect patterned features during trench etch
A method is provided for forming patterned features using a conductive hard mask, where the conductive hard mask protects those features during a subsequent trench etch to form Damascene conductors...
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7572682 |
Semiconductor structure for fuse and anti-fuse applications
A fuse/anti-fuse structure is provided in which programming of the anti-fuse is caused by an electromigation induced hillock that is formed adjacent to the fuse element. The hillock ruptures a thin...
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7569429 |
Antifuse having uniform dielectric thickness and method for fabricating the same
Disclosed are an antifuse having a uniform amorphous silicon (antifuse material) thickness and a method for fabricating such an antifuse device. The antifuse is located between overlying and...
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7547335 |
Metal polishing composition and method of polishing using the same
A metal polishing composition comprising at least one of the compound represented by formula (1) defined herein and the compound represented by formula (2) defined herein, and an oxidizing agent,...
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7534713 |
High density chalcogenide memory cells
A non-volatile memory cell is constructed from a chalcogenide alloy structure and an associated electrode side wall. The electrode is manufactured with a predetermined thickness and juxtaposed...
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7531388 |
Electrically programmable fuse structures with narrowed width regions configured to enhance current crowding and methods of fabricating thereof
Electrically programmable fuse structures and methods of fabrication thereof are presented, wherein a fuse includes first and second terminal portions interconnected by an elongate fuse element....
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7528015 |
Tunable antifuse element and method of manufacture
A tunable antifuse element ( 102, 202, 204, 504, 952 ) and method of fabricating the tunable antifuse element, including a substrate material ( 101 ) having an active area ( 106 ) formed in a...
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7511352 |
Rail Schottky device and method of making
A monolithic three dimensional memory array comprising Schottky diodes components separated by antifuses is disclosed. The Schottky diodes are vertically oriented and disposed on alternating...
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7507607 |
Method of forming a silicide bridged anti-fuse with a tungsten plug metalization process
A silicide bridged anti-fuse and a method of forming the anti-fuse are disclosed. The silicide bridged anti-fuse can be formed with a tungsten plug metalization process that does not require any...
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7492032 |
Fuse regions of a semiconductor memory device and methods of fabricating the same
A device and method of manufacturing a fuse region are disclosed. The fuse region may include an interlayer insulating layer formed on a substrate, a plurality of fuses disposed on the interlayer...
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7485559 |
Semiconductor device and method of fabricating the same
A semiconductor device and methods thereof. The semiconductor device includes a first layer formed on a substrate, the first layer having a higher conductivity. The semiconductor device further...
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7468296 |
Thin film germanium diode with low reverse breakdown
In fabricating an electronic structure, a substrate is provided, and a first barrier layer is provided on the substrate. A germanium thin film diode is provided on the first barrier layer, and a...
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7442626 |
Rectangular contact used as a low voltage fuse element
A repair fuse element and method of construction are disclosed that eliminate or substantially reduce the disadvantages and problems associated with prior fuse elements. In one embodiment, the fuse...
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7393722 |
Reprogrammable metal-to-metal antifuse employing carbon-containing antifuse material
A reprogrammable metal-to-metal antifuse is disposed between two metal interconnect layers in an integrated circuit. A lower barrier layer is formed from Ti. A lower adhesion-promoting layer is...
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7393721 |
Semiconductor chip with metallization levels, and a method for formation in interconnect structures
A metallization surface ( 5 ), which acts as an etching stop layer during the production of openings ( 4 ) in a passivation layer ( 3 ) applied to its upper face and protects an interconnect...
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7351613 |
Method of trimming semiconductor elements with electrical resistance feedback
A method of trimming down the volume of a semiconductor resistor element using electrical resistance feedback. After forming conductive material disposed between a pair of electrodes, a voltage is...
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7329565 |
Silicide-silicon oxide-semiconductor antifuse device and method of making
An antifuse contains a first silicide layer, a grown silicon oxide antifuse layer on a first surface of the first silicide layer, and a first semiconductor layer having a first surface in contact...
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7272067 |
Electrically-programmable integrated circuit antifuses
Integrated circuit antifuse circuitry is provided. A metal-oxide-semiconductor (MOS) antifuse transistor serves as an electrically-programmable antifuse. In its unprogrammed state, the antifuse...
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7269898 |
Method for making an edge intensive antifuse
An antifuse including a bottom plate having a plurality of longitudinal members arranged substantially parallel to a first axis, a dielectric layer formed on the bottom plate, and a top plate...
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7227238 |
Integrated fuse with regions of different doping within the fuse neck
An integrated fuse has regions of different doping located within a fuse neck. The integrated fuse includes a polysilicon layer and a silicide layer. The polysilicon layer includes first and second...
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7226816 |
Method of forming connection and anti-fuse in layered substrate such as SOI
An anti-fuse structure that can be programmed at low voltage and current and which potentially consumes very little chip spaces and can be formed interstitially between elements spaced by a minimum...
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7210224 |
Method for forming an antifuse
An antifuse including a bottom plate having a plurality of longitudinal members arranged substantially parallel to a first axis, a dielectric layer formed on the bottom plate, and a top plate...
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7183141 |
Reversible field-programmable electric interconnects
A programmable interconnect structure and method of operating the same provides a programmable interconnection between electrical contacts. The interconnect includes material that has a reversibly...
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7176065 |
Magnetic tunneling junction antifuse device
An MRAM device having a plurality of MRAM cells formed of a fixed magnetic layer, a second soft magnetic layer and a dielectric layer interposed between the fixed magnetic layer and the soft...
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7176064 |
Memory cell comprising a semiconductor junction diode crystallized adjacent to a silicide
A memory cell is formed of a semiconductor junction diode in series with an antifuse. The cell is programmed by rupture of the antifuse. The semiconductor junction diode comprises silicon, the...
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7173317 |
Electrical and thermal contact for use in semiconductor devices
An electrical and thermal contact for use in a semiconductor device. The electrical and thermal contact includes an intermediate conductive layer, an insulator component, and a contact layer. The...
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7132350 |
Method for manufacturing a programmable eraseless memory
A method for manufacturing an electrically programmable non-volatile memory cell comprises forming a first electrode on a substrate, forming an inter-electrode layer of material on the first...
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7115493 |
Antifuse structures, methods, and applications
A typical integrated circuit includes millions of microscopic transistors, resistors, and other components interconnected to define a circuit, for example a memory circuit. Occasionally, one or...
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7098083 |
High impedance antifuse
A programmable element that has a first diode having an electrode and a first insulator disposed between the substrate and said electrode of said first device, said first insulator having a first...
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7081377 |
Three-dimensional memory
A 3D semiconductor memory is described having rail-stacks which define conductive lines and cells. The memory levels are organized in pairs with each pair showing common lines in adjacent levels.
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7030459 |
Three-dimensional memory structure and manufacturing method thereof
A three-dimensional memory structure and manufacturing method thereof is provided. A first stack layer is formed over a substrate. The first stack layer includes, from the substrate upwards, an...
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7026217 |
Method of forming an antifuse on a semiconductor substrate using wet oxidation of a nitrided substrate
A method of producing an antifuse includes introducing nitrogen by ion implantation means into the substrate. An oxide dielectric layer is then formed on the nitrided substrate in a wet oxidation...
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7022572 |
Manufacturing method for integrated circuit having disturb-free programming of passive element memory cells
In a passive element memory array, such as a rail stack array having a continuous semiconductor region along one or both of the array lines, programming a memory cell may disturb nearby memory...
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7015076 |
Selectable open circuit and anti-fuse element, and fabrication method therefor
A method is provided of forming an integrated circuit with a semiconductor substrate that is doped with a set concentration of an oxidizable dopant of a type that segregates to the top surface of a...
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7012021 |
Method for end point detection polysilicon chemical mechanical polishing in an anti-fuse memory device
A new method to polish down conductive lines in the manufacture of an integrated circuit device is achieved. The method comprises providing a plurality of conductive lines overlying a substrate. A...
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7009891 |
System and method for one-time programmed memory through direct-tunneling oxide breakdown
A one-time programming memory element, capable of being manufactured in a 0.13 μm or below CMOS technology, having a capacitor, or transistor configured as a capacitor, with an oxide layer capable...
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6982218 |
Method of producing a semiconductor-metal contact through a dielectric layer
A method of electrically contacting a semiconductor layer ( 13 ) coated with at least one dielectic layer ( 12 ) which is coated with a metal layer the metal layer ( 11 ) is applied on the...
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6979880 |
Scalable high performance antifuse structure and process
Systems and methods are provided for a scalable high-performance antifuse structure and process that has a low RC component, a uniform dielectric breakdown, and a very low, effective dielectric...
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6972220 |
Structures and methods of anti-fuse formation in SOI
An anti-fuse structure that can be programmed at low voltage and current and which potentially consumes very little chip spaces and can be formed interstitially between elements spaced by a minimum...
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6964906 |
Programmable element with selectively conductive dopant and method for programming same
A programmable element including a semiconductor material doped with a dopant that alters the resistance of the element when exposed to actinic radiation. Rather than producing a mechanical...
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6940170 |
Techniques for triple and quadruple damascene fabrication
The present invention provides integrated circuit fabrication methods and devices wherein triple damascene structures are formed in five consecutive dielectric layers ( 312, 314, 316, 318 and 320...
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6933611 |
Selective solder bump application
Selective application of solder bumps in an integrated circuit package. Solder bumps are selectively applied in a solder bump integrated circuit packaging process so that portions of a circuit can...
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6919234 |
Method for producing an antifuse in a substrate and an antifuse structure for integration in a substrate
Method for producing an antifuse in a substrate, a first interconnect being applied to the substrate, a dielectric layer being applied at an end face of the first interconnect, which end face...
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6893951 |
Vertical interconnection structure and methods
Interconnection structures for integrated circuits have first cells disposed in a first plane, at least second cells disposed in at least a second plane parallel to the first plane, and vertical...
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6861727 |
Antifuse structures, methods, and applications
A typical integrated circuit includes millions of microscopic transistors, resistors, and other components interconnected to define a circuit, for example a memory circuit. Occasionally, one or...
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6844609 |
Antifuse with electrostatic assist
A structure and method for providing an antifuse which is closed by laser energy with an electrostatic assist. Two or more metal segments are formed over a semiconductor structure with an air gap...
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6815264 |
Antifuses
A method of producing an antifuse, comprises the steps of: depositing a layer of undoped or lightly doped polysilicon on a layer of silicon dioxide on a semiconductor wafer; doping one region of...
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6812122 |
Method for forming a voltage programming element
Method for forming a first one time, voltage programmable logic element in a semiconductor substrate of first conductivity type, forming a first layer beneath a surface of the substrate, the first...
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