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7632747 Conductive structures for microfeature devices and methods for fabricating microfeature devices  
Methods for fabricating conductive structures on and/or in interposing devices and microfeature devices that are formed using such methods are disclosed herein. In one embodiment, a method for...
7629250 Method for creating electrically conductive elements for semiconductor device structures using laser ablation processes and methods of fabricating semiconductor device assemblies  
A method for forming at least one conductive element is disclosed. Particularly, a semiconductor substrate, including a plurality of semiconductor dice thereon, may be provided and a dielectric...
7622375 Conductive member and process of producing the same  
Provided are a method of manufacturing an electrically conductive member having excellent properties and such electrically conductive member. A method of manufacturing an electrically conductive...
7615439 Damascene process for carbon memory element with MIIM diode  
Forming a metal-insulator diode and carbon memory element in a single damascene process is disclosed. A trench having a bottom and a sidewall is formed in an insulator. A first diode electrode is...
7611981 Optimized circuit design layout for high performance ball grid array packages  
A method of laying out traces for connection of bond pads of a semiconductor chip to a printed wiring board or the like and the layout. There is provided a substrate having top and bottom surfaces...
7595222 Semiconductor device and manufacturing method thereof  
The semiconductor device includes a first semiconductor chip having first electrodes on a fringe region of a main surface thereof, and a second semiconductor chip smaller in area than the first...
7582566 Method for redirecting void diffusion away from vias in an integrated circuit design  
A method for redirecting void diffusion away from vias in an integrated circuit design includes steps of forming an electrical conductor in a first electrically conductive layer of an integrated...
7575999 Method for creating conductive elements for semiconductor device structures using laser ablation processes and methods of fabricating semiconductor device assemblies  
A method for forming at least one conductive element is disclosed. Particularly, a semiconductor substrate, including a plurality of semiconductor dice thereon, may be provided and a dielectric...
7531439 Method for forming an integrated semiconductor circuit arrangement  
Methods for forming an integrated semiconductor circuit arrangement are disclosed. In one embodiment, a semiconductor circuit with a first semiconductor circuit region and with a second...
7524753 Semiconductor device having through electrode and method of manufacturing the same  
A method of manufacturing a semiconductor device having a through electrode, includes forming through holes 36 in a substrate 31 , forming a first metal layer 39 from one surface side of the...
7524763 Fabrication method of wafer level chip scale packages  
A method of fabricating wafer level chip scale packages may involve forming a hole to penetrate through a chip pad of an IC chip. A base metal layer may be formed on a first face of a wafer to...
7521276 Compliant terminal mountings with vented spaces and methods  
A method of making chip assemblies includes providing an in-process assembly including a semiconductor wafer, a wafer compliant structure overlying a front surface of the wafer and cavities, and...
7521358 Process integration scheme to lower overall dielectric constant in BEoL interconnect structures  
Back-End of Line (BEoL) interconnect structures, and methods for their manufacture, are provided. The structures are characterized by narrower conductive lines and reduced overall dielectric...
7517794 Method for fabricating nanoscale features  
One embodiment of the present invention is a method for fabricating a nanoscale shift register. In a described embodiment, a nanoimprinting-resist layer applied above a silicon-on-insulator...
7504287 Methods for fabricating an integrated circuit  
A method is provided for fabricating a semiconductor device which includes a first contact point and a second contact point located above the first contact point. A first material layer is...
7498206 Order receiving process for manufacturing a semiconductor display device  
Irrespective of a specification of the controller, a plurality of TFTs are formed for the controller on a substrate in advance. Then, in accordance with a design of the controller, connection is...
7494909 Method of manufacturing a chip  
Provided are a chip, a chip stack, and a method of manufacturing the same. A plurality of chips which each include: at least one pad formed on a wafer; and a metal layer which protrudes up to a...
7491636 Methods for forming flexible column die interconnects and resulting structures  
A flexible column interconnect for a microelectronic substrate includes a plurality of conductive columns extending from a bond pad or other conductive terminal in substantially mutually parallel...
7446030 Methods for fabricating current-carrying structures using voltage switchable dielectric materials  
A method is provided for fabricating current-carrying formation on substrates. The method includes providing a substrate including a layer of a voltage switchable dielectric material, forming a...
7439168 Apparatus and method of forming silicide in a localized manner  
Localized trenches or access holes are milled in a semiconductor substrate to define access points to structures of an integrated circuit intended for circuit editing. A conductor is deposited,...
7439623 Semiconductor device having via connecting between interconnects  
A first insulating film is provided between a lower interconnect and an upper interconnect. The lower interconnect and the upper interconnect are connected to each other by way of a via formed in...
7435674 Dielectric interconnect structures and methods for forming the same  
Dielectric interconnect structures and methods for forming the same are provided. Specifically, the present invention provides a dielectric interconnect structure having a noble metal layer (e.g.,...
7410892 Methods of fabricating integrated circuit devices having self-aligned contact structures  
An integrated circuit device, e.g., a memory device, includes a substrate, a first insulation layer on the substrate, and a contact pad disposed in the first insulation layer in direct contact with...
7393770 Backside method for fabricating semiconductor components with conductive interconnects  
A backside method for fabricating a semiconductor component with a conductive interconnect includes the step of providing a semiconductor substrate having a circuit side, a backside, and a...
7391117 Method for fabricating semiconductor components with conductive spring contacts  
An interconnect for testing a semiconductor component includes a substrate, and interconnect contacts on the substrate configured to electrically engage component contacts on a semiconductor...
7368767 Semiconductor integrated circuit device formed by automatic layout wiring by use of standard cells and design method of fixing its well potential  
A standard cell is read from a library and automatic layout wiring is performed, thereby configuring a circuit. Next, each cell column in the configured circuit is searched for an empty region. In...
7354842 Methods of forming conductive materials  
The invention includes a method of forming a metal-comprising mass for a semiconductor construction. A semiconductor substrate is provided, and a metallo-organic precursor is provided proximate the...
7348270 Techniques for forming interconnects  
A method for forming interconnects onto attachment points of a wafer includes the steps of providing a mold with a plurality of cavities having a predetermined shape, depositing a release agent on...
7316971 Wire bond pads  
A wire bond pad and method of fabricating the wire bond pad. The method including: providing a substrate; forming an electrically conductive layer on a top surface of the substrate; patterning the...
7314821 Method for fabricating a semiconductor interconnect having conductive spring contacts  
An interconnect for testing a semiconductor component includes a substrate, and interconnect contacts on the substrate configured to electrically engage component contacts on a semiconductor...
7271086 Microfeature workpieces and methods of forming a redistribution layer on microfeature workpieces  
Methods for forming a redistribution layer on microfeature workpieces, and microfeature workpieces having such a redistribution layer are disclosed herein. In one embodiment, a method includes...
7271095 Process for producing metallic interconnects and contact surfaces on electronic components  
A process produces metallic interconnects and contact surfaces on electronic components using a copper-nickel-gold layer structure. The copper core of the interconnects and contact surfaces is...
7253087 Method of producing thin-film device, electro-optical device, and electronic apparatus  
The invention provides a transfer technique by which the dimensional precision of a thin-film device is not deteriorated, even if the device is produced by transferring a fine structure or a...
7229878 Phototransistor of CMOS image sensor and method for fabricating the same  
A phototransistor of a CMOS image sensor suitable for decreasing the size of layout, and a method for fabricating the phototransistor are disclosed, in which the phototransistor includes a first...
7214594 Method of making semiconductor device using a novel interconnect cladding layer  
A method and apparatus are provided an interconnect cladding layer. In one embodiment, a first sacrificial layer is deposited over a substrate and patterned. In the vias created during the...
7214325 Method of fabricating ohmic contact on n-type gallium nitride (GaN) of room temperature by plasma surface treatment  
Forming low contract resistance metal contacts on GaN films by treating a GaN surface using a chlorine gas Inductively Coupled Plasma (ICP) etch process before the metal contacts are formed....
7172966 Method for fabricating metallic interconnects on electronic components  
The invention, which relates to a method for fabricating metallic interconnects with copper-nickel-gold layer construction on electronic components, is based on the object of specifying a method by...
7169691 Method of fabricating wafer-level packaging with sidewall passivation and related apparatus  
A method of fabricating a chip-scale or wafer-level package having passivation layers on substantially all surfaces thereof to form a hermetically sealed package. The package may be formed by...
7166515 Implanted hidden interconnections in a semiconductor device for preventing reverse engineering  
A camouflaged interconnection for interconnecting two spaced-apart regions of a common conductivity type in an integrated circuit or device and a method of forming same. The camouflaged...
7166493 Package with integrated inductor and/or capacitor  
Methods for attaching two wafers are presented along with devices resulting from such methods. In one illustrative embodiment, a first wafer is provided having pillars for conducting an electric...
7163883 Edge seal for a semiconductor device  
An edge seal around the periphery of an integrated circuit device which environmentally protects the copper circuitry from cracks that may form in the low-k interlevel dielectric during dicing. The...
7161195 Semiconductor device and fabrication process thereof  
A semiconductor device includes a substrate having first and second device regions separated from each other by a device isolation region, a first field effect transistor having a first polysilicon...
7157372 Coaxial through chip connection  
A method performed on a wafer having multiple chips, each including a doped semiconductor and substrate, involves etching an annulus trench partially into the substrate, metalizing the annulus...
7148088 Memory structure and method making  
A memory structure has a plurality of row conductors intersecting a plurality of column conductors at a plurality of intersections. Each intersection includes an electrically linear resistive...
7144800 Multichip packages with exposed dice  
Multichip packages and methods for making same. The present invention generally allows for either the back of a flipchip, the back of a mother die, or both to be exposed in a multichip package....
7129157 Method for fabricating an integrated circuit  
In an integrated circuit having a first circuit part and at least one second circuit part, which is assigned to a specific functionality of the first circuit part, on one and the same silicon...
7129156 Method for fabricating a silicon carbide interconnect for semiconductor components using heating  
An interconnect for semiconductor components includes a substrate, and interconnect contacts on the substrate for electrically engaging component contacts on the components. The interconnect...
7122456 Method for reduced input output area  
An input output ring for a semiconductor device is disclosed that uses power buffers having widths that vary from the widths of the input and output buffers. In one embodiment, the pitches between...
7119001 Semiconductor chip packages and methods for fabricating the same  
Semiconductor chip packages of a wafer level and method for fabricating the same are disclosed, in which a wafer electrode pad is connected with an external circuit by a via-electrode penetrating a...
7119000 Method of manufacturing semiconductor device  
The resist film is provided on the surface of the substrate having electrodes, and openings are provided in the resist film at positions of the electrodes on the substrate. The first metal is...
Matches 1 - 50 out of 285 1 2 3 4 5 6 >