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6939801 |
Selective deposition of a barrier layer on a dielectric material
A method to selectively deposit a barrier layer on dielectric material that surrounds one or more metal interconnects on a substrate is disclosed. The barrier layer is selectively deposited on the...
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6933228 |
Method of manufacturing of contact plug in a contact hole on a silicon substrate
A method of manufacturing a semiconductor device comprising the steps of: forming an insulating layer on a silicon substrate; forming a contact hole on the insulating layer; forming a nitride layer...
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6933595 |
Electronic device and leadframe and methods for producing the electronic device and the leadframe
The invention relates to an electronic device and a leadframe and to methods for producing the electronic device and the leadframe. The electronic device has a semiconductor chip with a top side...
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6929987 |
Microelectronic device fabrication method
In a method of forming a semiconductor device with a first channel layer formed over a portion of a second channel layer, a portion of the second channel underlying the first channel is etched so...
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6930901 |
Method of selectively forming local interconnects using design rules
The invention includes a method of fabricating a circuit in a manner to place certain structures within a predefined distance of one another. Electrical connections are formed between certain...
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6921713 |
Semiconductor chip package with interconnect structure
An active microelectronic element such as a semiconductor chip or wafer is bonded to an interconnect element having substantially the same coefficient of thermal expansion as the active element...
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6913988 |
Methods for fabricating semiconductor device test apparatus that include protective structures for intermediate conductive elements
A method for fabricating apparatus for testing semiconductor devices includes forming protective structures for bond wires or other intermediate conductive elements thereof by sequentially...
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6910637 |
Stacked small memory card
A stacked small memory card includes an upper memory card and a lower memory card, the upper memory card and the lower memory card respectively formed a first heat sink and a second heat sink, the...
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6908840 |
Method of filling bit line contact via
A method of filling a bit line contact via. The method includes providing a substrate having a transistor, with a gate electrode, drain region, and source region, on the substrate, forming a first...
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6905984 |
MEMS based contact conductivity electrostatic chuck
The present invention is directed to a method for clamping and processing a semiconductor substrate using a semiconductor processing apparatus. According to one aspect of the present invention, a...
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6897135 |
Method for fabricating metal interconnections
In the present method for fabricating metal interconnections, a Ni film is deposited on an insulating substrate by electroless plating, and a photoresist film is formed in a specified pattern on...
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6897151 |
Methods of filling a feature on a substrate with copper nanocrystals
The invention relates to methods of making monodisperse nanocrystals comprising the steps of reducing a copper salt with a reducing agent, providing a passivating agent comprising a nitrogen and/or...
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6893950 |
Contact structure for an electrically operated II/VI semiconductor element and process for the production thereof
A process for the production of contacts for electrically operated II/VI semiconductor structures (for example laser diodes). The contact materials palladium and gold hitherto used in relation to...
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6887744 |
Method of forming a thin film transistor substrate with a interconnection electrode
A thin film transistor substrate including a semiconductor layer having a source region and a drain region, an insulating film and a gate electrode which are formed on the semiconductor layer, an...
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6872646 |
Method for manufacturing conductive pattern substrate
A conductive pattern is obtained by forming concave-convex on a substrate by using a pattern substrate. A conductive thin layer is formed and then coated with a layer of a photosensitive resin. The...
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6852619 |
Dual damascene semiconductor devices
A semiconductor device has a wiring slot and two wiring layers connected by a via hole. The semiconductor device is formed using a photodegradable polymer film that degrades under UV radiation. An...
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6849953 |
Microelectronic assemblies with composite conductive elements
A microelectronic assembly includes composite conductive elements, each incorporating a core and a coating of a low-melting conductive material. The composite conductive elements interconnect...
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6844248 |
Method of doping silicon, metal doped silicon, method of making solar cells, and solar cells
A low temperature process for forming a metal doped silicon layer in which a silicon layer is deposited onto a substrate at low temperatures, with a metal doping layer then deposited upon the...
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6841442 |
Method for forming metal contact of semiconductor device
Disclosed is a method for forming a metal contact of a semiconductor device. The method includes the steps of preparing a substrate formed with a tungsten bit line, forming an insulating interlayer...
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6835641 |
Method of forming single sided conductor and semiconductor device having the same
A method of forming a single sided conductor and a semiconductor device having the same is provided. The method includes providing a substrate having an opening. The opening exposes a sidewall and...
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6833308 |
Structure and method for dual gate oxide thicknesses
Structures and methods involving at least a pair of gate oxides having different thicknesses, one suitable for use in a logic device and one suitable for use in a memory device, have been shown....
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6825107 |
Method for fabricating a memory chip
An ovonic phase-change semiconductor memory device having a reduced area of contact between electrodes of chalcogenide memories, and methods of forming the same. Such memory devices are formed by...
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6821872 |
Method of making a bit line contact device
A method for making a bit line contact on a substrate is provided. Two gate conductor stacks are formed on a main surface of the substrate in close proximity to each other. A bit line contact...
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6821879 |
Copper interconnect by immersion/electroless plating in dual damascene process
The invention is directed to a fabrication method of copper interconnects using dual damascene processing. Using silicon to provide an active surface, palladium can be selectively deposited on...
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6821875 |
Low area metal contacts for photovoltaic devices
In a method for forming a contact on semiconductor surface, a crystalline silicon surface is first oxidized, following which an aluminium layer is deposited onto the oxide layer. A layer of...
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6822332 |
Fine line circuitization
A circuitized substrate and a method of making the circuitized substrate is provided. The circuitized substrate includes a substrate having a substantially planar upper surface and a conductive...
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6818996 |
Multi-level redistribution layer traces for reducing current crowding in flipchip solder bumps
A multi-level redistribution layer trace reduces current crowding in solder bumps of an integrated circuit package. A multi-level redistribution layer trace for an integrated circuit die includes a...
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6815323 |
Ohmic contacts on n-type silicon carbide using carbon films
Ohmic contact formation inclusive of Carbon films on 4H and 6H n-type Silicon Carbide is disclosed. Contact formation includes an initial RF sputtering to produce an amorphous Carbon film with the...
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6815820 |
Method for forming a semiconductor interconnect with multiple thickness
A conductive line varies in thickness to assist in overcoming RC delays and noise coupling. By varying line thickness, variation in conductor width is avoided if necessary to maintain a specified...
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6815351 |
Method for contacting a semiconductor configuration
A semiconductor configuration with an ohmic contact-connection includes a p-conducting semiconductor region made of silicon carbide. A p-type contact region serves for the contact-connection. The...
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6808975 |
Method for forming a self-aligned contact hole in a semiconductor device
A method for forming a self-aligned contact hole includes forming a plurality of conductive structures on a semiconductor substrate, each conductive structure including a conductive film pattern...
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6809019 |
Method for producing a semiconductor structure, and use of the method
A method for producing a semiconductor structure includes applying at least one first layer, etching the first layer using a masking layer such that fences are produced, and, after removal of the...
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6806104 |
Method for detecting defect of semiconductor device
A method for detecting defects of a semiconductor device is provided. The semiconductor device comprises at least a substrate, a gate, a source region, a drain region, a plug, an insulating layer,...
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6806177 |
Method of making self-aligned borderless contacts
A method for forming high-density self-aligned contacts and interconnect structures in a semiconductor device. A dielectric layer thick enough to contain both interconnect and contact structures is...
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6803286 |
Method of forming a local interconnect
A method of fabricating integrated circuitry comprises forming a conductive line having opposing sidewalls over a semiconductor substrate. An insulating layer is then deposited. The insulating...
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6803241 |
Method of monitoring contact hole of integrated circuit using corona charges
A method of monitoring contact holes of an integrated circuit using corona charges is provided for determining whether the contact holes are open. The method includes transmitting corona charges...
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6803312 |
Semiconductor device and method for fabricating the same
A method for fabricating a semiconductor device includes the steps of forming a mask on a predetermined layer, said mask having a first opening at a given side of the predetermined layer and a...
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6800499 |
Process for preparing a hydrogen sensor
A high-sensitivity Pd/InP hydrogen sensor was made by a) forming an n-type or p-type semiconductor film on a semiconductor substrate; b) forming a patterned first metal electrode on the...
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6800555 |
Wire bonding process for copper-metallized integrated circuits
A robust, reliable and low-cost metal structure and process enabling electrical wire/ribbon connections to the interconnecting copper metallization of integrated circuits. The structure comprises a...
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6794311 |
Method and apparatus for treating low k dielectric layers to reduce diffusion
Methods and apparatus for depositing low dielectric constant layers that are resistant to oxygen diffusion and have low oxygen contents are provided. The layers may be formed by exposing a low...
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6794282 |
Three layer aluminum deposition process for high aspect ratio CL contacts
A method of forming a semiconductor device includes providing a semiconductor device including a conductor formed thereon. A dielectric layer is formed over the conductor and a recess is formed in...
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6794278 |
Method for producing organic thin-film device by use of facing-targets-type sputtering apparatus
Disclosed is a method for forming a thin-film layer, such as a metallic film or a transparent conductive film, on a functional organic layer formed from an organic compound, by means of a...
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6784017 |
Method of creating a high performance organic semiconductor device
A high temperature thermal annealing process creates a low resistance contact between a metal material and an organic material of an organic semiconductor device, which improves the efficiency of...
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6784084 |
Method for fabricating semiconductor device capable of reducing seam generations
The present invention is related to a method for fabricating a semiconductor device capable of preventing occurrences of void and seam phenomena caused by a negative slope of an insulation layer or...
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6781685 |
Process and device for in-situ decontamination of a EUV lithography device
EUV lithography devices do indeed have a vacuum or an inert gas atmosphere in their interior, yet the appearance of hydrocarbons and/or other carbon compounds within the device cannot be fully...
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6780753 |
Airgap for semiconductor devices
Embodiments of the invention generally provide a method of forming an air gap between conductive elements of a semiconductor device, wherein the air gap has a dielectric constant of approximately...
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6780739 |
Bit line contact structure and method for forming the same
A bit line contact structure and method for forming the same. After forming transistors on a substrate, Ti layer, TiN layer and W layer conformally cover the transistors and the substrate. The...
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6780744 |
Stereolithographic methods for securing conductive elements to contacts of semiconductor device components
Stereolithographic methods for fabricating conductive elements and for bonding conductive elements to contacts of semiconductor device components. The conductive elements may include forming...
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6777314 |
Method of forming electrolytic contact pads including layers of copper, nickel, and gold
A method of forming an electrical contact on a surface of a substrate. A first layer of a first electrically conductive material is formed on the surface of the substrate, where the first layer is...
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6774024 |
Semiconductor integrated circuit device having multilevel interconnection
One via contact through which upper and lower interconnections of a multilevel interconnection are connected to each other is provided when the width or volume of the lower interconnection is not...
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