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Match Document Document Title
7524751 Method for forming contact hole in semiconductor device  
Methods for forming a contact hole in a semiconductor device are provided. An exposed portion of an isolation layer, which may be generated during a process of forming a borderless contact hole,...
7524748 Method of interconnecting terminals and method of mounting semiconductor devices  
A method of interconnecting terminals so as to obtain an excellent electrical connection between terminals such as opposing electrodes and a mounting method for semiconductor devices using this...
7524752 Method of manufacturing semiconductor device  
In a method of manufacturing a semiconductor device which method is made up of a process of forming a wiring groove using a hard mask, a metal hard mask 107 is used to form a wiring groove 111 ,...
7521348 Method of fabricating semiconductor device having fine contact holes  
A method for fabricating a semiconductor device having fine contact holes is exemplarily disclosed. The method includes forming an isolation layer defining active regions on a semiconductor...
7521347 Method for forming contact hole in semiconductor device  
A method for forming a contact hole in a semiconductor device includes forming gate lines on a substrate, forming a bit line pattern by forming a bit line and a bit line hard mask in sequential...
7517798 Methods for forming through-wafer interconnects and structures resulting therefrom  
The present invention relates to methods for forming through-wafer interconnects in semiconductor substrates and the resulting structures. In one embodiment, a method for forming a through-wafer...
7517782 Method of forming a metal layer over a patterned dielectric by wet chemical deposition including an electroless and a powered phase  
By performing an electroless deposition and an electro deposition process in situ, highly reliable metallizations may be provided, wherein limitations with respect to contaminations and device...
7514348 Sidewall coverage for copper damascene filling  
A general process is described for filling a hole or trench at the surface of an integrated circuit without trapping voids within the filler material. A particular application is the filling of a...
7514288 Manufacturing methods for thin film fuse phase change ram  
A method for manufacturing a memory device comprises forming an electrode layer on a substrate which comprises circuitry made using front-end-of-line procedures. The electrode layer includes a...
7514347 Interconnect structure and fabricating method thereof  
An interconnect structure is described, disposed on a substrate with a conductive part thereon and including a first porous low-k layer on the substrate, a damascene structure in the first porous...
7510323 Multi-layered thermal sensor for integrated circuits and other layered structures  
A compact resistive thermal sensor is provided for an integrated circuit (IC), wherein different sensor components are placed on different layers of the IC. This allows the lateral area needed for...
7510967 Method for manufacturing semiconductor device  
The present invention relates to a method for manufacturing a semiconductor device, comprising: forming a metal interconnect on a substrate; forming a refractory metal layer containing titanium...
7508078 Electronic device, method for manufacturing electronic device, contact hole of electronic device, method for forming contact hole of electronic device  
An electronic device includes a substrate, a first conductive material layer formed on the substrate, a patterning layer formed on the first conductive material layer, the patterning layer...
7498249 Method of forming a connecting conductor and wirings of a semiconductor chip  
A resist post is formed on a connection pad of a semiconductor chip, and the semiconductor chip and the resist post are covered by a heat resistant insulating layer. A surface of the insulating...
7498250 Shapes-based migration of aluminum designs to copper damascene  
An interconnect structure, method of fabricating the interconnect structure and method of designing the interconnect structure for use in semiconductor devices. The interconnect structure includes...
7494834 Method of manufacturing a transparent element including transparent electrodes  
Method of manufacturing a transparent element including transparent electrodes, said method including the steps of: depositing over at least one part of the surface of a transparent...
7494907 Nanoscale electronic devices and fabrication methods  
The invention relates to a method of forming a conducting nanowire between two contacts on a substrate surface wherein a plurality of nanoparticles is deposited on the substrate in the region...
7494908 Apparatus for integration of barrier layer and seed layer  
A system for processing a substrate is provided which includes at least one atomic layer deposition (ALD) chamber for depositing a barrier layer containing tantalum and at least one physical vapor...
7491643 Method and structure for reducing contact resistance between silicide contact and overlying metallization  
A semiconductor structure in which the contact resistance in the contact opening is reduced as well as a method of forming the same are provided. This is achieved in the present invention by...
7488684 Organic aluminum precursor and method of forming a metal wire using the same  
An organic aluminum precursor includes aluminum as a central metal, and borohydride and trimethylamine as ligands. In a method of forming an aluminum layer or wire, the organic aluminum presursor...
7488682 High-density 3-dimensional resistors  
Interconnect, i.e., BEOL structures comprising at least one thin film resistor that is located at the same level as that of a neighboring conductive interconnect are provided. The present invention...
7485581 Device with gaps for capacitance reduction  
A method for reducing capacitances between semiconductor devices is provided. A plurality of contact structures is formed in a dielectric layer. A mask is formed to cover the contact structures...
7485559 Semiconductor device and method of fabricating the same  
A semiconductor device and methods thereof. The semiconductor device includes a first layer formed on a substrate, the first layer having a higher conductivity. The semiconductor device further...
7482257 Method for forming metal contact in semiconductor device  
A method for forming a metal contact in a semiconductor device includes forming bit lines over a substrate defined into a cell region and a peripheral region, forming a first inter-layer dielectric...
7476604 Aggressive cleaning process for semiconductor device contact formation  
A method of forming a contact through a material includes forming a via through a dielectric material and cleaning the via using a dilute hydrofluoric (DHF) acid solution. The method further...
7476605 Method of manufacturing semiconductor device  
A method for manufacturing a semiconductor device is provided, which comprises forming a first metal wiring layer above a semiconductor substrate, forming an inorganic insulating film above the...
7476613 Method of forming an electrical contact in a semiconductor device using an improved self-aligned contact (SAC) process  
A contact for a semiconductor device is made by performing, inter alia, a CMP process on an interlayer insulation layer to expose a first hard mask layer of each conductive line. The interlayer...
7476607 Semiconductor electrode, production process thereof and photovoltaic cell using semiconductor electrode  
An object of the present invention is to provide a photovoltaic cell that demonstrates a superior photoelectric conversion function. The present invention relates to a photovoltaic cell comprising...
7473628 Method of manufacturing semiconductor device and semiconductor device  
According to an embodiment of the present invention, a method of manufacturing a semiconductor device, comprising forming a conducting layer on a substrate; forming a resist mask having an opening...
7473609 Surface treatment in preparation for contact placement  
A contact is formed on indium-phosphide material. Regions of the indium-phosphide material are exposed. An energetic bombardment is performed on exposed regions of the indium-phosphide material....
7470638 Systems and methods for manipulating liquid films on semiconductor substrates  
A semiconductor substrate undergoing processing to fabricate integrated circuit devices thereon is spun about a rotational axis while introducing liquid onto a surface of the substrate. An...
7468287 Method of fabricating a heterojunction of organic semiconducting polymers  
Provided is a method of forming a heterojunction of contiguous layers of organic semiconducting polymers. The method comprises firstly forming a layer of a first organic semiconducting polymer on a...
7465651 Integrated circuit packages with reduced stress on die and associated methods  
Mechanical stresses are reduced between an electronic component having relatively low fracture toughness and a substrate having relatively greater fracture toughness. In an embodiment, the...
7465654 Structure of gold bumps and gold conductors on one IC die and methods of manufacturing the structures  
A method for fabricating multiple metal layers includes the following steps. An electronic component is provided with multiple contact points. A first metal layer is deposited over said electronic...
7465650 Methods of forming polysilicon-comprising plugs and methods of forming FLASH memory circuitry  
This invention includes methods of forming plugs containing polysilicon, and methods of forming FLASH memory circuitry. In one implementation, a method of forming a plug containing polysilicon...
7465652 Method of forming a catalyst layer on the barrier layer of a conductive interconnect of a semiconductor device  
A method is provided for depositing a conductive material in a sub-micron recessed feature formed on a substrate. The method begins by depositing a barrier layer over a dielectric layer disposed on...
7459340 Semiconductor device and manufacturing method thereof  
A semiconductor device includes a base plate made of a material including at least a thermosetting resin, and having an opening, a vertical conductor filled and provided in the opening of the base...
7452795 Semiconductor device and method for fabricating the same  
When a via-hole 26 and an interconnection trench 32 are formed in an interconnection films 16, 18 by using as a mask a hard mask 20 covering the region except via-hole forming region, and a...
7449360 Phase change memory devices and fabrication methods thereof  
In a memory device, at least one conductive contact having a width of less than, or equal to, about 30 nm may be formed on a first electrode. A dielectric layer may be formed on the sides of the at...
7449409 Barrier layer for conductive features  
Barrier layers for conductive features and methods of formation thereof are disclosed. A first barrier material is deposited on top surfaces of an insulating material, and a second barrier material...
7446047 Metal structure with sidewall passivation and method  
A passivated metal structure and a method of forming the metal structure is disclosed. According to one embodiment, the patterned metal structure, such as conductive lines, are formed on a...
7442637 Method for processing IC designs for different metal BEOL processes  
A method for processing IC designs for different metal BEOL processes is provided for enabling fabricating using a metal fabrication process an IC originally having a backend design for a different...
7442633 Decoupling capacitor for high frequency noise immunity  
Systems and methods are provided for an on-chip decoupling device and method. One aspect of the present subject matter is a capacitor. One embodiment of the capacitor includes a substrate, a high K...
7439169 Integrated circuit and methods of redistributing bondpad locations  
Integrated circuits and methods of redistributing bondpad locations are disclosed. In one implementation, a method of redistributing a bondpad location of an integrated circuit includes providing...
7432185 Method of forming semiconductor device having stacked transistors  
There is provided a method of forming a semiconductor device having stacked transistors. When forming a contact hole for connecting the stacked transistors to each other, ohmic layers on the bottom...
7429536 Methods for forming arrays of small, closely spaced features  
Methods of forming arrays of small, densely spaced holes or pillars for use in integrated circuits are disclosed. Various pattern transfer and etching steps can be used, in combination with...
7429527 Method of manufacturing self-aligned contact openings  
A method of manufacturing self-aligned contact openings is provided. A substrate having a number of device structures is provided and the top of the device structures is higher than the surface of...
7427544 Semiconductor device and method of manufacturing the same  
A semiconductor device includes an element isolation insulating film provided in a semiconductor substrate between first and second element regions, a gate electrode running over the element...
7425499 Methods for forming interconnects in vias and microelectronic workpieces including such interconnects  
Methods for forming interconnects in blind vias or other types of holes, and microelectronic workpieces having such interconnects. The blind vias can be formed by first removing the bulk of the...
7419847 Method for forming metal interconnection of semiconductor device  
A method for forming a metal interconnection of a semiconductor device avoids over-etching and under-etching through the use of the “self-stop” function of a nitridation layer, to prevent the...
Matches 51 - 100 out of 631 < 1 2 3 4 5 6 7 8 9 10 11 12 13 >