Matches 301 - 350 out of 482 < 1 2 3 4 5 6 7 8 9 10 >
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6284585 Electronic memory device having bit lines with block selector switches  
An electronic memory device organized into sections which are in turn divided into blocks formed of cells and their associated decoding and addressing circuits, the cells being connected in a...
6281103 Method for fabricating gate semiconductor  
A method for fabricating floating gate semiconductor devices, such as flash EEPROMs, and flash EEPROM memory arrays, is provided. The method includes providing a semiconductor substrate and forming...
6277719 Method for fabricating a low resistance Poly-Si/metal gate  
A method for forming a low resistance metal/polysilicon gate for use in CMOS devices comprising: (1) a novel anneal step prior to formation of a diffusion barrier layer and (2) a novel diffusion...
6271090 Method for manufacturing flash memory device with dual floating gates and two bits per cell  
A method for manufacturing a flash memory device with dual floating gates is disclosed. The method use a self-align etching technique to form dual floating gates by using dual spacers as masks....
6255149 Process for restricting interdiffusion in a semiconductor device with composite Si/SiGe gate  
A method which includes, prior to depositing the encapsulating silicon layer: A) depositing on the Si 1 -x Ge x layer a thin film of amorphous or polycrystalline silicon, then in treating said...
6255170 Flash memory and method for fabricating the same  
A memory device and a method for manufacturing the same is provided that reduces a resistance of the source region and reduces an effective cell size. The memory includes tunnel insulating films...
6255165 Nitride plug to reduce gate edge lifting  
A method of manufacturing a flash memory device in which minimal gate edge lifting is accomplished by etching a portion of the ends of the layer of tunnel oxide forming cavities, forming silicon...
6239009 Flash memory device and method for manufacturing the same  
A flash memory device has improved erasable characteristics and device reliability. The flash memory device includes a semiconductor substrate and heavily doped impurity regions formed spaced apart...
6235621 Method for forming a semiconductor device  
A method for fabricating semiconductor device is disclosed herein. The first step is to form a first oxide layer on a substrate. Subsequently formed are polycrystalline silicon layer, a polycide...
6228717 Method of manufacturing semiconductor devices with alleviated electric field concentration at gate edge portions  
With the present invention, in a memory cell of a stacked-gate NOR flash EEPROM, for example, a SiON film is selectively formed on the sidewalls of a floating gate electrode and the top surface and...
6221715 Method of making polysilicon self-aligned to field isolation oxide  
A technique for forming an integrated circuit device having a self-aligned gate layer. The method includes a variety of steps such as providing a substrate, which is commonly a silicon wafer. Field...
6221744 Method for forming a gate  
A method for forming a gate on a substrate for manufacturing semiconductor devices is described. The present method comprises the step of providing a gate oxide layer on top of a substrate. A...
6207507 Multi-level flash memory using triple well process and method of making  
A multi-level flash memory cell formed in a semiconductor substrate. The memory cell comprises: (a) a deep n-well formed in said semiconductor substrate; (b) a p-well formed within said deep...
6207541 Method employing silicon nitride spacers for making an integrated circuit device  
A process for patterning a gate of a semiconductor device is provided. A gate material layer is formed upon an oxide layer of a substrate. A photoresist layer is formed upon the gate material...
6204159 Method of forming select gate to improve reliability and performance for NAND type flash memory devices  
In one embodiment, the present invention relates to a method of forming a NAND type flash memory device, involving the steps of growing a first oxide layer over at least a portion of a substrate,...
6200859 Method of fabricating a split-gate flash memory  
A split-gate flash memory is formed by a method described in the following steps. A tunnelling oxide layer, a first conductive layer, and a hard mask layer are formed on a substrate in sequence. A...
6197637 Method for fabricating a non-volatile memory cell  
A method for fabricating a non-volatile memory cell for a substrate includes the following steps: forming an isolation structure to define an active region on the substrate; forming a channel oxide...
6194300 Method of manufacturing the floating gate of split-gate flash memory  
A method for fabricating the floating gate of a split-gate flash memory. A patterned sacrificial layer is formed over a substrate. A doped polysilicon layer and an insulation layer are formed in...
6187655 Method for performing a pre-amorphization implant (PAI) which provides reduced resist protect oxide damage and reduced junction leakage  
The present invention provides a method for performing a pre-amorphization implant which reduces damage to the resist protect oxide layer and reduces leakage current between the gate and substrate....
6184086 Method for forming a floating gate semiconductor device having a portion within a recess  
A memory device, and a method for manufacturing same, comprises a semiconductor layer having a first surface and a second surface, and further having a trench therein. The memory device further...
6180454 Method for forming flash memory devices  
In one embodiment, the present invention relates to a method of forming a flash memory device involving the steps of forming a gate oxide layer on a substrate; forming a first poly layer over the...
6180539 Method of forming an inter-poly oxide layer  
A method of forming an inter-poly oxide layer is provided. A substrate having a field oxide layer thereon is provided. A first polysilicon layer is formed on the field oxide layer. The surface of...
6180457 Method of manufacturing non-volatile memory device  
A method of manufacturing a non-volatile memory device is provided. According to an aspect of this method, an isolation layer is formed on a semiconductor substrate including a cell array part and...
6171909 Method for forming a stacked gate  
A method for forming a stacked gate of a flash memory cell is described. A first dielectric layer, a conductive layer and a silicon nitride layer are sequentially formed over a substrate. A...
6165896 Self-aligned formation and method for semiconductors  
A method for forming self-aligned features for semiconductor devices includes the steps of providing a first layer including a reflective material on a surface of the first layer, a second layer...
6159798 Method for forming a floating gate with improved surface roughness  
A method for forming a floating gate of a non-volatile memory device includes steps of defining a substrate, forming a plurality of field isolation structures within the substrate, planarizing the...
6159810 Methods of fabricating gates for integrated circuit field effect transistors including amorphous impurity layers  
Gate electrodes for integrated circuit field effect transistors are fabricated by forming a polysilicon layer on a gate insulating layer opposite an integrated circuit substrate, forming an...
6143635 Field effect transistors with improved implants and method for making such transistors  
Metal oxide semiconductor field effect transistor (MOSFET) including a drain region and a source region adjacent to a channel region. A gate oxide is situated on the channel region and a gate...
6143606 Method for manufacturing split-gate flash memory cell  
In this method for manufacturing a split-gate flash memory cell, a floating gate and a control gate are formed over a substrate, and then first spacers are formed on the sidewalls of the gate...
6140216 Post etch silicide formation using dielectric etchback after global planarization  
The present invention describes the formation of a silicide layer upon a gate conductor by using a masking layer which covers the source/drain regions of the transistor. The method includes forming...
6136647 Method of forming interpoly dielectric and gate oxide in a memory cell  
A method of fabricating an interpoly dielectric layer and a gate oxide layer of a programmable memory device. This method allows a gate oxide layer and a top oxide layer of the interpoly dielectric...
6133128 Method for patterning polysilicon gate layer based on a photodefinable hard mask process  
A process for patterning a gate of a semiconductor device is provided. A gate material layer is formed upon an oxide layer of a substrate. A photoresist layer is formed upon the gate material...
6121081 Method to form hemi-spherical grain (HSG) silicon  
An embodiment of the present invention develops a process for forming Hemi-Spherical Grained silicon by the steps of: forming amorphous silicon from a gas source comprising at least one of...
6114230 Nitrogen ion implanted amorphous silicon to produce oxidation resistant and finer grain polysilicon based floating gates  
A polysilicon-based floating gate is formed so as to be resistant to oxidation that occurs during multiple thermo-cycles in fabrication. Accordingly, edge erase times in NOR-type memory devices may...
6093650 Method for fully planarized conductive line for a stack gate  
A method for substantially reducing conductive line cracking on an integrated circuit, comprising the steps of: obtaining a semiconductor structure with a first surface and with an insulating...
6077762 Method and apparatus for rapidly discharging plasma etched interconnect structures  
Disclosed is a method for making reliable interconnect structures on a semiconductor substrate having a first dielectric layer. The method includes plasma patterning a first metallization layer...
6074956 Method for preventing silicide residue formation in a semiconductor device  
An etching process is provided for etching through a tungsten silicide layer and an underlying polysilicon layer during the formation of a control gate in a semiconductor device. The etching...
6069061 Method for forming polysilicon gate  
A method is provided for forming a polysilicon gate. A stacked gate with a first polysilicon layer/an oxide layer/a second polysilicon layer multiple structure is formed. The invention provides...
6069040 Fabricating a floating gate with field enhancement feature self-aligned to a groove  
Floating gates with field enhancement features are produced by a technique that makes possible structures smaller than the lithographically defined image. The floating gates produced having sharp...
6066531 Method for manufacturing semiconductor memory device  
A method for manufacturing a semiconductor memory device, including the steps of: forming a plurality of stripes comprising a first floating gate material film and a ion implantation protective...
6063662 Methods for forming a control gate apparatus in non-volatile memory semiconductor devices  
Methods are provided to increase the process control during the fabrication of the control gate configuration in a non-volatile memory semiconductor device. The methods effectively smooth out the...
6060741 Stacked gate structure for flash memory application  
In order to form a low resistance gate for use in a flash EPROM or EEPROM, a boron doped amorphous silicon layer is formed on an oxide layer and a layer of tungsten nitride formed thereon. A layer...
6048766 Flash memory device having high permittivity stacked dielectric and fabrication thereof  
A memory device having a high performance stacked dielectric sandwiched between two polysilicon plates and method of fabrication thereof is provided. A memory device, in accordance with an...
6037228 Method of fabricating self-aligned contact window which includes forming a undoped polysilicon spacer that extends into a recess of the gate structure  
A method of fabricating a self-aligned contact window is described. A gate oxide layer, a conductive layer, a first oxide layer and an undoped polysilicon layer are successively formed on a...
6017792 Process for fabricating a semiconductor device including a nonvolatile memory cell  
A nonvolatile memory device includes a floating-gate electrode (14) overlying a surface (24) of a substrate (10). A diffusion barrier layer (34) extends from the substrate surface (24) along a wall...
6008091 Floating gate avalanche injection MOS transistors with high K dielectric control gates  
The specification describes intergate dielectrics between the floating silicon gate and the control silicon gate in MOS memory devices. The intergate dielectrics are composite structures of SiO 2 ...
6008112 Method for planarized self-aligned floating gate to isolation  
A method for forming floating gate regions in non-volatile memory cells each having a floating gate and a control gate is disclosed. First, a plurality of isolation structures in a substrate...
6004829 Method of increasing end point detection capability of reactive ion etching by adding pad area  
A method of forming a semiconductor device includes forming of layers of polysilicon and dielectric layers in manufacturing a semiconductor device and patterning the layers into devices using...
6001688 Method of eliminating poly stringer in a memory device  
A method (200) of making a flash memory device without poly stringers includes forming a stacked gate region (202) on a substrate (102) and forming one or more word lines (122a, 122b, 204) in the...
5994186 Contactless flash eprom using poly silicon isolation and process of making the same  
A contactless flash EPROM cell array with poly 1 isolation blocks and process for its manufacture. The cell array includes poly 1 isolation blocks that are spaced-apart from a pair of drain lines...
Matches 301 - 350 out of 482 < 1 2 3 4 5 6 7 8 9 10 >