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6770533 Method of manufacturing semiconductor device, nonvolatile semiconductor memory device and method of manufacturing the same  
Provided are a method of manufacturing a semiconductor, a nonvolatile semiconductor memory device and a method of manufacturing the same, wherein: the memory device has a plurality of memory cells;...
6762452 Non-volatile memory cells integrated on a semiconductor substrate  
A memory device may include a semiconductor substrate, an oxide layer defining spaced apart active areas in the semiconductor substrate, and a floating gate region on each respective active area....
6759709 Nonvolatile semiconductor memory device  
A nonvolatile semiconductor memory device including a semiconductor substrate 1 , a plurality of memory cells 1 a on the semiconductor substrate including transistors having floating gate...
6759314 Method for manufacturing semiconductor devices using thermal nitride films as gate insulating films  
A thermal nitride film is formed as a gate insulating film on a silicon substrate, and after a gate electrode material is formed on the insulating film, it is patterned to form gate electrodes....
6753225 Method of forming a gate structure  
A method of forming a gate structure. A substrate having thereon at least one stacked gate is provided. The stacked gate has a gate insulating layer, a polysilicon layer, a silicate layer, and a...
6753570 Memory device and method of making  
A non-volatile memory device includes insulators between floating gates. The insulators each include both a lower trench-fill insulator portion in a trench in the substrate, and an upper protruding...
6734427 TEM/SEM sample preparation  
A method of preparing a test sample for electron microscopy analysis is disclosed. First, a chip segment is attached to a holder of a sample polisher, and a first polishing end of the chip segment...
6727144 Manufacturing method for semiconductor storage device  
A manufacturing method for a semiconductor storage device with a floating gate includes a first step for depositing a first thermally-oxidized film ( 14 ) on a poly-silicon film ( 12 ) that has...
6723541 Method of producing semiconductor device and semiconductor substrate  
A method of producing a strain-relaxed Si—Ge virtual substrate for use in a semiconductor substrate which is planar and of less defects for improving the performance of a field effect...
6723625 Semiconductor device having thin electrode laye adjacent gate insulator and method of manufacture  
Disclosed is a semiconductor device (e.g., nonvolatile semiconductor memory device) and method of forming the device. The device includes a gate electrode (e.g., floating gate electrode) having a...
6716740 Method for depositing silicon oxide incorporating an outgassing step  
A method for depositing an inter-metal-dielectric layer on a semiconductor substrate by plasma chemical vapor deposition without the layer cracking defect is disclosed. The semiconductor substrate...
6713348 Method for forming an etch mask during the manufacture of a semiconductor device  
A method used during the formation of a semiconductor device comprises the steps of forming a polycrystalline silicon layer over a semiconductor substrate assembly and forming a silicon nitride...
6709925 Split-gate flash memory cell and manufacturing method thereof  
A split-gate flash memory cell and a manufacturing method thereof is provided. After a tunnel oxide layer is formed over a substrate, a peak floating gate layer of conducting material is formed...
6706596 Method for forming flash memory cell  
The present invention provides a method for forming a flash memory cell and comprises following steps. First, a substrate is provided. Then, a gate dielectric layer, a first polysilicon layer and a...
6706593 Method for manufacturing a nonvolatile semiconductor storage device  
According to the present invention, a method for manufacturing a nonvolatile semiconductor storage device is provided in which an element separating layer and first gate insulating layer are...
6703298 Self-aligned process for fabricating memory cells with two isolated floating gates  
A self-aligned process for fabricating a non-volatile memory cell having two isolated floating gates. The process includes forming a gate dielectric layer over a semiconductor substrate. A floating...
6699753 Method of fabricating an array of non-volatile memory cells  
A method of fabricating a contact-less array of non-volatile memory cells includes: (A) forming over the substrate three stacks S 1, S 2 and S 3 of first and second polysilicon layers; (B)...
6693009 Flash memory cell with minimized floating gate to drain/source overlap for minimizing charge leakage  
For fabricating a flash memory cell of an electrically programmable memory device on a semiconductor substrate, any region of a stack of a layer of tunnel dielectric material, a layer of floating...
6682976 Method for manufacturing a nonvolatile semiconductor memory device  
A method for manufacturing a semiconductor memory device includes forming an isolation layer adjacent a diffusion region over a substrate that also has a stacked gate region. A gate oxide layer is...
6680474 Semiconductor calibration wafer with no charge effect  
A semiconductor calibration wafer that has no charge effect is disclosed. The calibration wafer has a substrate layer and a conductive metal layer. The conductive metal layer completely covers the...
6680225 Method for manufacturing a semiconductor memory  
The method for manufacturing a Semiconductor Memory according to the present invention comprises a step for forming a gate insulator film on the surface of a semiconductor substrate; a step for...
6677224 Method of forming stacked gate for flash memories  
The method of the present invention includes the steps of forming doped regions in the semiconductor substrate. A pad oxide layer is formed on the semiconductor substrate. A masking layer is formed...
6670239 Non-volatile memory cell having bilayered floating gate and fabricating method thereof  
A non-volatile memory cell is provided. The non-volatile memory cell includes a first conductivity type semiconductor substrate, second conductivity type source/drain regions longitudinally...
6667211 Non-volatile semiconductor memory device and method of manufacturing the same  
A non-volatile semiconductor memory device comprising a device isolation insulation layer, formed on a semiconductor substrate, for defining a device region, a floating gate formed on the device...
6660585 Stacked gate flash memory cell with reduced disturb conditions  
In this invention a stacked gate flash memory cell is disclosed which has a lightly doped drain (LDD) on the drain side of the device and uses the source to both program using hot electron...
6656796 Multiple etch method for fabricating split gate field effect transistor (FET) device  
Within a method for fabricating a split gate field effect transistor (FET) device there is employed a two step etch method for forming a floating gate electrode. Within the two step etch method...
6653188 Method of forming poly tip of floating gate in split-gate memory  
The present invention provides a method for forming a floating gate with a poly tip. The method includes the step of providing a semiconductor substrate with a gate dielectric layer formed on the...
6649470 Dual floating gate programmable read only memory cell structure and method for its fabrication and operation  
A flash memory cell in the form of a transistor capable of storing multi-bit binary data is disclosed. A pair of floating gates are provided beneath a control gate. The control gate is connected to...
6635586 Method of forming a spin-on-glass insulation layer  
A method of forming a SOG insulation layer of a semiconductor device comprises forming the SOG insulation layer on a substrate having a stepped pattern by using a polysilazane in a solution state,...
6624015 Method for manufacturing electronic devices having non-volatile memory cells and LV transistors with salicided junctions  
The manufacturing method comprises, in sequence, the steps of: depositing an upper layer of polycrystalline silicon; defining the upper layer, obtaining LV gate regions of low voltage transistors...
6624028 Method of fabricating poly spacer gate structure  
The present invention provides a fabrication method of devices like flash memory cells, which is used to fabricate a poly spacer as a floating gate. In the present invention, an oxide, a predefined...
6624057 Method for making an access transistor  
Methods are disclosed for the fabrication of novel polysilicon structures having increased surface areas to achieve lower resistances after silicidation. The structures are applicable, for example,...
6620681 Semiconductor device having desired gate profile and method of making the same  
In a method of manufacturing a non-volatile memory or other semiconductor device, a control gate made of conductive material is formed in a more uniform fashion. The method includes forming a...
6613630 Nonvolatile memory device and fabricating method thereof  
A nonvolatile memory device includes two metal layers, which act respectively as a floating gate and a control gate, and each of which has a downwardly extended portion. Thereby, a surface area per...
6605506 Method of fabricating a scalable stacked-gate flash memory device and its high-density memory arrays  
A scalable stacked-gate flash memory device and its high-density memory arrays are disclosed by this invention. There are four different spacer techniques used to fabricate a scalable stacked-gate...
6602750 Container structure for floating gate memory device and method for forming same  
A floating gate memory device comprises a first conductive floating gate layer which is horizontally oriented and a second conductive floating gate layer which is predominantly vertically oriented....
6602774 Selective salicidation process for electronic devices integrated in a semiconductor substrate  
A selective silicidation process for electronic devices that are integrated on a semiconductor substrate is presented. The devices have a number of active elements formed with gate region that has...
6596591 Methods to form reduced dimension bit-line isolation in the manufacture of non-volatile memory devices  
A method of manufacturing a semiconductor device with a reduced bit-line isolation dimension. After a layer of image sensitive photoresist is patterned and developed with openings having the...
6586302 Method of using trenching techniques to make a transistor with a floating gate  
A method for making an electrically programmable and erasable memory cell is disclosed. Specifically, a method for creating a floating gate using shallow trench isolation-type techniques is...
6583008 Nonvolatile semiconductor memory device and manufacturing method thereof  
A floating gate electrode configuration and process reduces a space critical dimension between adjacent floating gate electrodes while reducing the consumption of a device isolation layer during...
6579778 Source bus formation for a flash memory using silicide  
A semiconductor flash memory device is formed with shallow trench isolation (STI) and a low-resistance source bus line (Vss Bus). Embodiments include forming core and peripheral field oxide...
6573130 Process for manufacturing electronic devices having non-salicidated non-volatile memory cells, non-salicidated HV transistors, and salicidated-junction LV transistors  
A process that provides for the manufacture of LV transistors with salicidated junctions on first areas of a substrate, HV transistors on second areas, and memory cells on third areas. The process...
6573139 Method of fabricating cell of flash memory device  
A method of forming a floating gate electrode of a cell of a flash memory device having an interval less than a critical dimension (CD) in a conventional photolithographic process, in which the...
6569735 Manufacturing method for isolation on non-volatile memory  
A logic/flash memory manufacturing process generates recesses used for isolation in a self-aligned silicide process, in some specific location in the substrate, to avoid short circuits. The problem...
6558985 Charge coupled device and method of fabricating the same  
A CCD and method of fabricating the same, which reads signal charges completely and increases the fill factor of its pixel, to improve the sensitivity. The CCD having photodiodes in matrix form,...
6555434 Nonvolatile memory device and manufacturing method thereof  
A nonvolatile memory device with a high coupling ratio is disclosed. The nonvolatile memory device includes a semiconductor substrate having shallow trench isolation (STI) formed therein and active...
6548387 Method for reducing hole defects in the polysilicon layer  
A method for reducing hole defects in the polysilicon layer. The method at least includes the following steps. First of all, a semiconductor substrate is provided, a polysilicon layer is formed...
6541339 Nitride deposition wafer to wafer native oxide uniformity improvement for 0.35 flash erase performance by adding thermal oxide oxidation process  
A new method is provides for the creation of a hardmask over a layer of polysilicon for the etching of floating gate for split-gate flash memory devices. A layer of gate oxide is created over the...
6537862 Method of forming semiconductor device having a GAA type transistor  
In a method of fabricating a semiconductor device having a gate all around(GAA) structure transistor, an SOI substrate having a SOI layer, a buried oxide layer, and a bottom substrate is prepared....
6521495 Method of fabricating a non-volatile memory device  
A non-volatile memory device and a fabrication method thereof, wherein the non-volatile memory device includes first and second memory cells in a region of a semiconductor substrate where a word...
Matches 201 - 250 out of 482 < 1 2 3 4 5 6 7 8 9 10 >