Matches 101 - 150 out of 481 < 1 2 3 4 5 6 7 8 9 10 >
Match Document Document Title
7259098 Methods for fabricating semiconductor devices  
Semiconductor devices and methods for fabricating a semiconductor devices are disclosed. A disclosed method comprises: forming a first gate electrode functioning as a flash memory; forming first...
7256112 Laser activation of implanted contact plug for memory bitline fabrication  
An example method of forming a bitline contact region and bitline contact plug for a memory device using a laser irradiation activation process. An example embodiment comprises: providing a...
7256091 Method of manufacturing a semiconductor device with a self-aligned polysilicon electrode  
In a method of manufacturing a semiconductor device, an isolation pattern is formed on a substrate. The isolation pattern includes an opening that exposes a portion of the substrate. A preliminary...
7253466 Crossbar array microelectronic electrochemical cells  
The present invention provides microelectronic electrochemical structures and related fabrication methods. A composite microelectronic structure is provided that includes first and second...
7250340 Method of fabricating programmable structure including discontinuous storage elements and spacer control gates in a trench  
A method of fabricating a semiconductor storage cell that includes first and second source/drain regions underlying first and second trenches defined in a semiconductor substrate. Sidewalls of the...
7235446 Methods of forming silicon-doped aluminum oxide, and methods of forming transistors and memory devices  
The invention encompasses a method of forming a silicon-doped aluminum oxide. Aluminum oxide and silicon monoxide are co-evaporated. Subsequently, at least some of the evaporated aluminum oxide and...
7232745 Body capacitor for SOI memory description  
A semiconductor structure having a body capacitance plate, which is formed with a process that assures that the body capacitance plate is self-aligned to both the source line (SL) diffusion and the...
7232722 Method of making a multibit non-volatile memory  
The present invention relates to a method of making a multibit non-volatile memory and especially to a method of making a flash memory such as a fast-programmable Flash EEPROM (Electrically...
7232717 Method of manufacturing non-volatile DRAM  
A method of forming a non-volatile DRAM includes, in part: forming p-well and an n-well between two trench isolation regions formed in a semiconductor substrate, forming a polysilicon control gate...
7232723 Method of fabricating semiconductor device  
There is provided a method of fabricating a semiconductor device comprising the steps of applying resist to a polysilicon film formed across the surface of a substrate and forming a plurality of...
7227216 Mono gate memory device and fabricating method thereof  
A mono-gate memory device and fabricating method thereof are provided, which may reduce or solve over-erasing problems by implementing a mono split-gate SONOS type non-volatile memory cell, and...
7214632 Using selective deposition to form phase-change memory cells  
A phase-change memory cell may be formed by selectively depositing the lower electrode in the phase-change memory pore. Thereafter, an adhesion-promoting material may be selectively deposited on...
7211446 Method of patterning a magnetic tunnel junction stack for a magneto-resistive random access memory  
A method of patterning a magnetic tunnel junction (MTJ) stack is provided. According to such method, an MTJ stack is formed having a free layer, a pinned layer and a tunnel barrier layer disposed...
7211485 Method of fabricating flash memory device and flash memory device fabricated thereby  
There are provided a method of fabricating a flash memory device and a flash memory device fabricated thereby. The method of fabricating a flash memory device includes forming an isolation layer...
7192829 Methods of forming floating gate transistors  
Floating gate transistors and methods of forming the same are described. In one implementation, a floating gate is formed over a substrate. The floating gate has an inner first portion and an outer...
7183188 Method for fabricating contact-making connections  
The invention provides a method for fabricating contact-making connections, having the steps of: a) providing a substrate ( 101 ) with electronic circuit units ( 102 a , 102 b ) arranged thereon,...
7183185 Methods of forming transistor gates; and methods of forming programmable read-only memory constructions  
The invention includes a method of forming a transistor gate. One or more conductive materials are formed over a semiconductor substrate, and a block is formed over the one or more conductive...
7179709 Method of fabricating non-volatile memory device having local SONOS gate structure  
in methods of fabricating a non-volatile memory device having a local silicon-oxide-nitride-oxide-silicon (SONOS) gate structure, a semiconductor substrate having a cell transistor area, a high...
7176084 Self-aligned conductive spacer process for sidewall control gate of high-speed random access memory  
A self-aligned conductive spacer process for fabricating sidewall control gates on both sides of a floating gate for high-speed RAM applications, which can well define dimensions and profiles of...
7169624 Shared bit line cross-point memory array manufacturing method  
A shared bit line cross-point memory array structure is provided, along with methods of manufacture. The memory structure comprises a bottom word line with a top word line overlying the bottom word...
7160774 Method of forming polysilicon layers in non-volatile memory  
In accordance with an embodiment of the present invention, a semiconductor structure includes an undoped polysilicon layer, a doped polysilicon layer in contact with the undoped polysilicon layer,...
7160794 Method of fabricating non-volatile memory  
A method for manufacturing a non-volatile memory. The method comprises steps of forming a first dielectric layer on a substrate and forming a dummy gate layer on the first dielectric layer....
7157337 Method of manufacturing a semiconductor device and semiconductor device obtained by means of such a method  
Consistent with an example embodiment according to the invention, a material for the intermediate layer is chosen which can be selectively etched with respect to the dielectric layer. Before the...
7157332 Method for manufacturing flash memory cell  
Disclosed is a method for manufacturing a flash memory cell. A structure in which a floating gate, an ONO dielectric film and a control gate are stacked is formed by means of a gate mask process...
7151028 Memory cell with plasma-grown oxide spacer for reduced DIBL and Vss resistance and increased reliability  
According to one exemplary embodiment, a method for fabricating a floating gate memory cell on a substrate comprises a step of forming a first spacer adjacent to a source sidewall of a stacked gate...
7141474 Fabrication method of a nonvolatile semiconductor memory  
A method of fabricating a nonvolatile semiconductor memory including the steps of: sequentially forming a gate insulating layer and a first conductive layer of a floating gate on a semiconductor...
7122432 Non-volatile semiconductor memory device and manufacturing method thereof  
A non-volatile semiconductor memory device with a small variation in capacitance-coupling to the stacked gate for memory miniaturization. The device has a memory cell array in which memory cells...
7118963 Semiconductor memory integrated circuit and its manufacturing method  
A method of manufacturing a semiconductor memory integrated circuit intended to improve properties and reliability of its peripheral circuit includes the step of forming a tunnel oxide film ( 21 a...
7115492 Technique for elimination of pitting on silicon substrate during gate stack etch using material in a non-annealed state  
A method for forming a gate stack which minimizes or eliminates damage to the gate dielectric layer and/or silicon substrate during the gate stack formation by the reduction of the temperature...
7115472 Process for manufacturing a dual charge storage location memory cell  
A process for manufacturing a dual charge storage location electrically programmable memory cell that includes the steps of forming a central insulated gate over a semiconductor substrate; forming...
7105409 Semiconductor integrated circuit device and process for producing the same  
A semiconductor integrated circuit device with third gates comprising second conduction type source/drain diffusion layer regions 205 formed first conduction type well 201 , floating gates 203...
7098106 Method of making mirror image memory cell transistor pairs featuring poly floating spacers  
By arranging floating spacer and gate non-volatile memory transistors in symmetric pairs, increased chip density may be attained. For each pair of such transistors, the floating gates are laterally...
7074700 Method for isolation layer for a vertical DRAM  
A method for forming isolation layer in a vertical DRAM. A semiconductor substrate with a plurality of first trenches is provided, with a collar dielectric layer is formed on a sidewall of each,...
7067375 Non-volatile memory and method for fabricating the same  
A non-volatile memory is provided. The memory comprises a substrate, a dielectric layer, a conductive layer, an isolation layer, a buried bit line, a tunneling dielectric layer, a charge trapping...
7060565 Fabrication of dielectric for a nonvolatile memory cell having multiple floating gates  
A memory cell ( 110 ) has a select gate ( 140 ) and at least two floating gates ( 160 ). A gate dielectric ( 150 ) for the floating gates ( 160 ) is formed by thermal oxidation simultaneously with...
7061034 Magnetic random access memory including middle oxide layer and method of manufacturing the same  
In a magnetic random access memory (MRAM) having a transistor and a magnetic tunneling junction (MTJ) layer in a unit cell, the MTJ layer includes a lower magnetic layer, an oxidation preventing...
7053444 Method and apparatus for a flash memory device comprising a source local interconnect  
A method for forming a flash memory device having a local interconnect connecting source regions of a plurality of transistors within a sector allows for a highly selective wet etch of a dielectric...
7045450 Method of manufacturing semiconductor device  
Disclosed is a method of manufacturing a semiconductor device. The method includes the steps of forming gates on a substrate, forming junction areas on a surface of the substrate, forming a first...
7037786 Method of forming a low voltage gate oxide layer and tunnel oxide layer in an EEPROM cell  
A method of fabricating a non-volatile memory embedded logic circuit having a low voltage logic gate oxide layer and tunnel oxide layer is described. Both the low voltage logic gate oxide and the...
7034354 Semiconductor structure with lining layer partially etched on sidewall of the gate  
A semiconductor structure with partially etched gate and method of fabricating the same. A semiconductor structure with a single-sided or dual-sided partially etched gate comprises a gate...
7026231 Method of producing organic semiconductor device including step of applying oxidizing agent solution to monomer layer to obtain polymer layer  
There is provided a method of producing an organic semiconductor device by which an organic semiconductor device having an optional configuration can easily be produced. A method of producing an...
7026212 Method for making high density nonvolatile memory  
An improved method for fabricating a three dimensional monolithic memory with increased density. The method includes forming conductors preferably comprising tungsten, then filling and planarizing;...
7018881 Suspended gate single-electron device  
The present invention provides a single-electron transistor device ( 100 ). The device ( 100 ) comprises a source ( 105 ) and drain ( 110 ) located over a substrate ( 115 ) and a quantum island (...
7015098 Methods and structure for an improved floating gate memory cell  
A method and structure for an improved floating gate memory cell are provided. The non volatile memory cell includes a substrate and a first insulating layer formed on the substrate. The memory...
7012003 Memory for producing a memory component  
The invention relates to a method for producing a memory component comprising a memory location ( 104 ) having memory cells and first control electrode strips ( 162 ) for controlling the individual...
7012004 Method of manufacturing a nonvolatile memory cell with triple spacers and the structure thereof  
A method of manufacturing a nonvolatile memory cell with triple spacers and the structure thereof. A gate structure is formed on a substrate. Diffusion regions are formed in the substrate on either...
7005697 Method of forming a non-volatile electron storage memory and the resulting device  
The invention provides a method of forming an electron memory storage device and the resulting device. The device comprises a gate structure which, in form, comprises a first gate insulating layer...
6998300 Methods for manufacturing semiconductor devices  
A multiple layered wafer structure having, on a semiconductor substrate, a first dielectric layer, a single crystal semiconductor layer formed on the dielectric layer, a semiconductor nano-crystal...
6995422 High-density three-dimensional memory  
An improved method for fabricating a three dimensional monolithic memory with increased density. The method includes forming conductors preferably comprising tungsten, then filling and planarizing;...
6995080 Methods of forming transistor gates  
The invention includes a method of forming a transistor gate. One or more conductive materials are formed over a semiconductor substrate, and a block is formed over the one or more conductive...
Matches 101 - 150 out of 481 < 1 2 3 4 5 6 7 8 9 10 >