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7465649 Method of forming a split poly-SiGe/poly-Si alloy gate stack  
A multi-layered gate electrode stack structure of a field effect transistor device is formed on a silicon nano crystal seed layer on the gate dielectric. The small grain size of the silicon nano...
7462533 Memory cell and method for fabricating same  
A method for fabricating a memory cell includes forming a stacked insulating layer, and a lower conductive layer on a semiconductor substrate, patterning the lower conductive layer and the...
7462905 Nonvolatile semiconductor memory device, semiconductor device and method of manufacturing nonvolatile semiconductor memory device  
A nonvolatile semiconductor memory device includes a semiconductor substrate, a first floating gate formed on a main surface of the semiconductor substrate, a second floating gate formed on the...
7449384 Method of manufacturing flash memory device  
Provided is a method of manufacturing a flash memory device. In accordance with the present invention, an undoped polysilicon layer is formed over a semiconductor substrate where a floating gate...
7449390 Methods of forming memory  
Methods of forming memory are described. According to one arrangement, a method of forming memory includes forming a plurality of word lines over a substrate, the word lines having insulating...
7445984 Method for removing nanoclusters from selected regions  
A method of making a semiconductor device includes a substrate having a semiconductor layer having a first portion for non-volatile memory and a second portion exclusive of the first portion. A...
7445998 Method for fabricating semiconductor device  
A method for fabricating a semiconductor device is described. The method includes providing a substrate having a trench therein, and a trench device in the trench. The trench device includes two...
7439167 Nonvolatile semiconductor memory and manufacturing method thereof  
A nonvolatile semiconductor memory includes a trench isolation provided in a semiconductor substrate and an interlayer insulator provided on the semiconductor substrate. The trench isolation...
7439131 Flash memory device having resistivity measurement pattern and method of forming the same  
A flash memory device has a resistivity measurement pattern and method of forming the same. A trench is formed in an isolation film in a Self-Aligned Floating Gate (SAFG) scheme. The trench is...
7436019 Non-volatile memory cells shaped to increase coupling to word lines  
A non-volatile memory array has word lines coupled to floating gates, the floating gates having an upper portion that is adapted to provide increased surface area, and thereby, to provide increased...
7435648 Methods of trench and contact formation in memory cells  
Methods of contact formation and memory arrays formed using such methods, which methods include providing a memory array having a plurality of bit lines disposed below a surface of a semiconductor...
7432158 Method for retaining nanocluster size and electrical characteristics during processing  
A method of making a semiconductor device includes a substrate having a semiconductor layer having a first portion for non-volatile memory and a second portion exclusive of the first portion. A...
7429514 Use of selective oxidation to form asymmetrical oxide features during the manufacture of a semiconductor device  
A sidewall oxidation process for use during the formation of a transistor such as a flash memory cell allows for improved control of a gate oxide profile. The method comprises doping transistor...
7429766 Split gate type nonvolatile memory device  
In a split gate type nonvolatile memory device, a supplementary layer pattern is disposed on a source region of a semiconductor substrate. Since the source region is vertically extended by virtue...
7416935 Method of manufacturing nonvolatile semiconductor memory device having adjacent selection transistors connected together  
A method of manufacturing a nonvolatile semiconductor memory device, including forming a gate insulating film, a first conductive layer providing floating gates and a mask, in that order, on a...
7410871 Split gate type flash memory device and method for manufacturing same  
A split gate type flash memory device and a method of manufacturing the split gate type flash memory device are disclosed. The split gate type flash memory device includes a silicon epitaxial layer...
7410857 Semiconductor memory device and manufacturing method thereof  
After an ONO film in which a silicon nitride film ( 22 ) formed by a plasma nitriding method using a plasma processor having a radial line slot antenna is sandwiched by silicon oxide films ( 21 ),...
7407856 Method of manufacturing a memory device  
A method of manufacturing a memory device includes defining a field region and an active region in a substrate, forming a field oxide layer on the field region, forming an insulating layer on the...
7402493 Method for forming non-volatile memory devices  
According to a nonvolatile memory device having a multi gate structure and a method for forming the same of the present invention, a gate electrode is formed using a damascene process. Therefore, a...
7400010 Semiconductor device and method of manufacturing the same  
A semiconductor device including a semiconductor substrate having trenches oriented in a predetermined direction; a gate insulating film overlaying the semiconductor substrate interposed between...
7399673 Method of forming a charge-trapping memory device  
In a charge-trapping device having an array of memory cells, which are controlled by word lines buried in trenches within a substrate, further trenches are formed parallel to said word lines within...
7393745 Method for fabricating self-aligned double layered silicon-metal nanocrystal memory element  
A nanocrystal memory element and a method for fabricating the same are proposed. The fabricating method involves selectively oxidizing polysilicon not disposed beneath and not covered with a...
7391073 Non-volatile memory structure and method of fabricating non-volatile memory  
A method of fabricating a non-volatile memory is described. A substrate having a tunneling layer and a floating gate layer thereon is provided. A mask layer is formed on the floating gate. The mask...
7390730 Method of fabricating a body capacitor for SOI memory  
A semiconductor structure having a body capacitance plate, which is formed with a process that assures that the body capacitance plate is self-aligned to both the source line (SL) diffusion and the...
7381615 Methods for self-aligned trench filling with grown dielectric for high coupling ratio in semiconductor devices  
Methods for self-aligned trench filling to isolate active regions in high-density integrated circuits are provided. A deep, narrow trench is etched into a substrate between active regions. The...
7378336 Split poly-SiGe/poly-Si alloy gate stack  
A multi-layered gate electrode stack structure of a field effect transistor device is formed on a silicon nano crystal seed layer on the gate dielectric. The small grain size of the silicon nano...
7374995 Nonvolatile semiconductor memory device  
A nonvolatile semiconductor memory device including a memory cell and a selection transistor, and the memory cell includes a floating gate formed on a semiconductor substrate via a first gate...
7371638 Nonvolatile memory cells having high control gate coupling ratios using grooved floating gates and methods of forming same  
A non-volatile memory cell includes a semiconductor substrate having a fin-shaped active region extending therefrom. A tunnel dielectric layer is provided, which extends on opposing sidewalls and...
7371672 Semiconductor device and method of manufacturing the same  
A method of manufacturing a semiconductor device includes removing a low-resistivity metal film, conductive layer, third insulating film and an upper part of the electrode layer in a gate electrode...
7368780 Semiconductor memory device and method of manufacturing the same  
A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of...
7361543 Method of forming a nanocluster charge storage device  
An integrated circuit and method of forming an integrated circuit having a memory portion minimizes an amount of oxidation of nanocluster storage elements in the memory portion. A first region of...
7358129 Nonvolatile semiconductor memory device and a method of the same  
A reduction in size nonvolatile semiconductors for use in a memory device and an increase in the capacity thereof are promoted. Each memory cell of a flash memory is provided with a field effect...
7351629 Method of forming non-volatile memory device  
A non-volatile memory device comprises an active region disposed in a predetermined region of a semiconductor substrate, a selection gate electrode crossing over the active region, and a floating...
7348267 Flash memory and method of fabricating the same  
A method of fabricating a flash memory device produces a device that has a small cell area and yet a high coupling ratio. First, a basic structure is provided that includes a substrate, a field...
7339226 Dual-level stacked flash memory cell with a MOSFET storage transistor  
The present invention is a dual-level flash memory cell design that stores 3 or more bits of information per transistor. The dual-level memory cell stores two lower bits in a first level and stores...
7338859 Non-volatile memory cells having floating gate and method of forming the same  
A non-volatile memory cell having a floating gate and a method of forming the same. The non-volatile memory cell includes a device isolation layer that is formed in a semiconductor substrate and...
7335556 Manufacturing method of semiconductor device  
The present invention provides a manufacturing method of a semiconductor device having a semiconductor nonvolatile memory element that is highly reliable and that can increase a variation of a...
7329578 Method of forming floating-gate tip for split-gate flash memory process  
A split-gate flash memory process for improving sharpness and height of a floating-gate tip has steps as follows. Using a dry etching process, a trench is formed in the first polysilicon layer...
7326615 Method for manufacturing electronic non-volatile memory devices integrated in a semiconductor substrate  
A method manufactures a non-volatile memory device on a semiconductor substrate that includes a matrix of memory cells and associated circuitry. The method includes: forming a filling dielectric...
7320913 Methods of forming split-gate non-volatile memory devices  
Non-volatile memory devices and methods for fabricating non-volatile memory devices are disclosed. More specifically, split gate memory devices are provided having frameworks that provide increased...
7307027 Void free interlayer dielectric  
A method of forming a dielectric between memory cells in a device includes forming multiple memory cells, where a gap is formed between each of the multiple memory cells. The method further...
7291546 Method and apparatus for reducing charge loss in a nonvolatile memory cell  
A method of fabricating a non-volatile memory cell on a semiconductor substrate is disclosed. An area of a first region of the semiconductor substrate designated for a layer of floating polysilicon...
7285463 Method of fabricating non-volatile memory  
A method of fabricating a non-volatile memory is described. A plurality of first memory units having gaps between each other is formed over a substrate. Insulating spacers are formed on the...
7279738 Semiconductor device with an analog capacitor  
A method for manufacturing a semiconductor device that comprises forming an oxide layer over a substrate. A polysilicon layer is disposed outwardly from the oxide layer, wherein the polysilicon...
7279342 Ferroelectric memory  
A ferroelectric memory includes a base member, a first dielectric layer formed above the base member, a second dielectric layer formed above the first dielectric layer, a contact hole that...
7276755 Integrated circuit and method of manufacture  
An integrated circuit having a plurality of active areas separated from each other by a field region and a method for manufacturing the integrated circuit. A first polysilicon finger is formed over...
7276384 Magnetic tunnel junctions with improved tunneling magneto-resistance  
A magnetic tunnel element that can be used, for example, as part of a read head or a magnetic memory cell, includes a first layer formed from an amorphous material, an amorphous tunnel barrier...
7273775 Reliable and scalable virtual ground memory array formed with reduced thermal cycle  
According to one exemplary embodiment, a method of fabricating a virtual ground memory array includes forming a number of polysilicon segments on a gate dielectric layer, where the gate dielectric...
7271438 Self-aligned silicide for word lines and contacts  
An embodiment of a floating-gate memory cell has a tunnel dielectric layer formed overlying a semiconductor substrate; a drain region formed in a semiconductor substrate adjacent a first side of...
7271062 Non-volatile memory cell and fabricating method thereof and method of fabricating non-volatile memory  
A method of fabricating a non-volatile memory is provided. In the fabricating method, a plurality of stack gate structures is formed on a substrate and a plurality of doped regions is formed in the...