Matches 451 - 483 out of 483 < 1 2 3 4 5 6 7 8 9 10
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4814291 Method of making devices having thin dielectric layers  
Certain devices require a high quality thin (<25 nanometer) dielectric layer formed on a deposited silicon layer. Applications include capacitor dielectrics in dynamic memories and linear...
4808259 Plasma etching process for MOS circuit pregate etching utiliizing a multi-step power reduction recipe  
A method for etching of metal-oxide-semiconductor (MOS) devices utilizing a multi-step power reduction plasma etching recipe to reduce ion bombardment damage on the resulting surface. The...
4789560 Diffusion stop method for forming silicon oxide during the fabrication of IC devices  
High quality silicon oxide is grown for integrated circuits by oxidizing poly-crystalline silicon under an oxygen gas flow. A diffusion stop layer of thermal silicon nitride is formed on the...
4780431 Process for making structures including E2PROM nonvolatile memory cells with self-aligned layers of silicon and associated transistors  
The process provides for obtaining in the areas intended for the formation of the transistors windows in the intermediate oxide layer between the two silicon layers and, before final etching of the...
4769340 Method for making electrically programmable memory device by doping the floating gate by implant  
In the present invention, asperity in the floating gate of an EPROM or EEPROM device is reduced. An improved process for fabricating ultrahigh coupling interpoly isolation dielectrics comprising a...
4764479 Semiconductor integrated circuit device and method of manufacturing the same  
A semiconductor integrated circuit device, especially an EPROM (Electrically Programmable Read Only Memory) device which consists of an MIS type memory transistor portion having a floating gate...
4744861 Method of producing semiconductor device using reactive ion etching  
A method of producing a semiconductor device comprises the steps of forming on a substrate a layer of a material selected from a group consisting of aluminum, aluminum alloy, titanium, polysilicon...
4735919 Method of making a floating gate memory cell  
A method of making a floating gate memory cell which relies on control gate to floating gate conduction to charge and discharge the floating gate. The gate oxide and inter-level dielectric...
4616402 Method of manufacturing a semiconductor device with a stacked-gate-electrode structure  
A method of manufacturing a semiconductor device with a stacked-gate-electrode structure which includes; forming source and drain regions in the surface portion of a semiconductor substrate in a...
4612212 Method for manufacturing E.sup.2 PROM  
An erase gate is formed for erasing data from a floating gate in a semiconductor memory device having the floating gate and a control gate. Furthermore, in order to achieve electrical insulation...
4597159 Method of manufacturing SiO.sub.2 -Si interface for floating gate semiconductor device  
A semiconductor device is manufactured by forming a first insulating film on a surface of a semiconductor substrate of a first conductivity type, and a first nonmonocrystalline silicon film is...
4519849 Method of making EPROM cell with reduced programming voltage  
An improved floating gate MOS EPROM cell which is programmable at a lower potential (12 volts) than prior art devices which often require 25 volts. The oxide thickness between the floating gate and...
4495693 Method of integrating MOS devices of double and single gate structure  
A nonvolatile semiconductor memory device is provided having a MOS transistor and a floating gate type MOS transistor. The length of an overlap between a floating gate and a drain region of the...
4494301 Method of making semiconductor device with multi-levels of polycrystalline silicon conductors  
A method of making a semiconductor device having multi-levels of polycrystalline silicon conductors insulated from each other and from the silicon substrate on which the semiconductor device if...
4488931 Process for the self-alignment of a double polycrystalline silicon layer in an integrated circuit device through an oxidation process  
On a substrate of monocrystalline silicon there are formed, one after another, a first oxide layer, a first polycrystalline silicon layer, a second intermediate oxide layer and a second...
4455194 Method for producing a semiconductor device  
A method for producing a semiconductor device provided with a fuse including the steps of forming a fuse layer on an insulating layer formed on a semiconductor substrate, forming an interrupting...
4448800 Method for the manufacture of semiconductor device using refractory metal in a lift-off step  
A semiconductor manufacturing method which uses a refractory metal as a lift-off material and employs, in combination, a dry etching process suitable for forming a miniature pattern without...
4373249 Method of manufacturing a semiconductor integrated circuit device  
A semiconductor integrated circuit device, especially an EPROM (Electrically Programmable Read Only Memory) device which consists of an MIS type memory transistor portion having a floating gate...
4372031 Method of making high density memory cells with improved metal-to-silicon contacts  
Semiconductor read only memory (ROM) or electrically programmable memory (EPROM) devices are constructed using a metal-to-silicon contact arrangement which provides small cell size. An intervening...
4355455 Method of manufacture for self-aligned floating gate memory cell  
A floating gate memory cell has its control gate self-aligned to the floating gate in the source to drain direction and its floating gate self-aligned to the channel region in that direction and...
4334347 Method of forming an improved gate member for a gate injected floating gate memory device  
An improved gate injected, floating gate memory device is described having improved charge retention and endurance characteristics is described in which the barrier height for the injection of...
4305973 Laser annealed double conductor structure  
In double conductor micro-electronic structures, prior to the low temperature deposition or growth of an insulating layer over a polycrystalline or amorphous surface, the surface is annealed using...
4295265 Method for producing a nonvolatile semiconductor memory  
In a nonvolatile semiconductor memory which comprises a source region and a drain region formed on one surface of a semiconductor substrate having one conductivity type, a first insulating film...
4288256 Method of making FET containing stacked gates  
A field effect transistor (FET) comprising a floating gate and a control gate in a stacked relationship with each other and being self-aligned with each other and self-aligned with respect to...
4278989 Semiconductor device having cross wires  
A lower member of a cross wire structure formed in a semiconductor device, such as an MIS type semiconductor memory device, is provided with a structure of at least two layers of an...
4267632 Process for fabricating a high density electrically programmable memory array  
A process for fabricating an MOS electrically programmable memory array which includes a plurality of floating gate memory devices is disclosed. The process employs two layers of polysilicon, each...
4240196 Fabrication of two-level polysilicon devices  
In a two-level overlapping polysilicon device even the slightest amount of undercutting of an oxide layer (12) which underlies a first polysilicon layer (14) can lead to unacceptably low breakdown...
4191603 Making semiconductor structure with improved phosphosilicate glass isolation  
In a field effect device such as a charge coupled device or field effect transistor in which at least two levels of polycrystalline silicon conductors are used; these two levels of polycrystalline...
4178396 Method of forming an insulating film  
A method of forming an insulating film of high breakdown voltage on a polycrystalline substance layer which comprises the steps of preparing the polycrystalline substance layer; selectively...
4143178 Manufacturing method of semiconductor devices  
A manufacturing method of semiconductor device having a single layer or multilayer of polycrystalline semiconductor including doped impurity is provided which comprises a step of forming a first...
4142926 Self-aligning double polycrystalline silicon etching process  
A process for fabricating a double layer polycrystalline silicon structure for a metal-oxide-semiconductor (MOS) integrated circuit. The upper polycrystalline silicon layer after being etched to...
4115914 Electrically erasable non-volatile semiconductor memory  
A non-volatile semiconductor storage device comprising a dual gate field effect transistor in which an electrically floating gate acts as a charge storage medium. An insulating layer of an...
3914127 Method of making charge-coupled devices  
Methods of making charge-coupled devices are disclosed, which include deposition of a thin, highly insulating coating of an oxide or nitride of a metal or semi-metal on a patterned first metal...
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