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6620715 Method for forming sub-critical dimension structures in an integrated circuit  
A method is provided for fabricating a device, which includes device components and spacings that may each have a final dimension that is smaller than a minimum dimension obtainable by a...
6617229 Method for manufacturing transistor of double spacer structure  
A method for manufacturing a transistor of a double spacer structure is disclosed, in which a local LDD region is formed by forming a transistor including a gate electrode, and an oxide film spacer...
6613614 Semiconductor device and method of manufacturing the semiconductor device  
A TFT using an aluminum material for a gate electrode is manufactured at a high yield factor. The gate electrode provided over an active layer and a gate insulating film is constituted by a...
6608341 Trench capacitor with capacitor electrodes  
A trench capacitor for use in a semiconductor memory cell is formed in a substrate. The trench capacitor includes a trench having an upper region and a lower region, an insulation collar formed in...
6605520 Method of forming silicon-germanium film  
A method of forming a silicon-germanium (SiGe) film for a gate electrode. In a metal gate manufacture process, as the content of germanium (Ge) is increased, the surface roughness of the...
6602781 Metal silicide gate transistors  
A method for implementing a self-aligned metal silicide gate is achieved by confining a metal within a recess overlying a channel and annealing to cause metal and its overlying silicon to interact...
6599820 Method of producing a semiconductor device  
A method of producing a semiconductor device having a polymetal wiring structure fabricated by a polycrystalline silicon film, a reaction preventing film, and a tungsten film comprising steps of...
6599821 Method for fabricating conductive line pattern for semiconductor device  
A method for fabricating a conductive line pattern for a semiconductor device including the steps of: forming a gate insulation film on the upper surface of a semiconductor substrate; forming a...
6593219 Method for fabricating electrode structure and method for fabricating semiconductor device  
A first metal film of a first metal is deposited on a silicon-containing film containing silicon as a principal constituent, and a second metal film of a nitride of a second metal is deposited on...
6593188 Non-volatile memory device having a silicide layer and fabrication method thereof  
A non-volatile memory device and a fabrication method thereof are provided. A first polysilicon layer, an inter-gate dielectric layer, a second polysilicon layer and a capping layer are stacked...
6589836 One step dual salicide formation for ultra shallow junction applications  
A process for formation of metal silicide on elements of an NMOS device and on elements of a PMOS device, wherein the metal silicide formed on elements of the PMOS device is thinner than the metal...
6589858 Method of making metal gate stack with etch endpoint tracer layer  
A metal gate structure and method of making the same provides a tracer layer over a first metal or metal compound layer. When etching a metal gate, formed of tungsten, for example, with a first...
6586305 Method for producing transistors in integrated semiconductor circuits  
Integrated semiconductor circuits have MOS transistors whose gate electrodes are provided with dopings in order to set the electrical potential of the channel area by changing the ionization energy...
6586321 Method for forming metal silicide layer  
A method of forming a metal silicide layer with low resistance, with minimal consumption of silicon, includes depositing a first metal layer over a silicon-containing region, depositing a second...
6583038 Polycide structure and method for forming polycide structure  
A polycide structure for use in an integrated circuit comprises a silicon layer; a barrier layer comprising ZSix where x is greater than two and Z is chosen from the group consisting of tungsten,...
6573169 Highly conductive composite polysilicon gate for CMOS integrated circuits  
Many integrated circuits include a type of transistor known as a metal-oxide-semiconductor, field-effect transistor, or “mosfet,” which has an insulated gate member that controls its operation....
6573197 Thermally stable poly-Si/high dielectric constant material interfaces  
The present invention provides a method of fabricating a thermally stable polysilicon/high-k dielectric film stack utilizing a deposition method wherein Si-containing precursor gas which includes...
6566209 Method to form shallow junction transistors while eliminating shorts due to junction spiking  
A method of forming shallow junction MOSFETs is achieved. A gate oxide layer is formed overlying a substrate. A first electrode layer, of polysilicon or metal, is deposited. A silicon nitride layer...
6566236 Gate structures with increased etch margin for self-aligned contact and the method of forming the same  
A novel gate structure and a method of forming the same for a self-aligned contact on a semiconductor substrate. The method includes forming a gate oxide layer on the semiconductor substrate. Then...
6566214 Method of making a semiconductor device by annealing a metal layer to form metal silicide and using the metal silicide as a hard mask to pattern a polysilicon layer  
A method of making a semiconductor device is provided. A polysilicon layer is formed over a substrate and a metal layer is formed on the polysilicon layer. The metal layer and the polysilicon layer...
6562685 Method of fabricating field effect transistor  
There is provided a method of fabricating a MOSFET having a source region and a drain region, having a LDD region, respectively, in respective regions directly beneath the edges of the gate...
6562708 Method for incorporating silicon into CVD metal films  
A semiconductor device including a silicon-based substrate with recessed features and a tantalum barrier film having at least about 5% silicon incorporated substantially uniformly throughout the...
6562665 Fabrication of a field effect transistor with a recess in a semiconductor pillar in SOI technology  
For fabricating a field effect transistor, a pillar of semiconductor material is formed, a recess is formed in the top surface of the pillar along the length of the pillar, a gate dielectric...
6559018 Silicon implant in a salicided cobalt layer to reduce cobalt-silicon agglomeration  
A new processing sequence is provided for the process of creating salicided layers of CoSi x . A conventional gate electrode is formed up to the point where the process of salicidation has to be...
6555456 Method of forming iridium conductive electrode/barrier structure  
A conductive barrier, useful as a ferroelectric capacitor electrode, having high temperature stability has been provided. This conductive barrier permits the use of iridium (Ir) metal in IC...
6551885 Low temperature process for a thin film transistor  
A method of manufacturing an integrated circuit utilizes a thin film substrate and a high-k gate dielectric. The method includes providing a mask structure on a top surface of the thin film,...
6551913 Method for fabricating a gate electrode of a semiconductor device  
The present invention relates to a semiconductor technology and more specifically to a method of fabricating a gate electrode of a semiconductor device, where a re-oxidation process that may cause...
6548389 Semiconductor device and method for fabricating the same  
After an insulating film serving as a gate insulating film is formed on a semiconductor substrate, a titanium nitride film is deposited by chemical vapor deposition on the insulating film. Then, a...
6544873 Methods of fabricating integrated circuit field effect transistors including multilayer gate electrodes having narrow and wide conductive layers  
An integrated circuit field effect transistor includes a multilayer gate electrode having a first conductive layer and a second conductive layer on the first conductive layer, wherein the second...
6544890 Process for fabricating semiconductor device having silicide layer with low resistance and uniform profile and sputtering system used therein  
Cobalt is sputtered on a silicon wafer in a deposition chamber of a magnetron sputtering system, and is conveyed to a load-lock chamber where a partial pressure of oxygen and/or the water...
6537843 Thin film transistor and method of manufacturing the same  
A thin film transistor is disclosed, including an insulating substrate, a semiconductor layer formed on the insulating substrate, the semiconductor layer having an active region and an impurity...
6537901 Method of manufacturing a transistor in a semiconductor device  
There is disclosed a method of manufacturing a transistor in a semiconductor device. The present invention forms a Ta film or a TaNx film at a low temperature or forms a first TaNx film in which...
6534400 Method for depositing a tungsten silicide layer  
Disclosed is a method for depositing a tungsten silicide layer on a wafer coated with a polysilicon layer in a CVD process chamber. A surface of the polysilicon layer is pre-treated by introducing...
6534401 Method for selectively oxidizing a silicon/metal composite film stack  
A method of selectively oxidizing a composite film. According to the present invention a substrate of having a composite film comprising of lower silicon film, a barrier layer, and upper metal film...
6534390 Salicide method for producing a semiconductor device using silicon/amorphous silicon/metal structure  
The present invention provides an improved semiconductor device of a Silicon/Amorphous Silicon/Metal Structure (SASM) and a method of making an improved semiconductor device by a salicide process...
6534405 Method of forming a MOSFET device featuring a dual salicide process  
A method for fabricating a MOSFET device using a dual salicide formation procedure has been developed. The process features a first salicide formation procedure used to create a thick metal...
6531380 Method of fabricating T-shaped recessed polysilicon gate transistors  
A method of fabricating a semiconductor transistor device comprising the following steps. A semiconductor structure is provided having an upper silicon layer, a pad dielectric layer over the upper...
6531750 Shallow junction transistors which eliminating shorts due to junction spiking  
A method of forming shallow junction MOSFETs is achieved. A gate oxide layer is formed overlying a substrate. A first electrode layer, of polysilicon or metal, is deposited. A silicon nitride layer...
6531394 Method for forming gate electrode of semiconductor device  
A method for forming a gate electrode of a semiconductor device, which improves thermal stability of a tungsten/polysilicon structure. The method for forming a gate electrode of a semiconductor...
6528401 Method for fabricating polycide dual gate in semiconductor device  
Method for fabricating a polycide dual gate in a semiconductor device fabricates a dual gate having polycide gate electrodes. The polycide can be a cobalt polycide, for example. The method can...
6528404 Semiconductor device and fabrication method thereof  
A semiconductor device and a fabrication method thereof that can improve performance and reliability by restricting the generation of a hot carrier effect is disclosed. Such a semiconductor device...
6528402 Dual salicidation process  
A dual salicidation process has the steps of: covering a sacrificial layer on the top of a polysilicon gate conductor; performing a thermal oxidization process to form a poly-oxide spacer on the...
6524901 Method for forming a notched damascene planar poly/metal gate  
Methods for forming notched gates and semiconductor devices utilizing the notched gates are provided. The methods utilize the formation of a dummy gate on a substrate. The dummy gate is etched to...
6524938 Method for gate formation with improved spacer profile control  
A new process is provided for the creation of an improved gate spacer profile. A layer of hardmask material is patterned over the surface of a layer of gate material. The layer of gate material is...
6524916 Controlled gate length and gate profile semiconductor device and manufacturing method therefor  
An ultra-large scale integrated circuit semiconductor device is provided which has inverted trapezoidal gates with LDD structures having gradual doping profiles and salicided for contacts. The...
6524951 Method of forming a silicide interconnect over a silicon comprising substrate and method of forming a stack of refractory metal nitride over refractory metal silicide over silicon  
The invention encompasses methods of forming silicide interconnects over silicon comprising substrates. In one implementation, a first layer comprising a metal and a non-metal impurity is formed...
6521528 Semiconductor device and method of making thereof  
A semiconductor device includes a semiconductor substrate having a first and a second region, a first wiring layer including a lower layer having polycrystal silicon portions including impurities...
6521518 Method of eliminating weakness caused by high density plasma dielectric layer  
A method of eliminating weakness caused by high-density plasma (HDP) dielectric layer is provided. Before forming the HDP dielectric layer, a hot thermal oxide (HTO) layer is previously formed on...
6521505 Manufacturing method of semiconductor device  
In forming transistor electrodes, after a polysilicon film is formed, RF plasma etching is applied to the surface thereof to remove a natural oxidation film on the surface of the polysilicon film.
6518153 Method for making gate electrodes of low sheet resistance for embedded dynamic random access memory devices  
A method of making embedded DRAM devices having integrated therein a gate electrode of low sheet resistance satisfying the requirement of high performance logic circuitry is provided. The gate...