Matches 151 - 200 out of 516 < 1 2 3 4 5 6 7 8 9 10 11 >
Match Document Document Title
7045427 Polysilicon gate doping level variation for reduced leakage current  
A method for fabricating a transistor on a semiconductor substrate includes varying a polysilicon doping level near a first and second edge of a diffusion region with a polysilicon doping level of...
7041562 Method for forming multiple gate oxide thickness utilizing ashing and cleaning  
Embodiments of the present invention relate to semiconductor structures having multiple gate dielectric structures. One embodiment forms semiconductor devices in multiple regions having different...
7030000 Method for fabricating a metallic oxide of high dielectric constant, metallic oxide of high dielectric constant, gate insulating film and semiconductor element  
A given metallic oxide film is epitaxially grown on a substrate. Then, the substrate and the metallic oxide film are thermally treated to mix the constituent elements of the substrate with the...
7026216 Method for fabricating nitride read-only memory  
A method for fabricating a nitride read-only memory is described. An ONO stacked layer and a protective layer are sequentially formed on a substrate. A patterning/etching process is performed to...
7026219 Integration of high k gate dielectric  
Methods are provided herein for forming electrode layers over high dielectric constant (“high k”) materials. In the illustrated embodiments, a high k gate dielectric, such as zirconium oxide,...
7026220 Method for production of charge-trapping memory devices  
The method aims at improving the charge confinement of the memory layer at the edges facing the regions of buried bitlines. After the deposition of the memory layer between confinement layers and...
7022625 Method of fabricating a gate dielectric layer with reduced gate tunnelling current and reduced boron penetration  
A method of forming a silicon nitride-silicon dioxide, composite gate dielectric layer, offering reduced risk of boron penetration from an overlying boron doped polysilicon gate structure, has been...
7012027 Zirconium oxide and hafnium oxide etching using halogen containing chemicals  
A method is described for selectively etching a high k dielectric layer that is preferably a hafnium or zirconium oxide, silicate, nitride, or oxynitride with a selectivity of greater than 2:1...
7012014 Recessed gate structure with reduced current leakage and overlap capacitance  
A gate structure and method for forming the same the method including providing a silicon substrate including one of N and P-well doped regions and an overlying the CVD silicon oxide layer; forming...
6998357 High dielectric constant metal oxide gate dielectrics  
A method of forming a dielectric layer suitable for use as the gate dielectric layer of a metal-oxide-semiconductor field effect transistor (MOSFET) includes oxidizing the surface of a silicon...
6998317 Method of making a non-volatile memory using a plasma oxidized high-k charge-trapping layer  
A method of fabricating a non-volatile memory device includes preparing a substrate; depositing a layer of HfO 2 by atomic layer deposition; annealing the substrate and HfO 2 layer in situ;...
6991990 Method for forming a field effect transistor having a high-k gate dielectric  
According to one exemplary embodiment, a method for forming a field effect transistor over a substrate comprises a step of forming an interfacial oxide layer over a channel region of the substrate,...
6989336 Process for laminating a dielectric layer onto a semiconductor  
This invention relates to processes useful for fabricating electronic devices, more particularly to a process for laminating a layer of dielectric material onto a semiconductor.
6989556 Metal oxide compound semiconductor integrated transistor devices with a gate insulator structure  
A self-aligned enhancement mode metal-oxide-compound semiconductor field effect transistor ( 10 ) includes a gate insulating structure comprised of a first oxide layer that includes a mixture of...
6972226 Charge-trapping memory cell array and method for production  
In a memory cell array comprising charge-trapping memory cells, local interconnects along the direction of the wordlines for connecting source/drain regions of adjacent memory cells to bitlines are...
6969661 Method for forming a localized region of a material difficult to etch  
A method for forming, in an integrated circuit, a localized region of a material difficult to etch, including the steps of forming a first silicon oxide layer having a thickness smaller than 1 nm...
6946349 Method for integrating a SONOS gate oxide transistor into a logic/analog integrated circuit having several gate oxide thicknesses  
A method for integrating a SONOS device with an improved top oxide with SiO 2 gate oxides of different thickness is described. In a first embodiment during ISSG oxidation to form the SiO 2 gate...
6943076 Semiconductor device and method of manufacturing the same  
Gate insulation films each containing titanium oxide as a primary constituent material are formed on one major surface of a semiconductor substrate. Gate electrode films are formed in contact with...
6936508 Metal gate MOS transistors and methods for making the same  
Semiconductor devices and fabrication methods are provided, in which metal transistor gates are provided for MOS transistors. Metal boride is formed above a gate dielectric to create PMOS gate...
6936503 Method for manufacturing a MOS transistor  
In a pretreatment process, a silicon oxide film ( 13 ) with nitrogen content is formed on a semiconductor substrate ( 10 ). In a segregation process executing heat treatment in an in-oxidiz-able...
6933218 Low temperature nitridation of amorphous high-K metal-oxide in inter-gates insulator stack  
An OXO-type inter-poly insulator (where X is a high-K metal oxide and O is an insulative oxide) is defined by forming an amorphous metal oxide layer on a silicon-based insulator (e.g., a silicon...
6933189 Integration system via metal oxide conversion  
A method and structure for a transistor device comprises forming a source, drain, and trench region in a substrate, forming a first insulator over the substrate, forming a gate electrode above the...
6929956 Ferroelectric random access memory device and fabrication method therefor  
A ferroelectric random access memory (FRAM) device, and a fabrication method therefor, includes seed layers above and below a ferroelectric layer. The seed layers formed above and below faces of...
6927136 Non-volatile memory cell having metal nano-particles for trapping charges and fabrication thereof  
A non-volatile memory cell is described. The non-volatile memory cell comprises a substrate, a charge-trapping layer, a gate and a source/drain. The charge-trapping layer comprises an insulating...
6924237 Method for manufacturing semiconductor integrated circuit device  
A method is used to form a circuit to achieve a high-speed performance and a circuit to attain a high reliability on one and the same substrate, in a semiconductor integrated circuit device...
6919263 High-K dielectric gate material uniquely formed  
A new relatively high-k gate dielectric gate material comprising calcium oxide will reduce leakage from the silicon substrate to the polysilicon gate, prevent boron penetration in p-channel...
6916709 Non-volatile semiconductor memory device and manufacturing method for the same  
A non-volatile semiconductor memory device comprising: a first insulating film provided on a silicon based substrate; a first electrode provided on the first insulating film as a floating gate; a...
6916717 Method for growing a monocrystalline oxide layer and for fabricating a semiconductor device on a monocrystalline substrate  
High quality monocrystalline metal oxide layers are grown on a monocrystalline substrate such as a silicon wafer. The monocrystalline metal oxide is grown on the silicon substrate at a temperature...
6916730 Method for forming a gate  
First of all, a semiconductor substrate is provided. Then a gate oxide layer having an uniform thickness is formed on the semiconductor substrate by way of using thermal oxidation. Subsequently, a...
6913961 Method of manufacturing high-k gate dielectric by use of annealing in high-pressure hydrogen atmosphere  
Disclosed is a method of manufacturing a high-k gate dielectric, characterized in that an annealing process in a forming gas atmosphere, corresponding to a final step of a manufacturing process of...
6911404 Transistor element having an anisotropic high-k gate dielectric  
A field effect transistor comprises a gate insulation layer including an anisotropic dielectric. The orientation is selected such that a first permittivity parallel to the gate insulation layer is...
6908806 Gate metal recess for oxidation protection and parasitic capacitance reduction  
A method of fabricating a semiconductor device having a gate stack structure that includes gate stack sidewall, the gate stack structure having one or more metal layers comprising a gate metalis...
6902977 Method for forming polysilicon gate on high-k dielectric and related structure  
According to one exemplary embodiment, a method for forming a field-effect transistor on a substrate comprises a step of forming a high-k dielectric layer over the substrate. The high-k dielectric...
6893910 One step deposition method for high-k dielectric and metal gate electrode  
A method for forming a semiconductor structure removes the temporary gate formed on the dielectric layer to expose a recess in which oxygen-rich CVD oxide is deposited. A tantalum layer is then...
6890806 Semiconductor integrated electronic device and corresponding manufacturing method  
A method of fabricating a MOS transistor with a controllable and modulatable conduction path through a dielectric gate oxide is disclosed, wherein the transistor structure comprises a dielectric...
6887774 Conductor layer nitridation  
Methods and apparatus for forming word line stacks comprise forming a thin nitride layer coupled between a bottom silicon layer and a conductor layer. In a further embodiment, a diffusion barrier...
6887310 High-k gate dielectrics prepared by liquid phase anodic oxidation  
A method of preparing high-k gate dielectrics by liquid phase anodic oxidation, which first produces a metallic film on the surface of a clean silicon substrate, next oxidizes the metallic film to...
6881657 Semiconductor device and method for manufacturing semiconductor device  
In a method for forming a semiconductor device, the major surface of a substrate is separated into a first element region for forming a first field-effect transistor and a second element region for...
6878988 Non-volatile memory with induced bit lines  
An electrically programmable non-volatile memory cell is provided. A semiconductor substrate is prepared. A pair of spaced apart source/drain (S/D) regions is defined on the semiconductor...
6875678 Post thermal treatment methods of forming high dielectric layers in integrated circuit devices  
High dielectric layers formed from layers of hafnium oxide, zirconium oxide, aluminum oxide, yttrium oxide, and/or other metal oxides and silicates disposed on silicon substrates may be nitrided...
6869843 Non-volatile memory cell with dielectric spacers along sidewalls of a component stack, and method for forming same  
A disclosed method for forming a non-volatile memory cell includes forming a component stack including an electron trapping layer on a substrate surface. A dielectric layer is formed over the...
6867084 Gate structure and method of forming the gate dielectric with mini-spacer  
A field effect transistor gate structure and a method of fabricating the gate structure with a high-k gate dielectric material and high-k spacer are described. A gate pattern or trench is first...
6867101 Method of fabricating a semiconductor device having a nitride/high-k/nitride gate dielectric stack by atomic layer deposition (ALD) and a device thereby formed  
A method of fabricating a semiconductor device, having a nitride/high-k material/nitride gate dielectric stack with good thermal stability which does not diffuse into a silicon substrate, a...
6858497 Non-volatile semiconductor memory device and a method of producing the same  
The present invention prevents production of residue which causes short-circuit between word lines. A memory cell comprises a channel formation region CH, charge storage films CSF each comprised of...
6852582 Carbon nanotube gate field effect transistor  
The present invention generally relates to an apparatus and method of carbon nanotube (CNT) gate field effect transistor (FET), which is used to replace the current metal gate of transistor for...
6849870 Organic gate insulating film and organic thin film transistor using the same  
Disclosed is an organic gate insulating film and an organic thin film transistor using the same, in which a photo-alignment group is introduced into an organic insulating polymer, so that an...
6844271 Process of CVD of Hf and Zr containing oxynitride films  
This invention relates to a chemical vapor deposition process for forming Zr or Hf oxynitride films suitable for use in electronic applications such as gate dielectrics. The process comprises: a....
6838320 Method for manufacturing a semiconductor integrated circuit device  
In a semiconductor integrated circuit device having a system-on-chip structure in which a DRAM and a logic integrated circuit are mixedly mounted on a chip, a silicide layer is formed on the...
6821873 Anneal sequence for high-&kgr film property optimization  
A method for improving high-κ gate dielectric film ( 104 ) properties. The high-κ film ( 104 ) is subjected to a two step anneal sequence. The first anneal is a high temperature anneal in a...
6821835 Chemical vapor deposition of silicate high dielectric constant materials  
A method of fabricating an electronic device over a semiconductor substrate, the method comprising the steps of: forming a conductive structure over the semiconductor substrate (step 106 of FIG. ...
Matches 151 - 200 out of 516 < 1 2 3 4 5 6 7 8 9 10 11 >