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6878599 Semiconductor device and method of manufacturing the same  
There is provided a MISFET which suppresses a short-channel effect in a deep submicron region and has a low parasitic resistance, a low parasitic capacitance, and a small drain junction leakage...
6875677 Method to control the interfacial layer for deposition of high dielectric constant films  
Methods of forming an interfacial layer on a hydrogen-passivated substrate are provided. These methods utilize atomic layer deposition techniques incorporating metal nitrate-based precursors, such...
6875676 Methods for producing a highly doped electrode for a field effect transistor  
A highly localized diffusion barrier is incorporated into a polysilicon line to allow the doping of the polysilicon layer without sacrificing an underlying material layer. The diffusion barrier is...
6872647 Method for forming multiple fins in a semiconductor device  
A method of forming multiple fins in a semiconductor device includes forming a structure having an upper surface and side surfaces on the semiconductor device. The semiconductor device includes a...
6869868 Method of fabricating a MOSFET device with metal containing gate structures  
A method of forming a composite gate structure for a planar MOSFET device, as well as for vertical, double gate, FINFET device, has been developed. The method features a composite gate structure...
6867119 Nitrogen oxidation to reduce encroachment  
A method of manufacturing a metal oxide semiconductor. A gate structure of the metal oxide semiconductor is etched. A nitrogen-comprising gas, which may be NO or N 2 O, is made to flow over the...
6864161 Method of forming a gate structure using a dual step polysilicon deposition procedure  
A process for forming a conductive gate structure for a sub-0.25 MOSFET technology, has been developed. The process features a conductive gate structure defined from a composite polysilicon or...
6864164 Finfet gate formation using reverse trim of dummy gate  
A method of forming a gate electrode for a fin field effect transistor (FinFET) includes forming a fin on a substrate and forming an oxide layer over the fin. The method further includes forming a...
6858524 Method of depositing barrier layer for metal gates  
A method of manufacturing a high performance MOS device and transistor gate stacks comprises forming a gate dielectric layer over a semiconductor substrate; forming a barrier layer over the gate...
6855605 Semiconductor device with selectable gate thickness and method of manufacturing such devices  
A method of forming layers, in the same device material, with different thickness or layer height in a semiconductor device comprises forming device material layer or gate electrode layer...
6852599 Method for fabricating MOS transistors  
A method for fabricating a metal oxide semiconductor (MOS) transistor, which can reduce the junction capacitance without degradation of transistor characteristics including forming a buffer oxide...
6849487 Method for forming an electronic structure using etch  
A method of forming a conductive structure having a length that is less than the length define by photolithographic patterning. A silicon layer ( 12 ) is formed in a MeOx dielectric layer ( 11 ) is...
6849511 Semiconductor device and method for fabricating the same including interconnection of two electrodes  
A semiconductor device comprises a first transistor 38 a having a first gate electrode 22 ; a second transistor 38 b having a second gate electrode 34 which is different from the first gate...
6849557 Undoped silicon dioxide as etch stop for selective etch of doped silicon dioxide  
The present invention relates to a process for selectively plasma etching a structure upon a semiconductor substrate to form designated topographical structure thereon utilizing an undoped silicon...
6846730 Two stage etching of silicon nitride to form a nitride spacer  
A method of etching nitride over oxide is provided for the formation of vertical profile nitride spacers with high uniformity while maintaining the integrity of underlying thin oxide layers. The...
6846740 Wafer-level quasi-planarization and passivation for multi-height structures  
Methods in accordance with the present invention provide a quasi-planarized surface between one or more semiconductor devices and at least a portion of surrounding passivation material, where the...
6844252 Semiconductor processing methods of forming a conductive gate and line  
A semiconductor processing method of forming a conductive gate or gate line over a substrate includes, a) forming a conductive gate over a gate dielectric layer on a substrate, the gate having...
6841461 Method for forming gate electrode of semiconductor device  
Disclosed is a method for a gate electrode of a semiconductor device, which forms a re-oxidation film of a sufficient thickness by a low temperature re-oxidation process. Gate oxide film,...
6838347 Method for reducing line edge roughness of oxide material using chemical oxide removal  
A method for reducing line edge roughness (LER) of a semiconductor gate structure includes patterning a photoresist layer formed over an oxide hardmask layer. The photoresist layer is etched so as...
6838365 Methods of forming electronic components, and a conductive line  
A method of forming an electronic component includes forming first and second conductive materials over a substrate, with the second material having a higher oxidation rate than an oxidation rate...
6838322 Method for forming a double-gated semiconductor device  
A method for forming a polysilicon FinFET ( 10 ) or other thin film transistor structure includes forming an insulative layer ( 12 ) over a semiconductor substrate ( 14 ). An amorphous silicon...
6835639 Multiple work function gates  
A method of forming a first and second transistors with differing work function gates by differing metals deposited to react with a silicon or silicon-germanium gate layer.
6835612 Method for fabricating a MOSFET having a very small channel length  
A gate layer stack formed with at least two layers is firstly patterned anisotropically and then thelower layer is etched. An isotropic, preferably selective etching step effects a lateral...
6835637 Multi-layered gate for a CMOS imager  
A multi-layered gate for use in a CMOS or CCD imager formed with a second gate at least partially overlapping it. The multi-layered gate is a complete gate stack having an insulating layer, a...
6835670 Method of manufacturing semiconductor device  
A silicon nitride film and a silicon oxynitride film as an antireflection coating are successively formed on a silicon substrate. The silicon nitride film and the silicon oxynitride film are...
6835636 Method for fabricating source/drain devices  
A method for fabricating source/drain devices. A semiconductor substrate is provided with a gate formed on the semiconductor substrate, and a hard mask layer formed on the gate. A first doped area...
6835622 Gate electrode doping method for forming semiconductor integrated circuit microelectronic fabrication with varying effective gate dielectric layer thicknesses  
Within a semiconductor fabrication and a method for fabricating the semiconductor fabrication there is provided a series of field effect devices having in a first instance an optional pair of...
6835662 Partially de-coupled core and periphery gate module process  
The invention is an apparatus and a method of manufacturing a structure. The method includes the step of patterning a layer to include a line and space pattern. A space of the line and space...
6830996 Device performance improvement by heavily doped pre-gate and post polysilicon gate clean  
The present disclosure provides a method is provided for fabricating a metal oxide semiconductor (MOS) gate stack on a semiconductor substrate. The method includes generating moisture on a surface...
6830997 Semiconductor devices and methods for forming semiconductor devices  
Semiconductor devices and methods for forming semiconductor devices are disclosed. In a disclosed method, a gate of a semiconductor device is formed by separately forming a lower gate and an upper...
6828219 Stacked spacer structure and process  
A stacked spacer structure and process adapted for a stacked layer on a semiconductor substrate is described. The stacked spacer structure is formed on the sidewalls of the stacked layer which...
6828181 Dual gate material process for CMOS technologies  
A method and structure for a method of manufacturing a device having different types of transistors, wherein gates of the different types of transistors in the device comprise different materials....
6828201 Method of manufacturing a top insulating layer for a sonos-type device  
A method of forming a top oxide layer of a SONOS-type nonvolatile storage device is disclosed. According to a first embodiment, a method may include forming an in situ steam generation (ISSG) top...
6825106 Method of depositing a conductive niobium monoxide film for MOSFET gates  
A method is provided to deposit niobium monoxide gates. An elemental metal target, or a composite niobium monoxide target is provided within a sputtering chamber. A substrate with gate dielectric,...
6818485 Thin film transistor, thin film transistor array substrate, liquid crystal display device, and electroluminescent display device  
A thin film transistor having a source region and a drain region having a low melting point region composed of a semiconductor with a melting point lower than that of the semiconductor of the...
6818488 Process for making a gate for a short channel CMOS transistor structure  
The invention relates to a process for making a gate for a CMOS transistor structure, made from a stack realized on a face in a semi-conducting material of a substrate, said stack comprising a gate...
6818536 Semiconductor device and method of manufacturing the same  
A sidewall oxide layer and a sidewall insulation layer are formed to cover the edge portion of an SOI layer. A channel stopper region is formed in the vicinity of the edge portion of the SOI layer....
6818517 Methods of depositing two or more layers on a substrate in situ  
The present invention provides methods of depositing two or more layers on a substrate in situ. In particular, methods are provided for forming a high-k dielectric gate stack on a substrate....
6818535 Thin phosphorus nitride film as an n-type doping source used in a laser doping technology  
An improved method and system for laser doping a semiconductor material is described. In the invention, phosphorous nitride is used as a dopant source. The phosphorous nitride is brought into close...
6815299 Method for manufacturing silicon carbide device using water rich anneal  
A method for manufacturing a SiC device embraces (a) depositing a polysilicon film above a SiC substrate; (b) delineating the polysilicon film into required pattern; and (c) annealing the SiC...
6815295 Method of manufacturing field effect transistors  
In a semiconductor device and a method of manufacturing the same according to the present invention, a trade-off relationship between threshold values and a diffusion layer leakage is eliminated...
6815347 Method of forming a reflective electrode  
The present invention provides a method of forming a TFT and a reflective electrode having recesses or projections with reduced manufacturing cost and a reduced number of manufacturing steps, and...
6815268 Method for forming a gate in a FinFET device  
A method of forming a gate in a FinFET device includes forming a fin on an insulating layer, forming source/drain regions and forming a gate oxide on the fin. The method also includes depositing a...
6812119 Narrow fins by oxidation in double-gate finfet  
A method of forming fins for a double-gate fin field effect transistor (FinFET) includes forming a second layer of semi-conducting material over a first layer of semi-conducting material and...
6812536 MOSFET with graded gate oxide layer  
A smile oxide film, serving as a gate oxide film, is formed under a three-layer poly-metal gate consisting of a doped polysilicon layer, a tungsten layer, and a SiON layer. The smile oxide film has...
6806154 Method for forming a salicided MOSFET structure with tunable oxynitride spacer  
A method for fabricating a MOSFET structure is disclosed. A coating is provided on the upper surface of a gate. Thereafter doped regions are implanted into the substrate. A layer is provided over...
6806156 Process for fabricating a MOS transistor of short gate length and integrated circuit comprising such a transistor  
Process for fabricating a transistor comprises producing source and drain extension regions, consisting in forming a gate region on a semiconductor substrate and in implanting dopants into the...
6803266 Process for passivating the semiconductor-dielectric interface of a MOS device and MOS device formed thereby  
A process for passivating the semiconductor-dielectric interface of a MOS structure to reduce the interface state density to a very low level. A particular example is a MOSFET having a tungsten...
6800542 Method for fabricating ruthenium thin layer  
A method for fabricating a Ru thin layer by using an atomic layer deposition (ALD) technique is disclosed. The method comprises the steps of loading a substrate into a reaction chamber for an...
6800911 Method of making a polycide interconnection layer having a silicide film formed on a polycrystal silicon for a semiconductor device  
A semiconductor device has a semiconductor substrate and a conductive layer formed above the semiconductor substrate. The conductive layer has a silicon film, a silicide film formed on the silicon...
Matches 251 - 300 out of 864 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >