Patents in Class 438/585

Matches 51 - 100 out of 863

Match	Document	Document Title
51	7517806	Integrated circuit having pairs of parallel complementary FinFETs A method and structure for an integrated circuit structure that utilizes complementary fin-type field effect transistors (FinFETs) is disclosed. The invention has a first-type of FinFET which...
52	7517746	Metal oxide semiconductor transistor with Y shape metal gate and fabricating method thereof A method of manufacturing a metal oxide semiconductor transistor having a metal gate is provided. The method firstly includes a step of providing a substrate. A dummy gate is formed on the...
53	7507651	Method for fabricating semiconductor device with bulb shaped recess gate pattern A method for fabricating a semiconductor device with a bulb shaped recess gate pattern includes selectively etching a first portion of a substrate to form a first recess; forming a spacer on...
54	7507619	Semiconductor device and method for manufacturing semiconductor device Provided are a semiconductor device and a method for manufacturing the semiconductor device. The semiconductor device includes: a gate electrode formed of polysilicon on a substrate with a gate...
55	7498223	Semiconductor devices having improved field plates A field effect transistor device and method, such device having source and drain electrodes in ohmic contact a semiconductor. A gate electrode-field plate structure is disposed between the source...
56	7498246	Method of manufacturing a semiconductor device having a stepped gate structure Disclosed herein are a method of manufacturing a semiconductor device, which can prevent a stepped gate from leaning and increase the channel length of the device, thus contributing to an increase...
57	7491589	Back gate FinFET SRAM A compact semiconductor structure having back gate(s) for controlling threshold voltages and associated method of formation is disclosed. Fabrication of the semiconductor structure starts with a...
58	7488684	Organic aluminum precursor and method of forming a metal wire using the same An organic aluminum precursor includes aluminum as a central metal, and borohydride and trimethylamine as ligands. In a method of forming an aluminum layer or wire, the organic aluminum presursor...
59	7488656	Removal of charged defects from metal oxide-gate stacks The present invention provides a method for removing charged defects from a material stack including a high k gate dielectric and a metal contact such that the final gate stack, which is useful in...
60	7479459	Semiconductor device manufacturing method and semiconductor device manufacturing apparatus A semiconductor device manufacturing method and a semiconductor device manufacturing apparatus which enable to detect an etching end-point with high accuracy are provided. In etching of a lower...
61	7473623	Providing stress uniformity in a semiconductor device A method includes forming a plurality of functional features on a semiconductor layer in a first region. A non-functional feature corresponding to the functional feature is formed adjacent at least...
62	7473626	Control of poly-Si depletion in CMOS via gas phase doping A method to control the poly-Si depletion effect in CMOS structures utilizing a gas phase doping process which is capable of providing a high concentration of dopant atoms at the gate...
63	7465618	Semiconductor device and method for fabricating the same A semiconductor device includes: a semiconductor substrate; a gate insulating film formed on the semiconductor substrate and made of a high-dielectric-constant material composed of a plurality of...
64	7456068	Forming ultra-shallow junctions A method to form an ultra-shallow junction is described. In one embodiment, a replacement gate process is utilized to enable the overlap of a gate electrode over the regions of a semiconductor...
65	7456058	Stressed MOS device and methods for its fabrication Stressed MOS devices and methods for their fabrication are provided. The stressed MOS device comprises a T-shaped gate electrode formed of a material having a first Young's modulus. The T-shaped...
66	7449402	Method of fabricating semiconductor device Provided is a method of fabricating a semiconductor device, the method including: forming an insulating layer on a single crystal substrate; etching the insulating layer in a predetermined pattern...
67	7446050	Etching and plasma treatment process to improve a gate profile A method for improving a polysilicon gate electrode profile to avoid preferential RIE etching in a polysilicon gate electrode etching process including carrying out a multi-step etching process...
68	7442632	Semiconductor device n-channel type MOS transistor with gate electrode layer featuring small average polycrystalline silicon grain size In a semiconductor device including a semiconductor substrate, and an n-channel type MOS transistor produced in the semiconductor substrate, the n-channel type MOS transistor includes a gate...
69	7435671	Trilayer resist scheme for gate etching applications A trilayer resist (TLR) patterning scheme is provided to enable gate conductors, particularly polySi gate conductors, with critical dimensions (CDs) of less than 40 nm and minimal LER and LWR. In...
70	7432206	Self-aligned manufacturing method, and manufacturing method for thin film fuse phase change ram A method for manufacturing a self aligned narrow structure over a wider structure based on mask trimming. A method for manufacturing a memory device comprises forming an electrode layer on a...
71	7432144	Method for forming a transistor for reducing a channel length A method of forming a transistor including: forming a gate oxide layer pattern and gate polysilicon layer pattern on a silicon substrate; forming a low energy ion implantation region aligned with...
72	7429524	Transistor design self-aligned to contact The present invention provides a method of manufacturing a transistor device, a transistor device, and a method for manufacturing an integrated circuit. In one aspect, the method of manufacturing a...
73	7422969	Multi-step process for patterning a metal gate electrode The present invention provides a method for patterning a metal gate electrode and a method for manufacturing an integrated circuit including the same. The method for patterning the metal gate...
74	7416931	Methods for fabricating a stress enhanced MOS circuit Methods are provided for fabricating a stress enhanced MOS circuit. One method comprises the steps of depositing a stressed material overlying a semiconductor substrate and patterning the stressed...
75	7416949	Fabrication of transistors with a fully silicided gate electrode and channel strain Manufacturing a semiconductor device by forming first and second gates including patterning a silicon-containing layer on a substrate. Etched simultaneously the patterned silicon-containing layer...
76	7416967	Semiconductor device, and method for manufacturing the same According to an aspect of the invention, a semiconductor device comprises: a N-channel MIS transistor comprising; a p-type semiconductor layer; a first gate insulation layer formed on the p-type...
77	7413955	Transistor for memory device and method for manufacturing the same Disclosed is a transistor for a memory device realizing both a step-gated asymmetry transistor and a fin transistor in a cell and a method for manufacturing the same. The transistor has an active...
78	7410855	Semiconductor device A semiconductor device includes a semiconductor substrate, an nMISFET formed on the substrate, the nMISFET including a first dielectric formed on the substrate and a first metal gate electrode...
79	7405161	Method for fabricating a semiconductor device Method for fabricating a semiconductor device in which a by-product of etching is deposited on a photoresist film for using as a mask. The method for fabricating a semiconductor device includes the...
80	7399664	Formation of spacers for FinFETs (Field Effect Transistors) A structure and a method for forming the same. The structure includes (a) a substrate, (b) a semiconductor fin region on top of the substrate, (c) a gate dielectric region on side walls of the...
81	7397095	Semiconductor device having a dual gate electrode and methods of forming the same A semiconductor device having a dual gate electrode and a method of forming the same are provided. The semiconductor device includes a substrate including first and second regions. A first gate...
82	7396748	Semiconductor device includes gate insulating film having a high dielectric constant A semiconductor device comprising a semiconductor substrate and a MOSFET provided on the semiconductor substrate, the MOSFET including a gate insulating film and a gate electrode provided on the...
83	7393768	Etching of structures with high topography The present invention relates to a method for the patterning of a stack of layers on a surface with high topography. A method of the present invention can be used for gate patterning for multiple...
84	7391089	Semiconductor device and method of manufacturing the same A semiconductor device which includes a field effect transistor having a gate electrode on the upper side of a semiconductor substrate, with a gate insulation film therebetween, wherein at least...
85	7384823	Method for manufacturing a semiconductor device having a stabilized contact resistance Disclosed is a method for forming a storage node contact of a semiconductor device. In such a method, there is provided a substrate formed with gates and source/drain regions. A landing plug poly...
86	7378323	Silicide process utilizing pre-amorphization implant and second spacer A gate electrode is formed on a substrate with a gate insulating layer therebetween. A liner is then deposited on sidewalls of the gate electrode. Source/drain extensions are implanted into the...
87	7375015	Manufacturing method which prevents abnormal gate oxidation A method for manufacturing a gate electrode structure for preventing abnormal oxidation of a refractory metal due to an oxidation process, includes forming an insulating film on a surface of a...
88	7371669	Method of forming a gate of a semiconductor device In a method for forming a gate in a semiconductor device, a first preliminary gate structure is formed on a substrate. The first preliminary gate structure includes a gate oxide layer, a...
89	7368336	Organic insulator, organic thin film transistor array panel including organic insulator, and manufacturing method therefor An insulating film according to an embodiment of the present invention has Chemical Formula 1 wherein the Rs are equal to or different from each other, m is an integer, the Rs have...
90	7344948	Methods of forming transistors The invention encompasses a method of incorporating nitrogen into a silicon-oxide-containing layer. The silicon-oxide-containing layer is exposed to a nitrogen-containing plasma to introduce...
91	7344966	Manufacturing method for a power device having an auto-aligned double thickness gate layer and corresponding device A manufacturing method for a power device integrated on a semiconductor substrate with double thickness of a gate dielectric layer is described, which comprises the following steps: forming first...
92	7344965	Method of etching dual pre-doped polysilicon gate stacks using carbon-containing gaseous additions A method for making dual pre-doped gate stacks used in semiconductor applications such as complementary metal oxide semiconductor (CMOS) devices and metal oxide semiconductor field effect...
93	7341956	Disposable hard mask for forming bit lines A method includes forming a group of disposable hard mask structures on a semiconductor device that includes a group of memory cells. The method further includes using the disposable hard mask...
94	7335544	Method of making MOSFET device with localized stressor A metal-oxide-semiconductor field-effect transistors (MOSFET) having localized stressors is provided. In accordance with embodiments of the present invention, a transistor comprises a high-stress...
95	7326634	Bulk non-planar transistor having strained enhanced mobility and methods of fabrication A method of a bulk tri-gate transistor having stained enhanced mobility and its method of fabrication. The present invention is a nonplanar transistor having a strained enhanced mobility and its...
96	7320931	Interfacial layer for use with high k dielectric materials Methods and apparatus are provided for depositing a layer of pure germanium can on a silicon substrate. This germanium layer is very thin, on the order of about 14 Å, and is less than the...
97	7319255	Semiconductor device including a metal gate electrode formed in a trench and method of forming thereof A semiconductor device including a transistor and a method of forming thereof are provided. The semiconductor device comprises a metal gate electrode. A lower portion of the metal gate electrode...
98	7312140	Film forming method A technique is provided that is capable of employing raw materials having no halogen, which has a high possibility of exerting a bad influence upon semiconductor elements, thereby to easily form...
99	7307009	Phosphoric acid free process for polysilicon gate definition A method of defining a patterned, conductive gate structure for a MOSFET device on a semiconductor substrate includes forming a conductive layer over the semiconductor substrate and forming a...
100	7303996	High-K gate dielectric stack plasma treatment to adjust threshold voltage characteristics A method for treating a gate structure comprising a high-K gate dielectric stack to improve electric performance characteristics including providing a gate dielectric layer stack including a binary...

Matches 51 - 100 out of 863

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