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7364995 Method of forming reduced short channel field effect transistor  
A method for manufacturing a semiconductor device capable of reducing a short channel effect, whereby the semiconductor device includes a pair of impurity regions for a source and a drain formed on...
7326631 Method of manufacturing MOS transistors with gate electrodes formed in a packet of metal layers deposited upon one another  
Consistent with an example embodiment, a method of manufacturing a semiconductor device comprises MOS transistors having gate electrodes formed in a number of metal layers deposited upon one...
RE39988 Deposition of dopant impurities and pulsed energy drive-in  
A semiconductor doping process which enhances the dopant incorporation achievable using the Gas Immersion Laser Doping (GILD) technique. The enhanced doping is achieved by first depositing a thin...
7303967 Method for fabricating transistor of semiconductor device  
Disclosed is a method for fabricating a transistor of a semiconductor device, the method comprising the steps of: providing a semiconductor; forming a gate electrode; performing a low-density ion...
7247548 Doping method and semiconductor device using the same  
The present invention achieves a shallow junction of a source and a drain, and provides a doping method which makes device properties reproducible and a semiconductor device fabricated using the...
7235468 FinFET device with reduced DIBL  
FinFET devices formed with a Silicon On Insulator (SOI) technology with reduced Drain Induced Barrier Lowering (DIBL) characteristics and methods for producing the same. The methods involve dopant...
7226803 Photodiode with ultra-shallow junction for high quantum efficiency CMOS image sensor and method of formation  
A pinned photodiode with an ultra-shallow highly-doped surface layer of a first conductivity type and a method of formation are disclosed. The ultra-shallow highly-doped surface layer has a...
7157374 Method for removing a cap from the gate of an embedded silicon germanium semiconductor device  
A method of removing the cap from a gate of an embedded SiGe semiconductor device includes the formation of the embedded SiGe semiconductor device with the cap consisting of a cap material on top...
7144751 Back-contact solar cells and methods for fabrication  
Methods for fabrication of emitter wrap through (EWT) back-contact solar cells and cells made by such methods. Certain methods provide for higher concentration of dopant in conductive vias compared...
7118997 Implantation of gate regions in semiconductor device fabrication  
A method for implanting gate regions essentially without implanting regions of the semiconductor layer where source/drain regions will be later formed. The method includes the steps of (a)...
7118976 Methods of manufacturing MOSFETs in semiconductor devices  
Methods of fabricating MOSFETs in semiconductor/r devices are disclosed. One example method may include forming an isolation layer on a semiconductor substrate and forming a capping layer thereon,...
7045417 Method of manufacturing semiconductor device  
A method of manufacturing a semiconductor device, which comprises forming a first semiconductor film on a surface of a semiconductor substrate, adsorbing a first impurity on a surface of the first...
7033916 Shallow junction semiconductor and method for the fabrication thereof  
A method of forming an integrated circuit with a semiconductor substrate is provided. A gate dielectric is formed on the semiconductor substrate, and a gate is formed on the gate dielectric. A...
7011734 Method of manufacturing semiconductor device having silicide layer  
A method of manufacturing a semiconductor device has the steps of: (a) evacuating a sputtering chamber to a pressure of 1.5×10 −8 torr to 9×10 −8 torr and heating a silicon substrate to a...
6972222 Temporary self-aligned stop layer is applied on silicon sidewall  
A method is provided for forming NMOS and PMOS transistors with ultra shallow source/drain regions having high dopant concentrations. First sidewall spacers and nitride spacers are sequentially...
6960486 Mid-IR microchip laser: ZnS:Cr2+ laser with saturable absorber material  
A method of fabrication of laser gain material and utilization of such media includes the steps of introducing a transitional metal, preferably Cr 2+ thin film of controllable thickness on the ZnS...
6924200 Methods using disposable and permanent films for diffusion and implantation doping  
Methods are provided that use disposable and permanent films to dope underlying layers through diffusion. Additionally, methods are provided that use disposable films during implantation doping and...
6872644 Semiconductor device with non-compounded contacts, and method of making  
A semiconductor device includes source and drain contact regions which include a non-compounded combination of a semiconductor material and at least one metal. The metal may include an elemental...
6872643 Implant damage removal by laser thermal annealing  
A method of manufacturing a semiconductor device includes forming a layer over a substrate, and doping the layer with a dopant, after which the layer is laser thermal annealed. The layer can be a...
6852611 ROM embedded DRAM with dielectric removal/short  
A ROM embedded DRAM allows hard programming of ROM cells by shorting DRAM capacitor plates during fabrication. In one embodiment, the intermediate dielectric layer is removed and the plates are...
6849529 Deep-trench capacitor with hemispherical grain silicon surface and method for making the same  
A method for manufacturing a trench capacitor that includes providing a semiconductor substrate, forming a deep trench in the substrate, forming a thin sacrificial layer on a surface of the trench,...
6828214 Semiconductor member manufacturing method and semiconductor device manufacturing method  
This invention provides an SOI substrate manufacturing method using a transfer method (bonding and separation). A separation layer ( 12 ) is formed on a silicon substrate ( 11 ). A silicon layer (...
6825104 Semiconductor device with selectively diffused regions  
The present invention describes a method of manufacturing a semiconductor device, comprising a semiconductor substrate in the shape of a slice, the method comprising the steps of: step 1)...
6803287 Method for forming a semiconductor device having contact wires of different sectional areas  
In a semiconductor device ( 10 ), plural diffusion layer areas ( 2, 3 ) are formed so that the impurity concentration of the diffusion layer area ( 2 ) is set to be higher than that of the...
6784018 Method of forming chalcogenide comprising devices and method of forming a programmable memory cell of memory circuitry  
A first conductive electrode material is formed on a substrate. Chalcogenide comprising material is formed thereover. The chalcogenide material comprises A x Se y . A silver comprising layer is...
6774013 N-type boron-carbide semiconductor polytype and method of fabricating the same  
A non-doped n-type boron carbide semiconductor polytype and a method of fabricating the same is provided. The n-type boron carbide polytype may be used in a device for detecting neutrons, electric...
6764906 Method for making trench mosfet having implanted drain-drift region  
A trench MOSFET is formed in a structure which includes a P-type epitaxial layer overlying an N+ substrate. A trench is formed in the epitaxial layer. A deep implanted N layer is formed below the...
6746934 Atomic layer doping apparatus and method  
An improved atomic layer doping apparatus is disclosed as having multiple doping regions in which individual monolayer species are first deposited and then dopant atoms contained therein are...
6730585 Method of fabricating high-voltage transistor with buried conduction layer  
Method of fabricating a lateral, high-voltage, FET having a low on-resistance and a buried conduction layer comprises a P-type buried layer region within an N-well formed in a P-type substrate. The...
6723587 Ultra small-sized SOI MOSFET and method of fabricating the same  
An ultra small-sized SOI MOSFET having a high integration density, low power consumption, but high performances, and a method of fabricating the same are provided. The method includes preparing a...
6703277 Reducing agent for high-K gate dielectric parasitic interfacial layer  
A semiconductor device and a process for fabricating the device, the process including steps of depositing on the silicon substrate a layer comprising at least one high-K dielectric material,...
6695903 Dopant pastes for the production of p, p&plus , and n, n&plus regions in semiconductors  
The invention relates to novel boron, phosphorus or boron-aluminium dopant pastes for the production of p, p+ and n, n+ regions in monocrystalline and polycrystalline Si wafers, and of...
6642152 Method for ultra thin resist linewidth reduction using implantation  
The present invention relates to a system and a method for reducing the linewidth of ultra thin resist features. The present invention accomplishes this end by applying a densification process to...
6642134 Semiconductor processing employing a semiconductor spacer  
A semiconductor device is provided with semiconducting sidewall spacers used in the formation of source/drain regions. The semiconducting sidewall spacers also reduce the possibility of suicide...
6613655 Method of fabricating system on chip device  
A method of fabricating a system on a chip device. On a substrate having a memory cell region and a peripheral circuit region a gate oxide layer and a polysilicon layer are formed. The peripheral...
6613626 Method of forming CMOS transistor having a deep sub-micron mid-gap metal gate  
A CMOS transistor is formed on a single crystal silicon substrate. Active regions are formed on the substrate, including an nMOST active region and a pMOST active region. An epitaxial layer of...
6596556 Light emitting diode and a method for manufacturing the same  
An LED is provided with a p-type semiconductor region in the shape of an island being buried in an n-type semiconductor region from the surface of it, and forms a pn junction at the interface...
6569738 Process for manufacturing trench gated MOSFET having drain/drift region  
A trench MOSFET is formed in a structure which includes a P-type epitaxial layer overlying an N+ substrate. An N-type dopant is implanted through the bottom of the trench into the P-epitaxial layer...
6548378 Method of boron doping wafers using a vertical oven system  
The present invention relates to a method for boron doping wafers using a vertical oven system. The vertical oven system ( 1 ) used comprises a vertical reaction chamber ( 2 ) that extends from an...
6541353 Atomic layer doping apparatus and method  
An improved atomic layer doping apparatus is disclosed as having multiple doping regions in which individual monolayer species are first deposited and then dopant atoms contained therein are...
6531379 High resolution dopant/impurity incorporation in semiconductors via a scanned atomic force probe  
The present invention employs a scanned atomic force probe to physical incorporate impurity atoms (dopant or bandgap) into a semiconductor substrate so that the impurity atoms have high resolution...
6531359 Method for fabricating a memory cell array  
A method for fabricating a memory cell array, in particular an EPROM or EEPROM memory cell array, includes burying insulation zones on a silicon substrate in accordance with an STI (Shallow Trench...
6524880 Solar cell and method for fabricating the same  
A technique for fabricating a solar cell includes an n + emitter region first being formed on a front surface of the cell, and then front and rear insulating layers being formed on both sides of...
6518113 Doping of thin amorphous silicon work function control layers of MOS gate electrodes  
Work function control layers are provided in in-laid, metal gate electrode, Si-based MOS transistors and CMOS devices by a process which avoids deleterious dopant implantation processing resulting...
6506655 Bipolar transistor manufacturing method  
A method of manufacturing a bipolar transistor in an N-type semiconductor substrate, including the steps of depositing a first base contact polysilicon layer and doping it; depositing a second...
6500741 Method for making high voltage device  
An electrical device such as a diode usable in high voltage applications wherein the electrical device is fabricated from a method which yields a plurality of high voltage electrical devices, the...
6479885 High voltage device and method  
An electrical device such as a diode usable in high voltage applications wherein the electrical device is fabricated from a method which yields a plurality of high voltage electrical devices, the...
6461948 Method of doping silicon with phosphorus and growing oxide on silicon in the presence of steam  
A method of doping silicon that involves placing a silicon wafer in spaced relationship to a solid phosphorus dopant source at a first temperature for a time sufficient to deposit a...
6461947 Photovoltaic device and making of the same  
To form an impurity diffusion layer on only one side of a semiconductor substrate at least one semiconductor substrate and at least one diffusion protecting plate are put close to each other and a...
6458693 Method of manufacturing a semiconductor device  
A semiconductor device which can reduce contact resistance, is disclosed. A semiconductor device according to the present invention includes a lower conductor pattern and an upper conductor...
Matches 1 - 50 out of 279 1 2 3 4 5 6 >