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8747551 Process for production of silicon single crystal, and highly doped N-type semiconductor substrate  
After adding phosphorus (P) and germanium (Ge) into a silicon melt or adding phosphorus into a silicon/germanium melt, a silicon monocrystal is grown from the silicon melt by a Czochralski method,...
8679960 Technique for processing a substrate having a non-planar surface  
A method of processing a substrate having horizontal and non-horizontal surfaces is disclosed. The substrate is implanted with particles using an ion implanter. During the ion implant, due to the...
8574363 Process for production of silicon single crystal, and highly doped N-type semiconductor substrate  
After adding phosphorus (P) and germanium (Ge) into a silicon melt or adding phosphorus into a silicon/germanium melt, a silicon monocrystal is grown from the silicon melt by a Czochralski method,...
8461032 Use of dopants with different diffusivities for solar cell manufacture  
A method of tailoring the dopant profile of a substrate by utilizing two different dopants, each having a different diffusivity is disclosed. The substrate may be, for example, a solar cell. By...
8097517 Method for manufacturing semiconductor device with improved short channel effect of a PMOS and stabilized current of a NMOS  
The present invention relates to a semiconductor device which is capable of simultaneously improving a short channel effect of a PMOS and the current of an NMOS and a method for manufacturing the...
8053343 Method for forming selective emitter of solar cell and diffusion apparatus for forming the same  
A method for forming a selective emitter of a solar cell and a diffusion apparatus for forming the same are provided. The method includes texturing a surface of a silicon substrate by etching the...
8017488 Manufacturing method of a NOR flash memory with phosphorous and arsenic ion implantations  
A manufacturing method of a NOR flash memory with phosphorous and arsenic ion implantations mainly implants both phosphorous and arsenic ions on a drain area of a transistor memory unit, and...
8013381 Semiconductor device  
A semiconductor device has a semiconductor substrate of a first conductivity type; first to third high-voltage insulated-gate field effect transistors formed on a principal surface of the...
7977199 Method for measuring dopant concentration during plasma ion implantation  
Embodiments of the invention generally provide methods for end point detection at predetermined dopant concentrations during plasma doping processes. In one embodiment, a method includes...
7851339 Method of repairing deep subsurface defects in a silicon substrate that includes diffusing negatively charged ions into the substrate from a sacrificial oxide layer  
Performance of field effect transistors and other channel dependent devices formed on a monocrystalline substrate is improved by carrying out a high temperature anneal in a nitrogen releasing...
7713757 Method for measuring dopant concentration during plasma ion implantation  
Embodiments of the invention generally provide methods for end point detection at predetermined dopant concentrations during plasma doping processes. In one embodiment, a method includes...
7592228 Recessed clamping diode fabrication in trench devices  
In a trench-gated MOSFET including an epitaxial layer over a substrate of like conductivity and trenches containing thick bottom oxide, sidewall gate oxide, and conductive gates, body regions of...
7495264 Semiconductor device with high dielectric constant insulating film and manufacturing method for the same  
A semiconductor device has a substrate and a dielectric film formed directly or indirectly on the substrate. The dielectric film contains a metal silicate film, and a silicon concentration in the...
7479435 Method of forming a circuit having subsurface conductors  
A MOS transistor and subsurface collectors can be formed by using a hard mask and precisely varying the implant angle, rotation, dose, and energy. In this case, a particular atomic species can be...
7144795 Method for forming a depletion-mode transistor that eliminates the need to separately set the threshold voltage of the depletion-mode transistor  
A semiconductor circuit with a depletion-mode transistor is formed with a method that eliminates the need for a separate mask and implant step to set the threshold voltage of the depletion-mode...
7005364 Method for manufacturing semiconductor device  
The invention provides a method for manufacturing a semiconductor device with which an impurity introduction region and a positioning mark region can be formed aligned, based on a common...
6988900 Surface mount connector assembly  
A surface mount connector assembly for mounting to a printed wiring board (PWB) in a low-profile manner. The height of the surface mount connector assembly is diminished because the connector...
6825104 Semiconductor device with selectively diffused regions  
The present invention describes a method of manufacturing a semiconductor device, comprising a semiconductor substrate in the shape of a slice, the method comprising the steps of: step 1)...
6551903 Melt through contact formation method  
A thin film photovoltaic devices is described, having a glass substrate 11 over which is formed a thin film silicon device having an n++ layer 12, a p layer 13 and a dielectric layer 14 (typically...
6448161 Silicon based vertical tunneling memory cell  
A method of forming a memory device from a single transistor and a single RTD structure is provided. The method comprises the steps of forming a silicon base, an oxide layer over the base and a...
6410410 Method of forming lightly doped regions in a semiconductor device  
A method is disclosed in which a lightly doped region in a semiconductor layer is obtained by diffusing dopant atoms of a first and second type into the underlying semiconductor layer. Preferably,...
6342418 Semiconductor device and manufacturing method thereof  
An impurity concentration profile that improves pn junction breakdown voltage and mitigates the electric field, and that does not adversely affect the characteristics of a field effect transistor...
6297119 Semiconductor device and its manufacture  
The present invention discloses a semiconductor device having a PNP bipolar transistor and an NPN bipolar transistor having excellent transistor characteristics formed on the same semiconductor...
6162711 In-situ boron doped polysilicon with dual layer and dual grain structure for use in integrated circuits manufacturing  
A method and structure providing a dual layer silicon gate film having a uniform boron distribution therein and an ordered, uniform grain structure. Rapid thermal annealing is used to cause the...
6153516 Method of fabricating a modified polysilicon plug structure  
A process for forming a modified polysilicon plug structure, used to connect a bit line structure, of a semiconductor memory device, to an underlying source and drain region, of a transfer gate...
6110276 Method for making n-type semiconductor diamond  
A method for making n-type semiconducting diamond by use of CVD in which n-type impurities are doped simultaneously with the deposition of diamond. As the n-type impurities, an Li compound and a B...
6080614 Method of making a MOS-gated semiconductor device with a single diffusion  
A method of fabricating a MOS-gated semiconductor device in which arsenic dopant is implanted through a mask to form a first layer, boron dopant is implanted through the mask to form a second...
5710059 Method for producing a semiconductor device having a semiconductor layer of SiC by implanting  
A method for producing a semiconductor device comprises a step of implanting first conductivity type impurity dopants of at least two different elements in a semiconductor layer being doped...
5670394 Method of making bipolar transistor having amorphous silicon contact as emitter diffusion source  
The present invention teaches a method for fabricating a bipolar junction transistor ("BJT") from a semiconductor substrate having a base region, wherein the BJT comprises an increased Early...
5650347 Method of manufacturing a lightly doped drain MOS transistor  
A method of manufacturing a lightly doped drain MOS transistor having the double shallow junction is disclosed including the steps of forming a gate and a gate insulating film on a semiconductor...
5504016 Method of manufacturing semiconductor device structures utilizing predictive dopant-dopant interactions  
The effect of dopant-dopant interaction on diffusion in silicon for a specific set of impurities is modeled. The first step in the modeling process involved quantum chemical calculations. The...
5340752 Method for forming a bipolar transistor using doped SOG  
A method for forming a bipolar transistor which employs a single drive-in step to form an emitter and a base. A layer of SOG containing a plurality of dopants is spun onto a collector, typically...
5324686 Method of manufacturing semiconductor device using hydrogen as a diffusion controlling substance  
A method of manufacturing a semiconductor device, which comprises the steps of forming a solid phase diffusion source containing a conductive impurity on a surface of a semiconductor substrate,...
5086005 Bipolar transistor and method for manufacturing the same  
In a self-alignment type-lateral bipolar transistor and a manufacturing method thereof, the base width is determined not by the image resolution limit of the lithography technique, as in the prior...
5081050 Method of making a gate turn-off thyristor using a simultaneous diffusion of two different acceptor impurities  
In a high-reverse-voltage GTO thyristor, a negative beveling (6) with comparatively high beveling angle (α) is possible as edge contouring as a result of separating the p-type base layer into a...
5063168 Process for making bipolar transistor with polysilicon stringer base contact  
There is disclosed herein a process for making a base and emitter contact structure for a bipolar transistor which is comprised of a polysilicon stripe over an isolation island which stripe...
4997774 Method for fabricating a DRAM cell  
This invention is related to a method for fabricating a DRAM cell. This invention makes the capacitor electrode and the source of the transistor connect more easily using the lateral diffusion of...
4939103 Method of diffusing plurality of dopants simultaneously from vapor phase into semiconductor substrate  
This invention relates to the manufacture of semiconductor devices and more particularly to a method of diffusing an impurity layer into a substrate. The disclosed method comprises the steps of...
4830983 Method of enhanced introduction of impurity species into a semiconductor structure from a deposited source and application thereof  
A two step annealing process is utilized for performing imputity induced disordering comprising an initial higher temperature, shorter term or rapid thermal anneal (RTA) treatment followed by a...
4820656 Method for producing a p-doped semiconductor region in an n-conductive semiconductor body  
A method for producing a p-doped semiconductor region in an n-conductive semiconductor body by means of diffusion using a combination of both aluminum and boron as dopants. The semiconductor body...
4778772 Method of manufacturing a bipolar transistor  
A method of manufacturing a semiconductor device by forming an N type collector layer in an N type semiconductor wafer, a P type base layer which is in contact with the N type collector layer at a...
4629520 Method of forming shallow n-type region with arsenic or antimony and phosphorus  
A method of forming a shallow n-type region of a semiconductor device, such as a bipolar transistor or a MOS FET, includes the following steps. Forming a first film containing arsenic or antimony...
4609414 Emitter finger structure in a switching transistor  
A particular emitter finger structure in an NPN type switching transistor. The emitter zone is divided into two lateral N type strips. In the central part are provided, on the one hand, a...
4597824 Method of producing semiconductor device  
A method of producing a MOS transistor of LDD structure with p(n) type pockets. A doped oxide film in which impurities such as phosphorus and impurities such as arsenic are doped is formed on a...
4589936 Method for fabricating a semiconductor device by co-diffusion of arsenic and phosphorus  
A semiconductor device is fabricated by selectively providing on a surface of a semiconductor body a plurality of impurity diffusion sources each containing an n-type impurity comprising...
4344980 Superior ohmic contacts to III-V semiconductor by virtue of double donor impurity  
A method for fabricating superior ohmic contacts in a III-V semiconductor wafer by virtue of double donor (or double acceptor) impurity complex formation. A typical III-V, e.g., GaAs,...
4338481 Very thin silicon wafer base solar cell  
The performance and ruggedness of very thin silicon back surface field (BSF) solar cells are improved by the formation of a relatively thick, epitaxially grown, highly doped layer at the back of...
4296426 Process for producing an MOS-transistor and a transistor produced by this process  
A process for producing a field-effect insulated-gate transistor of the N-channel MOS-type, transistor comprising, on a semiconductor substrate, a control gate (14) and a source region (12), a...
4263067 Fabrication of transistors having specifically paired dopants  
A semiconductor device comprising an N type collector layer formed in an N type semiconductor wafer, a P type base layer which is in contact with the N type collector layer at a PN junction that...
4229237 Method of fabrication of semiconductor components having optoelectronic conversion properties  
The top surface of a wafer of p-type ZnTe semiconductor material is subjected to double diffusion of an acceptor impurity and of a donor impurity so as to create in the ZnTe on the one hand a...

Matches 1 - 50 out of 122 1 2 3 >