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8987122 Method of manufacturing semiconductor device  
A method of manufacturing a semiconductor device, includes a wafer grinding step of, by means of a revolving grinding stone, forming a thinned portion in a wafer while at the same time forming a...
8980654 Ion implantation method and ion implantation apparatus  
The ion implantation method includes setting an ion beam scanning speed and a mechanical scanning speed of an object during ion implantation using hybrid scan in advance and implanting ions based...
8975156 Method of sealing two plates with the formation of an ohmic contact therebetween  
A method of sealing a first wafer and a second wafer each made of semiconducting materials, including: implanting a metallic species in at least the first wafer, assembling the first wafer and the...
8975603 Systems and methods for plasma doping microfeature workpieces  
Systems and methods for plasma doping microfeature workpieces are disclosed herein. In one embodiment, a method of implanting boron ions into a region of a workpiece includes generating a plasma in...
8963337 Thin wafer support assembly  
A semiconductor wafer assembly formed by bonding a support wafer to a thin wafer using a double-sided bonding release tape. The support wafer provides support for the thin target wafer such that...
8956937 Method of depositing the metal barrier layer comprising silicon dioxide  
The present invention discloses to a method of depositing the metal barrier layer comprising silicon dioxide. It is applied in the transistor device comprising a silicon substrate, a gate and a...
8951897 Method for controlling concentration of donor in GA2O3—based single crystal  
A method for controlling the concentration of a donor in a Ga2O3-based single crystal includes: a step in which a Group IV element is implanted as a donor impurity in a Ga2O3-based single crystal...
8951895 Complementary doping methods and devices fabricated therefrom  
Improved complementary doping methods are described herein. The complementary doping methods generally involve inducing a first and second chemical reaction in at least a first and second portion,...
8946006 Replacement gate MOSFET with raised source and drain  
A disposable dielectric spacer is formed on sidewalls of a disposable material stack. Raised source/drain regions are formed on planar source/drain regions by selective epitaxy. The disposable...
8946872 Method for producing a semiconductor  
A method for producing a semiconductor includes providing a p-doped semiconductor body having a first side and a second side; implanting protons into the semiconductor body via the first side to a...
8946067 Method of making a thin crystalline semiconductor material  
A method of preparing a thin material layer from a semiconductor substrate is presented. The method entails forming a stress-generating epitaxial layer on a base substrate to form a stressed...
8946035 Replacement channels for semiconductor devices and methods for forming the same using dopant concentration boost  
A replacement channel and a method for forming the same in a semiconductor device are provided. A channel area is defined in a substrate which is a surface of a semiconductor wafer or a structure...
8941094 Methods for adjusting the conductivity range of a nanotube fabric layer  
Methods for adjusting and/or limiting the conductivity range of a nanotube fabric layer are disclosed. In some aspects, the conductivity of a nanotube fabric layer is adjusted by functionalizing...
8936992 Deep isolation trench structure and deep trench capacitor on a semiconductor-on-insulator substrate  
Two trenches having different widths are formed in a semiconductor-on-insulator (SOI) substrate. An oxygen-impermeable layer and a fill material layer are formed in the trenches. The fill material...
8937003 Technique for ion implanting a target  
A technique for ion implanting a target is disclosed. In accordance with one exemplary embodiment, the technique may be realized as a method for ion implanting a target, the method comprising:...
8932995 Combinatorial process system  
A combinatorial processing chamber is provided. The combinatorial processing chamber is configured to isolate a radial portion of a rotatable substrate support, which in turn is configured to...
8928030 Semiconductor device, method for manufacturing the semiconductor device, and method for controlling the semiconductor device  
An A-NPC circuit is configured so that the intermediate potential of two connected IGBTs is clamped by a bidirectional switch including two RB-IGBTs. Control is applied to the turn-on di/dt of the...
8927399 Localized implant into active region for enhanced stress  
Methods for enhancing strain in an integrated circuit are provided. Embodiments of the invention include using a localized implant into an active region prior to a gate etch. In another embodiment,...
8925479 System and method of dosage profile control  
A system and method for controlling a dosage profile is disclosed. An embodiment comprises separating a wafer into components of a grid array and assigning each of the grid components a desired...
8927400 Safe handling of low energy, high dose arsenic, phosphorus, and boron implanted wafers  
A method of preventing toxic gas formation after an implantation process is disclosed. Certain dopants, when implanted into films disposed on a substrate, may react when exposed to moisture to form...
8921174 Method for fabricating complementary tunneling field effect transistor based on standard CMOS IC process  
Disclosed herein is a method for fabricating a complementary tunneling field effect transistor based on a standard CMOS IC process, which belongs to the field of logic devices and circuits of field...
8921215 Ion injection simulation method, ion injection simulation device, method of producing semiconductor device, and method of designing semiconductor device  
An ion injection simulation method includes: calculating a reinjection dose injected into a substrate and a structure formed on the substrate and reinjected from a side face of the structure; and...
8906706 Method of fabricating a mask structure for patterning a workpiece by ions  
A method of fabricating workpieces includes one or more layers on a substrate that are masked with an ion implantation mask comprising two or more layers. The mask layers include a first mask layer...
8906811 Shallow pn junction formed by in situ doping during selective growth of an embedded semiconductor alloy by a cyclic growth/etch deposition process  
A silicon/carbon alloy may be formed in drain and source regions, wherein another portion may be provided as an in situ doped material with a reduced offset with respect to the gate electrode...
8901649 Semiconductor device, electrostatic discharge protection device and manufacturing method thereof  
A semiconductor device, an electrostatic discharge protection device and manufacturing method thereof are provided. The electrostatic discharge protection device includes a gate, a gate dielectric...
8900982 Techniques for processing a substrate  
Herein, an improved technique for processing a substrate is disclosed. In one particular exemplary embodiment, the technique may be achieved using a mask for processing the substrate. The mask may...
8895387 Method of manufacturing nonvolatile semiconductor memory device  
According to one embodiment, a method includes forming first and second gate patterns each including a structure stacked in order of a first insulating layer, a floating gate layer, a charge trap...
8895348 Methods of forming a high efficiency solar cell with a localized back surface field  
A solar cell, comprising: a doped silicon substrate, the silicon substrate comprising a front surface and a rear surface; a front phosphorous diffusion layer formed on the front surface; a front...
8889503 Method for manufacturing semiconductor device  
Provided is a method for manufacturing a semiconductor device which includes, on a wafer which has a notch, a plurality of transistors parallel with and perpendicular to a notch direction extending...
8889535 Semiconductor device and method for fabricating semiconductor buried layer  
The present disclosure provides a semiconductor device and a method for fabricating a semiconductor buried layer. The method includes: preparing a substrate which includes a first oxide layer;...
8883589 Counter doping compensation methods to improve diode performance  
A method of forming a memory cell is provided, the method including forming a diode including a first region having a first conductivity type, counter-doping the diode to change the first region to...
8883620 Methods for using isotopically enriched levels of dopant gas compositions in an ion implantation process  
A novel process for using enriched and highly enriched dopant gases is provided herein that eliminates the problems currently encountered by end-users from being able to realize the process...
8883618 Method and device for the treatment of a semiconductor substrate  
Method for the treatment of a semiconductor substrate (2), in which an ion beam (4) is produced from a doping gas and is directed onto the semiconductor substrate (2), characterized in that the...
8883571 Transistor, method of manufacturing the transistor, semiconductor unit, method of manufacturing the semiconductor unit, display, and electronic apparatus  
A method of manufacturing a transistor includes: forming an oxide semiconductor film and a gate electrode on a substrate, the oxide semiconductor film having a channel region, and the gate...
8883619 Method for manufacturing semiconductor device  
A method for manufacturing a semiconductor device includes the steps of: preparing a substrate made of silicon carbide; forming, on one main surface of the substrate, a detection film having a...
8871619 Application specific implant system and method for use in solar cell fabrications  
Solar cells and other semiconductor devices are fabricated more efficiently and for less cost using an implanted doping fabrication system. A system for implanting a semiconductor substrate...
8853713 Resistive memory having confined filament formation  
Resistive memory having confined filament formation is described herein. One or more method embodiments include forming an opening in a stack having a silicon material and an oxide material on the...
8853092 Self-aligned patterning with implantation  
A method of fabricating a plurality of features of a semiconductor device includes providing a dielectric layer over a silicon layer, and etching the dielectric layer and the silicon layer to form...
8853026 Semiconductor device having deep wells and fabrication method thereof  
Semiconductor devices and methods of fabricating the same are provided. An insulating film can be disposed on a semiconductor substrate, and insulating film patterns can be formed opening a...
8853065 Methods for fabricating semiconductor devices having reduced implant contamination  
A method of fabricating a semiconductor device includes selecting an element for implanting into a substrate. The element has at least a first isotope and a second isotope. At least one implant...
8846461 Silicon layer for stopping dislocation propagation  
A composite semiconductor structure and method of forming the same are provided. The composite semiconductor structure includes a first silicon-containing compound layer comprising an element...
8822290 FinFETs and methods for forming the same  
A method includes recessing isolation regions, wherein a portion of a semiconductor strip between the isolation regions is over top surfaces of the recessed isolation regions, and forms a...
RE45106 Semiconductor structure and method of manufacture  
In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a method to manufacture a semiconductor structure includes forming a...
8815754 Photoresists and methods for use thereof  
New photoresists are provided that comprise preferably as distinct components: a resin, a photoactive component and a phenolic component Preferred photoresists of the invention are can be useful...
8809171 Methods for forming FinFETs having multiple threshold voltages  
A method includes forming a first and a second gate stack to cover a first and a second middle portion of a first and a second semiconductor fin, respectively, and performing implantations to...
8802548 Semiconductor device having super junction metal oxide semiconductor structure and fabrication method for the same  
A semiconductor device includes: a first base layer; a drain layer disposed on the back side surface of the first base layer; a second base layer formed on the surface of the first base layer; a...
8790969 Effecting selectivity of silicon or silicon-germanium deposition on a silicon or silicon-germanium substrate by doping  
A method for selective deposition of Si or SiGe on a Si or SiGe surface exploits differences in physico-chemical surface behavior according to a difference in doping of first and second surface...
8779462 High-ohmic semiconductor substrate and a method of manufacturing the same  
The semiconductor substrate includes a high-ohmic semiconductor material with a conduction band edge and a valence band edge, separated by a bandgap, wherein the semiconductor material includes...
8772142 Ion implantation method and ion implantation apparatus  
An ion implantation method includes reciprocally scanning an ion beam, mechanically scanning a wafer in a direction perpendicular to the ion beam scanning direction, implanting ions into the wafer,...
8772128 Method for manufacturing semiconductor device  
A single crystal semiconductor substrate is irradiated with ions that are generated by exciting a hydrogen gas and are accelerated with an ion doping apparatus, thereby forming a damaged region...