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7615390 Method and apparatus for forming expitaxial layers  
The present invention provides a method of depositing epitaxial layers based on Group IV elements on a silicon substrate by Chemical Vapor Deposition, wherein nitrogen or one of the noble gases is...
7560389 Method for fabricating semiconductor element  
A method for fabricating a semiconductor element on a semiconductor substrate having a support substrate and a semiconductor layer above the support substrate. The method includes preparing the...
7554139 Semiconductor manufacturing method and semiconductor device  
A production method for a semiconductor device according to the present invention includes: step (A) of providing a substrate including a semiconductor layer having a principal face, the substrate...
7534689 Stress enhanced MOS transistor and methods for its fabrication  
A stress enhanced MOS transistor and methods for its fabrication are provided. In one embodiment the method comprises forming a gate electrode overlying and defining a channel region in a...
7514337 Semiconductor device using EPI-layer and method of forming the same  
A method of fabricating a semiconductor device includes forming a pad oxide film and a nitride film on a semiconductor substrate; exposing the semiconductor substrate by selectively etching the pad...
7338881 Method for manufacturing semiconductor element  
A method for manufacturing a semiconductor element includes preparing an SOI layer having a transistor forming area and an element isolation area, forming an oxidation-resistant mask layer on the...
7232728 High quality oxide on an epitaxial layer  
This invention improves the quality of gate oxide dielectric layers using a two-pronged approach, thus permitting the use of much thinner silicon dioxide gate dielectric layers required for...
7176101 Method of forming isolation oxide layer in semiconductor integrated circuit device  
A method is provided in which a first oxide layer is deposited on a silicon substrate and etched to form openings. A first silicon epitaxial layer is grown on the substrate in the openings, forming...
7078313 Method for fabricating an integrated semiconductor circuit to prevent formation of voids  
Recesses between gate layer stacks are filled with a first electrically insulating material. Cavities or voids are opened up during the removal of a portion of the first insulating material. These...
7060596 Process for fabricating a single-crystal substrate and integrated circuit comprising such a substrate  
An initial single-crystal substrate 1 having, locally and on the surface, at least one discontinuity in the single-crystal lattice is formed. The initial substrate is recessed at the...
6997985 Semiconductor, semiconductor device, and method for fabricating the same  
Method of fabricating semiconductor devices such as thin-film transistors by annealing a substantially amorphous silicon film at a temperature either lower than normal crystallization temperature...
6723618 Methods of forming field isolation structures  
Field isolation structures and methods of forming field isolation structures are described. In one implementation, the method includes etching a trench within a monocrystalline silicon substrate....
6716719 Method of forming biasable isolation regions using epitaxially grown silicon between the isolation regions  
An improved isolation structure for use in an integrated circuit and a method for making the same is disclosed. In a preferred embodiment, an silicon dioxide, polysilicon, silicon dioxide stack is...
6699773 Shallow trench isolation type semiconductor device and method of forming the same  
A method of forming a shallow trench isolation type semiconductor device comprises forming an etch protecting layer pattern to define at least one active region on a substrate, forming at least one...
6548388 Semiconductor device including gate electrode having damascene structure and method of fabricating the same  
A gate electrode conductive layer is formed on an active region that is recessed relative to field oxide layers so as to define a damascene structure. The gate electrode conductive layer is formed...
6503799 Method of manufacturing semiconductor device  
There is provided a method of forming an element isolation structure that can maintain its element isolation capability even with the progress of miniaturization of semiconductor elements. Through...
6489193 Process for device isolation  
A novel process for isolating devices on a semiconductor substrate is disclosed. An isolation layer is first formed over the semiconductor substrate and patterned into at least two isolation mesas...
6461887 Method to form an inverted staircase STI structure by etch-deposition-etch and selective epitaxial growth  
A method of forming an inverted staircase shaped STI structure comprising the following steps. A semiconductor substrate having an overlying oxide layer is provided. The substrate having at least a...
6436780 Semiconductor device  
A number of npn and pnp bipolar transistors are formed in a single chip of silicon, so that some of the transistors have a greater frequency response than others The higher frequency transistors...
6410404 Process for manufacturing SOI integrated circuits and circuits made thereby  
Presented is a process for manufacturing circuit structures of the SOI type integrated on a semiconductor substrate having a first type of conductivity. The process includes forming at least one...
6352884 Method for growing crystals having impurities and crystals prepared thereby  
A method for forming a crystal layer including the steps of (1) supplying first impurity atoms onto a surface of a crystal substrate to form a surfactant layer adsorbed on the surface, (2)...
6297118 Vertical bipolar semiconductor power transistor with an interdigitzed geometry, with optimization of the base-to-emitter potential difference  
A transistor including an epitaxial layer with a first conductivity type, a base buried region with a second conductivity type, and a sinker base region with the second conductivity type which...
6284606 Process to achieve uniform groove depth in a silicon substrate  
A process for forming a groove in a semiconductor substrate, to be used to fabricate grooved gate, MOSFET devices, has been developed. The process features the use of an insulator mask, used as an...
6083520 Bioactive feed  
The present invention relates to a bioactive feed pellet comprising besides commonly used nutritionally valuable components, a biologically active ingredient such as a therapeutically or...
6060372 Method for making a semiconductor device with improved sidewall junction capacitance  
A semiconductor device (10) of the present invention has a gate (32) insulatively disposed above the substrate, source and drain regions (36, 38) disposed near the surface in the substrate adjacent...
5981359 Method of manufacturing semiconductor device having isolation film on SOI substrate  
Disclosed is a method of manufacturing a semiconductor device having a reliable element isolation insulating film on an SOI substrate having an SOI layer. That is, the step of forming a...
5953604 Methods for making compact P-channel/N-channel transistor structure  
A structure for a complementary field effect transistor includes a semiconductor body having a first body region of a first conductivity type and an adjoining second body region of an opposite...
5824151 Vapor deposition method  
The method of forming a III-V group compound semiconductor crystalline layer on a semiconductor crystal containing at least V-group compound, includes the steps of: performing the crystal growth of...
5686343 Process for isolating a semiconductor layer on an insulator  
A process for the isolation of a semiconductor layer on an insulator. A process for isolating a semiconductor layer on an insulator is disclosed that includes the steps of: forming a first...
5683933 Method of fabricating a semiconductor device  
To minimize error in size and form a thick oxide layer as field insulating means in a narrow isolation region, a method of fabricating a semiconductor device is carried out as followings. A...
5681776 Planar selective field oxide isolation process using SEG/ELO  
An isolation method for separating active regions on a semiconductor substrate is disclosed. Portions of the substrate not corresponding to the active regions are etched to a predetermined depth....
5637529 Method for forming element isolation insulating film of semiconductor device  
A method for forming an element isolation insulating film of semiconductor devices, by which junction leakage current can be greatly reduced, comprising the steps of: forming a pad oxide film and a...
5624858 Method of manufacturing a semiconductor device with increased breakdown voltage  
A low concentration impurity region 6 of a second conductivity type is formed to cover lower portion of a high concentration impurity region 8 of the second conductivity type. Consequently,...
5580816 Local oxidation process for high field threshold applications  
A method for electrically isolating semiconductor devices in an integrated circuit structure with high field threshold, low defect level regions. The semiconductor structure includes a device layer...
5565029 Method for manufacturing semiconductor device having grown layer on insulating layer  
A semiconductor device produced by forming an epitaxial layer insulated from a silicon substrate, and forming a device in the epitaxial layer. According to the process a silicon dioxide layer is...
5512508 Method and apparatus for improvement of interconnection capacitance  
A method and apparatus for reducing interconnection capacitance. A lightly doped buried layer is provided in or on a substrate below a field oxide region. The capacitance of an interconnect on the...
5506156 Method of fabricating bipolar transistor having high speed and MOS transistor having small size  
A semiconductor device includes a plurality of semiconductor regions of a first conductive type and a plurality of semiconductor regions of a second conductive type. AMOS transistor having a...
5500391 Method for making a semiconductor device including diffusion control  
A process for making a MOS device on a silicon substrate includes the step of forming a buried layer of germanium-silicon alloy in the substrate, or, alternatively, a buried layer of silicon...
5457067 Process for formation of an isolating layer for a semiconductor device  
A process for formation of an isolating layer for a semiconductor device is disclosed. During formation of a field isolating layer, a pad oxide layer is formed which is intended to buffer the...
5455189 Method of forming BICMOS structures  
In a bipolar or BiCMOS process, a heavily doped buried layer of a first conductivity type and a heavily doped channel stop region of a second conductivity type are formed in a lightly doped...
5451530 Method for forming integrated circuits having buried doped regions  
A method for fabricating an integrated circuit having a buried doped region is disclosed. A thermal oxide layer is formed over a portion of a p-type substrate at which an n+ buried doped region is...
5418185 Method of making schottky diode with guard ring  
A Schottky diode circuit 20 is formed on a semiconductor layer 24. A conductive contact 36 on the surface of the semiconductor layer 24 forms a Schottky barrier 40 at the junction of the conductive...
5256563 Doped well structure and method for semiconductor technologies  
A method of forming doped wells 24 and 30 in a semiconductor layer is disclosed herein. In a preferred embodiment, an oxide layer 16 is formed on the surface of a silicon layer 14. A nitride layer...
5242854 High performance semiconductor devices and their manufacture  
A high performance bipolar transistor and a method of fabrication. Base resistance is reduced by a self-aligned silicide formed in the single-crystal region of the extrinsic base, thereby...
5212110 Method for forming isolation regions in a semiconductor device  
A process for fabricating isolation regions in a semiconductor substrate which does not depend upon pattern definition capability. In one embodiment a device isolation region (30) is formed in a...
5149663 Method for manufacturing a Bi-CMOS semiconductor device  
There is provided a method of manufacturing Bi-CMOS semiconductor devices in which further comprises the steps of; depositing a polysilicon layer, an oxide film and a nitride film one and another...
5135884 Method of producing isoplanar isolated active regions  
A method is provided for forming isoplanar isolated regions in an integrated circuit, and an integrated circuit formed according to the same. According to a first disclosed embodiment, a first...
5121194 Substrate output for a semiconductor device and a method of fabricating the same  
In a semiconductor device, a first diffusion region on a surface of an output region for a substrate electric potential, and an element segregation third diffusion region under a field insulating...
5114875 Planar dielectric isolated wafer  
A substantially planar dielectric wafer is formed by utilizing a polysilicon filler to remove surface irregularities (15, 15'). The polysilicon filler is formed by filling surface irregularities...
5114868 Manufacturing method of well region in coms intergrated circuit  
First, N-type channel stoppers are formed in an element formation region of a P-channel MOS transistor and in an element isolation region of the P-channel MOS transistor, of a CMOS transistor....
Matches 1 - 50 out of 122 1 2 3 >