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7642171 Multi-step anneal of thin films for film densification and improved gap-fill  
A method of annealing a substrate comprising a trench containing a dielectric material, the method including annealing the substrate at a first temperature of about 200° C. to about 800° C. in a...
7632737 Protection in integrated circuits  
A method including, prior to a plasma heat-up operation, forming a liner on structure coated with an insulator. And a method including forming a trench on a substrate, forming an insulator on the...
7608519 Method of fabricating trench isolation of semiconductor device  
In a method of fabricating a trench isolation structure of a semiconductor device, excellent gap filling properties are attained, without the generation of defects. In one aspect, the method...
7601607 Protruded contact and insertion of inter-layer-dielectric material to match damascene hardmask to improve undercut for low-k interconnects  
An embodiment of the invention shows a process to form a damascene opening preferably without hardmask overhang or dielectric layer undercut/void. The low-k dielectric material can be sandwiched in...
7573086 TaN integrated circuit (IC) capacitor  
A capacitor is disclosed that is formed as part of an integrated circuit (IC) fabrication process. The capacitor generally comprises a top conductive plate, a capacitor dielectric and a bottom...
7557048 Methods of forming semiconductor constructions  
The invention includes methods of forming and/or passivating semiconductor constructions. In particular aspects, various oxides of a semiconductor substrate can be formed by exposing semiconductive...
7544617 Die scale control of chemical mechanical polishing  
A method for control of chemical mechanical polishing of a pattern dependant non-uniform wafer surfaces in a die scale wherein the die in the wafer surface have a plurality of zones of different...
7538009 Method for fabricating STI gap fill oxide layer in semiconductor devices  
A method for fabricating an STI gap fill oxide layer in a semiconductor device is provided. The method can include: forming a shallow trench for forming an STI on a semiconductor substrate; forming...
7534698 Methods of forming semiconductor devices having multilayer isolation structures  
A semiconductor device includes a first structure having a recess having a bottom and opposing side surfaces, and a second structure conformally disposed on the bottom and side surfaces of the...
7528052 Method for fabricating semiconductor device with trench isolation structure  
The present invention relates to a semiconductor device with a device isolation structure and a method for fabricating the same. The semiconductor device includes: a substrate provided with a...
7524729 Method of manufacturing a semiconductor integrated circuit device having a trench  
A semiconductor integrated circuit device and a method of manufacturing the same. The surface of a substrate of an active region surrounded by an element isolation trench is horizontally flat in...
7514338 Method of manufacturing a semiconductor device  
A method of manufacturing a semiconductor device, includes preparing a work piece having a trench on its main surface side, forming a polymer film containing a polymer containing silicon, hydrogen...
7501686 Semiconductor device and method for manufacturing the same  
A semiconductor device is disclosed that includes a semiconductor substrate, a device region disposed at a predetermined location of the semiconductor substrate, and a shallow trench isolation...
7498233 Method of forming an insulation layer structure having a concave surface and method of manufacturing a memory device using the same  
A method of forming an isolation layer structure for a semiconductor device includes forming a first structure on a substrate, the first structure including an insulation layer pattern having a...
7494894 Protection in integrated circuits  
A method including, prior to a plasma heat-up operation, forming a liner on a structure coated with an insulator. And a method including forming a trench on a substrate, forming an insulator on the...
7494895 Method of fabricating a three-dimensional MOSFET employing a hard mask spacer  
A method of fabricating a 3D field effect transistor employing a hard mask spacer includes forming a hard mask pattern on a semiconductor substrate. The semiconductor substrate is etched using the...
7482247 Conformal nanolaminate dielectric deposition and etch bag gap fill process  
Conformal nanolaminate dielectric deposition and etch back processes that can fill high aspect ratio (typically at least 5:1, for example 6:1), narrow width (typically sub 0.13 micron, for example...
7482244 Method of preventing a peeling issue of a high stressed thin film  
A wafer including a high stressed thin film thereon is lifted, and a pre-heating process is performed while the wafer is lifted. Subsequently, a dielectric layer is deposited on the high stressed...
7482246 Trench isolation structure in a semiconductor device and method for fabricating the same  
A trench isolation structure in a semiconductor device is provided. A semiconductor substrate has cell regions and peripheral circuit regions. First trenches have a predetermined depth and are...
7468302 Method of forming trench type isolation film of semiconductor device  
A method of forming a trench type isolation film of a semiconductor device, including the steps of sequentially forming a pad oxide film and a nitride film for a hard mask on a semiconductor...
7442618 Method to engineer etch profiles in Si substrate for advanced semiconductor devices  
Structures and methods for forming keyhole shaped regions for isolation and/or stressing the substrate are shown. In a first embodiment, we form an inverted keyhole shaped trench in the substrate...
7387943 Method for forming layer for trench isolation structure  
A method for forming a thermal oxide layer on the surface of a semiconductor substrate exposed during a semiconductor fabricating process. The thermal oxide layer is to be thin to minimize silicon...
7358150 Trench isolation structure for a semiconductor device with reduced sidewall stress and a method of manufacturing the same  
By forming a non-oxidizable liner in isolation trenches, the creation of compressive stress may be significantly reduced, wherein, in illustrative embodiments, silicon nitride may be used as liner...
7358190 Methods of filling gaps by deposition on materials having different deposition rates  
Methods of forming material in a gap in a substrate include forming a pattern to define a gap on a substrate. A bottom oxide layer is formed on a surface of the substrate and substantially filling...
7338850 Method for manufacturing device isolation film of semiconductor device  
A method for manufacturing device isolation film of semiconductor device is disclosed. The method utilizes a plasma oxidation of a liner nitride film exposed by etching a liner oxide the film in...
7332409 Methods of forming trench isolation layers using high density plasma chemical vapor deposition  
A method of forming a trench isolation layer can include forming an isolation layer in a trench using High Density Plasma Chemical Vapor Deposition (HDPCVD) with a carrier gas comprising hydrogen....
7319062 Trench isolation method with an epitaxially grown capping layer  
A trench isolation method for a semiconductor device, wherein a capping layer formed of an insulating material fills a recess generated at a border edge between an active area and an inactive area....
7314809 Method for forming a shallow trench isolation structure with reduced stress  
A method for forming a shallow trench isolation (STI) structure with reduced stress is described. An amorphous silicon layer is deposited on a trench surface of a shallow trench isolation...
7309646 De-fluoridation process  
A feature in a layer is provided. A photoresist layer is formed over the layer. The photoresist layer is patterned to form photoresist features with photoresist sidewalls, where the photoresist...
7303951 Method of manufacturing a trench isolation region in a semiconductor device  
A method of manufacturing a semiconductor device for preventing dielectric breakdown of gate electrodes attributable to needle-like protrusions caused inside a trench in the step of forming element...
7265026 Method of forming a shallow trench isolation structure in a semiconductor device  
An isolation method in a semiconductor device is disclosed. The example method sequentially forms a pad oxide layer and a pad nitride layer on a semiconductor substrate, patterns the pad nitride...
7265025 Method for filling trench and relief geometries in semiconductor structures  
A method teaches how to fill trench structures formed in a semiconductor substrate. The trench structures are coated in a first deposition process with a first primary filling layer with a high...
7250376 Method for fabricating semiconductor integrated circuit device  
A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and...
7214595 Method of producing semiconductor devices  
A method of producing semiconductor devices is provided, which makes it possible to bury a silicon oxide without shape deterioration in device isolation trenches. The method comprises the steps of:...
7199022 Manufacturing method of semiconductor device  
In order to achieve an isolation trench formation process according to the present invention in which the structure of a silicon nitride film liner can be easily controlled and to allow both of...
7176039 Dynamic modification of gap fill process characteristics  
A method for process optimization to extend the utility of the HDP CVD gap fill technique modifies the characteristics of the HDP process (deposition and sputter components) in a dynamic mode in...
7169697 Semiconductor device and manufacturing method of the same  
Disclosed is a semiconductor device, comprising a first wiring structure formed on a semiconductor substrate and including a first plug and a first wiring formed on the first plug, and a second...
7163869 Shallow trench isolation structure with converted liner layer  
A STI (shallow trench isolation) structure is formed with a liner layer that is converted from an initial material to a subsequent material. For example, the liner layer is initially comprised of...
7160789 Shallow trench isolation and method of forming the same  
A shallow trench isolation (STI) structure and a method of forming the STI structure. The STI structure defines an active region formed with a recess channel transistor. The STI structure includes...
7157351 Ozone vapor clean method  
A method for cleaning and forming an oxide film on a surface, particularly a silicon surface. The surface is initially cleaned and then exposed to ozone vapor, which forms the oxide film on the...
7151043 Method of manufacturing a semiconductor device  
Methods of manufacturing a semiconductor device are provided. A trench is formed in a semiconductor substrate. A first field oxide layer is formed that partially fills the trench. The first field...
7141485 Shallow trench isolation structure with low sidewall capacitance for high speed integrated circuits  
A method for reducing sidewall capacitance by 25% or more in an STI structure is described. A conformal barrier layer is deposited on sloped sidewalls in a shallow trench within a substrate. The...
7122443 Method of fabricating flash memory device  
A method of fabricating a flash memory device is disclosed where a trench formation process and a wall oxide film formation process are performed separately depending on a pattern density, and wall...
7118988 Vertically wired integrated circuit and method of fabrication  
A static random access memory (SRAM) cell structure is created in a three-dimensional format as a vertical stack of wired transistors. These transistors are fabricated from crystalline silicon, and...
7118987 Method of achieving improved STI gap fill with reduced stress  
A shallow trench isolation (STI) structure and method of forming the same with reduced stress to improve charge mobility the method including providing a semiconductor substrate comprising at least...
7115478 Method of fabricating a semiconductor device and a method of generating a mask pattern  
At least a groove for separating a semiconductor substrate into a first region of a relatively large area and a second region of a relatively small area is formed. An insulating film is formed on...
7115479 Sacrificial annealing layer for a semiconductor device and a method of fabrication  
Numerous embodiments of a method and apparatus for a sacrificial annealing layer are disclosed. In one embodiment, a method of forming a sacrificial annealing layer for a semiconductor device...
7112511 CMOS image sensor having prism and method for fabricating the same  
A method for fabricating a CMOS image sensor with a prism includes the steps of: forming a plurality of photodiodes corresponding to respective unit pixels on a substrate; sequentially forming an...
7101771 Spin coating for maximum fill characteristic yielding a planarized thin film surface  
A method for spinning a material onto a semiconductor device structure so as to substantially fill recesses formed in a surface of the semiconductor device structure and to impart the material with...
7081395 Silicon strain engineering accomplished via use of specific shallow trench isolation fill materials  
A method of forming a strained silicon layer created via a material mis-match with adjacent trench isolation (TI), regions filled with a dielectric layer comprised with either a higher, or lower...
Matches 1 - 50 out of 319 1 2 3 4 5 6 7 >