Matches 401 - 450 out of 529 < 1 2 3 4 5 6 7 8 9 10 11 >
Match Document Document Title
6133105 Method of manufacturing borderless contact hole including a silicide layer on source/drain and sidewall of trench isolation structure  
A method of manufacturing a borderless contact hole. A substrate having a pad oxide layer and a silicon nitride layer formed thereon is provided. A trench is formed to penetrate through the silicon...
6124184 Method for forming isolation region of semiconductor device  
A method for forming an isolation region of a semiconductor device includes the steps of forming first and second insulating layers on a substrate, removing the second insulating layer over an...
6121113 Method for production of semiconductor device  
A method for the production of a semiconductor device comprises the steps of forming a stopper layer on a semiconducting substrate, forming a first opening part in the stopper layer thereby...
6118168 Trench isolation process using nitrogen preconditioning to reduce crystal defects  
A method of forming a trench isolation structure in a semiconductor substrate. After etching a trench into the semiconductor substrate, an oxide layer is formed within the trench. The surface of...
6117740 Method of forming a shallow trench isolation by using PE-oxide and PE-nitride multi-layer  
A thin silicon dioxide layer is formed on the substrate to act as a pad layer. Subsequently, a silicon nitride layer is deposited on the pad layer. Trenches are formed in the substrate. The...
6114220 Method of fabricating a shallow trench isolation  
A method of fabricating a shallow trench isolation includes formation of a trench in a substrate. An oxide layer is formed on the substrate to fill the trench. A barrier layer and a coating layer...
6114218 Texturized polycrystalline silicon to aid field oxide formation  
A method of forming field oxide during the manufacture of a semiconductor device comprises the steps of providing a semiconductor wafer having a plurality of recesses or trenches therein. A layer...
6110801 Method of fabricating trench isolation for IC manufacture  
A method of fabricating trench isolation is disclosed: firstly, the areas of trench isolation are formed on a silicon substrate, and then filled by depositing an oxide layer. Secondly, a process of...
6110800 Method for fabricating a trench isolation  
A method to form a shallow trench isolation (STI) structure includes forming a trench on a semiconductor substrate. Then a channel stop is formed under the trench. A pad oxide layer and a silicon...
6110795 Method of fabricating shallow trench isolation  
An method of fabricating a shallow trench isolation. A semiconductor substrate having pad oxide layer and a hard mask layer is provided. The pad oxide layer and the hard mask layer are defined to...
6100163 Gap filling of shallow trench isolation by ozone-tetraethoxysilane  
A method for filling a trench within a silicon substrate. There is first provided a silicon substrate having a trench formed therein. There is then oxidized thermally the silicon substrate to form...
6100161 Method of fabrication of a raised source/drain transistor  
A method of fabricating a transistor, comprising the following steps. A silicon semiconductor substrate having a pad oxide portion within an active area is provided. A polysilicon layer is...
6096662 NH.sub.3 /N.sub.2 plasma treatment to enhance the adhesion of silicon nitride to thermal oxide  
A method of manufacturing a semiconductor device with improved adhesion between the local interconnect etch stop layer and the thermal oxide in an isolation region. The thermal oxide is treated...
6096622 Method of forming shallow trench isolation of semiconductor device  
The present invention discloses a method of a shallow trench isolation of a semiconductor device. The method comprises the steps of: forming a mask layer having a silicon layer on a semiconductor...
6093622 Isolation method of semiconductor device using second pad oxide layer formed through chemical vapor deposition (CVD)  
An isolation method in the fabrication process of a semiconductor device is provided. The method forms an oxide layer as a buffer layer for reducing stress through chemical vapor deposition (CVD)....
6093621 Method of forming shallow trench isolation  
A method of fabricating a shallow trench isolation. A pad oxide and a dielectric layer are formed on a substrate. A trench is formed in the substrate penetrating through the pad oxide layer and the...
6093618 Method of fabricating a shallow trench isolation structure  
A method of fabricating a shallow trench isolation structure includes defining a shallow trench isolation region on a substrate covered by a first oxide layer and a mask layer. Then, covering the...
6090685 Method of forming a LOCOS trench isolation structure  
A semiconductor structure pad oxide layer is enlarged by local oxidation of silicon to form a field oxide. An etchback causes the thinnest portions of the field oxide to recede such that a portion...
6090684 Method for manufacturing semiconductor device  
A shallow groove isolation structure (SGI) electrically insulates adjoining transistors on a semiconductor substrate. A pad oxide film is formed on the semiconductor substrate and an oxidation...
6087243 Method of forming trench isolation with high integrity, ultra thin gate oxide  
The quality of an ultra thin gate oxide film, particularly at the edges of a shallow trench isolation structure, is improved employing a double sacrificial oxide technique. After trench filling and...
6083808 Method for forming a trench isolation in a semiconductor device  
A method for forming a trench isolation in a semiconductor device is provided in which a first heat treatment process is conducted on a thermal oxide layer previously formed in a trench at...
6080639 Semiconductor device containing P-HDP interdielectric layer  
Void formation is avoided without thermal treatment by a gap filling between electrically conductive elements such as stacked gates which are formed atop of isolation regions, with an oxide layer...
6074932 Method for forming a stress-free shallow trench isolation  
The method for forming a trench isolation includes the steps as follows. At first, a first pad layer is formed over the semiconductor substrate and a stacked layer is formed over the first pad...
6074930 Method for forming a trench isolation structure comprising an interface treatment for trench liner and a subsequent annealing process  
A method for forming trench isolation in the silicon substrate is disclosed. This method allows for an improved bonding force between the sidewall silicon dioxide layer and the sidewall of the...
6071792 Methods of forming shallow trench isolation regions using plasma deposition techniques  
Methods of forming trench isolation regions include the steps of forming a trench in a semiconductor substrate having a surface thereon and then depositing an electrically insulating layer on the...
6069058 Shallow trench isolation for semiconductor devices  
A shallow trench isolation structure is formed by providing a pad layer and a silicon nitride polish stop layer on a surface of a P-type silicon substrate. The silicon nitride polish stop layer and...
6066544 Isolation regions and methods of forming isolation regions  
A silicon-comprising layer is employed adjacent a trench during planarization of an oxide fill within the trench. An overhanging oxide sidewall is formed along a lateral edge of a trenched...
6066543 Method of manufacturing a gap filling for shallow trench isolation  
A method of manufacturing a semiconductor device includes the steps of forming a trench for isolating an element region on a semiconductor substrate, burying a first oxide film in the trench so as...
6064105 Data retention of EEPROM cell with shallow trench isolation using thicker liner oxide  
A shallow trench isolation structure and a method for forming the same for use with non-volatile memory devices is provided so as to maintain sufficient data retention thereof. An epitaxial layer...
6063693 Planar trenches  
Method for improving the topography over trench structures in which the provision of extra poly-semiconductor material e.g. polysilicon or nitrate or oxide in the regions of the trench edges and,...
6063689 Method for forming an isolation  
A method for forming a shallow-trench isolation starts with forming a polysilicon layer, which has less stress, as the mask layer for patterning the trench on a provided substrate. An oxide layer...
6057210 Method of making a shallow trench isolation for ULSI formation via in-direct CMP process  
A silicon dioxide layer and a silicon nitride layer are formed on the wafer. Subsequently, a plurality of shallow trenches are generated in the wafer. A HDP-CVD oxide having protruding portions is...
6054365 Process for filling deep trenches with polysilicon and oxide  
A process for etching and filling a trench prevents the top opening of the trench from being closed off prior to the trench being completely filled. After a masking layer is deposited and...
6051480 Trench isolation for semiconductor devices  
In etching trench isolation structures, a pad oxide or sacrificial oxide may be formed with substantially the same (or higher) etch rate as the trench filler. Because the etch rate in the trench...
6051479 Method of fabricating shallow trench isolation  
A method of forming a shallow trench isolation in a semiconductor substrate. A mask layer is formed to cover an active region of the substrate. A trench is formed within the exposed substrate. The...
6042887 Process for forming a sausg inter metal dielectric layer by pre-coating the reactor  
A method of manufacturing an insulating layer 30 (IMD layer) that has a uniform etch rate and forms improved via/contact opening profiles. The method forms a coating film 11 of silicon oxide over...
6040231 Method of fabricating a shallow trench isolation structure which includes using a salicide process to form an aslope periphery at the top corner of the substrate  
A method of forming a shallow trench isolation structure is disclosed. The method comprises providing a substrate; forming a first oxide layer, a stop layer and a second oxide layer successively on...
6037237 Trench isolation methods utilizing composite oxide films  
A multilayer oxide film, including at least two oxide layers having differing stress characteristics, is used in a trench isolation method. Preferably, at least a first one of the oxide layers has...
6037018 Shallow trench isolation filled by high density plasma chemical vapor deposition  
A method for filling shallow trenches 28 with a HDPCVD oxide 50. The invention has two liners: (a) a thermal oxide liner 36 and (b) an overlying conformal O 3 -TEOS protective liner 40. The O 3 ...
6033970 Method for forming device-isolating layer in semiconductor device  
A method for forming a device-isolating layer of a semiconductor device in which an APCVD oxide layer and an HDPCVD oxide layer are successively deposited to fill trenches. The method includes...
6030881 High throughput chemical vapor deposition process capable of filling high aspect ratio structures  
A method is provided for filling high aspect ratio gaps without void formation by using a high density plasma (HDP) deposition process with a sequence of deposition and etch steps having varying...
6017803 Method to prevent dishing in chemical mechanical polishing  
A method is described for filling trenches in a substrate for shallow trench isolation or for a metal damascene structure which will prevent dishing when the substrate is planarized using chemical...
6015757 Method of oxide etching with high selectivity to silicon nitride by using polysilicon layer  
A new method for planarization of shallow trench isolation is disclosed by using a polysilicon layer to prevent trench formed in a silicon nitride layer. The formation of the shallow trench...
6013559 Method of forming trench isolation  
A method of fabricating a trench isolation structure in a semiconductor devices. First, a mask layer is formed on a substrate and patterned. Then, a trench is formed in the substrate using the mask...
6010947 Semiconductor device and method for manufacturing  
An end portion of a trench isolating region has a shape of steps so that a residual gate material can be easily removed and it is possible to prevent from conducting between gates. An oxide film 2,...
6008108 Method of fabricating a shallow-trench isolation structure in an integrated circuit  
A semiconductor fabrication method is provided for the fabrication of a shallow-trench isolation (STI) structure in integrated circuit. Conventionally, the insulating plug of the STI structure...
6005279 Trench edge spacer formation  
An insulating trench isolation structure is formed in a semiconductor substrate with a spacer overlying the trench edge to prevent oxide loss during subsequent etching, thereby preventing junction...
6001708 Method for fabricating a shallow trench isolation structure using chemical-mechanical polishing  
A method for fabricating a STI structure includes a pad oxide layer and a hard masking layer first formed over a semiconductor substrate. A trench is formed in the substrate. A first insulating...
5998280 Modified recessed locos isolation process for deep sub-micron device processes  
A trench is etched in a silicon substrate covered with an oxide/nitride stack and a field oxide layer is then grown through oxidation of the silicon in the substrate such that the trench is partly...
5994201 Method for manufacturing shallow trench isolation regions  
A method for manufacturing shallow trench isolation regions according to the invention uses a first stop layer and a second stop layer as two polishing stop layers, or a polishing stop layer and an...
Matches 401 - 450 out of 529 < 1 2 3 4 5 6 7 8 9 10 11 >