Matches 51 - 100 out of 529 < 1 2 3 4 5 6 7 8 9 10 11 >
Match Document Document Title
7205209 Fabrication of stacked dielectric layer for suppressing electrostatic charge buildup  
A method of fabricating a stacked dielectric layer for suppressing electrostatic charge buildup. First, a substrate having metal layers thereon is provided, with a plurality of gaps formed...
7205206 Method of fabricating mobility enhanced CMOS devices  
Compressive or tensile materials are selectively introduced beneath and in alignment with spacer areas and adjacent to channel areas of a semiconductor substrate to enhance or degrade electron and...
7199021 Methods and systems to mitigate etch stop clipping for shallow trench isolation fabrication  
The present invention facilitates semiconductor fabrication by maintaining shape and density of an etch stop layer ( 206 ) during trench fill operations. The shape and density of the etch stop...
7199020 Nitridation of STI liner oxide for modulating inverse width effects in semiconductor devices  
A method ( 1300 ) of forming a semiconductor device comprising an isolation structure is disclosed, and includes forming a trench region within a semiconductor body ( 1308 ). Then, surfaces of the...
7183175 Shallow trench isolation structure for strained Si on SiGe  
A structure, and a method for fabricating the structure, for the isolation of electronic devices is disclosed. The electronic devices are processed in substrates comprising a SiGe based layer...
7166519 Method for isolating semiconductor devices with use of shallow trench isolation method  
The present invention relates to a method for isolating semiconductor devices. The method includes the steps of: forming a patterned pad nitride layer pattern to open at least one isolation region...
7163871 Manufacturing method of semiconductor device and oxidization method of semiconductor substrate  
A manufacturing method of a semiconductor device having a trench is provided to form, at a corner portion of the trench, an oxide film which is greater in thickness and smaller in stress than at...
7163869 Shallow trench isolation structure with converted liner layer  
A STI (shallow trench isolation) structure is formed with a liner layer that is converted from an initial material to a subsequent material. For example, the liner layer is initially comprised of...
7160787 Structure of trench isolation and a method of forming the same  
The present invention is directed toward a structure and method by which trench isolation for a wide trench and a narrow trench formed in first and second regions of a substrate may be achieved...
7160782 Method of manufacture for a trench isolation structure having an implanted buffer layer  
The present invention provides a trench isolation structure, a method of manufacture therefor and a method for manufacturing an integrated circuit including the same. The trench isolation structure...
7157351 Ozone vapor clean method  
A method for cleaning and forming an oxide film on a surface, particularly a silicon surface. The surface is initially cleaned and then exposed to ozone vapor, which forms the oxide film on the...
7151043 Method of manufacturing a semiconductor device  
Methods of manufacturing a semiconductor device are provided. A trench is formed in a semiconductor substrate. A first field oxide layer is formed that partially fills the trench. The first field...
7135371 Methods of fabricating semiconductor devices  
Methods of fabricating semiconductor devices are disclosed. One example method includes forming a gate oxide and a gate electrode on a semiconductor substrate; performing a first ion implantation...
7132349 Methods of forming integrated circuits structures including epitaxial silicon layers in active regions  
An integrated circuit structure can include an isolation structure that electrically isolates an active region of an integrated circuit substrate from adjacent active regions and an insulation...
7129149 Method for forming shallow trench isolation structure with anti-reflective liner  
The present invention relates to a shallow trench isolation structure and a method for forming a shallow trench isolation structure on a semiconductor substrate. A masking structure that includes a...
7118988 Vertically wired integrated circuit and method of fabrication  
A static random access memory (SRAM) cell structure is created in a three-dimensional format as a vertical stack of wired transistors. These transistors are fabricated from crystalline silicon, and...
7118987 Method of achieving improved STI gap fill with reduced stress  
A shallow trench isolation (STI) structure and method of forming the same with reduced stress to improve charge mobility the method including providing a semiconductor substrate comprising at least...
7112513 Sub-micron space liner and densification process  
A method of depositing dielectric material into sub-micron spaces and resultant structures is provided. After a trench is etched in the surface of a wafer, an oxygen barrier is deposited into the...
7112511 CMOS image sensor having prism and method for fabricating the same  
A method for fabricating a CMOS image sensor with a prism includes the steps of: forming a plurality of photodiodes corresponding to respective unit pixels on a substrate; sequentially forming an...
7098116 Shallow trench isolation method for reducing oxide thickness variations at different pattern densities  
A method of reducing oxide thickness variations in a STI pattern that includes both a dense trench array and a wide trench is described. A first HDP CVD step with a deposition/sputter (D/S) ratio...
7098115 Semiconductor device and method of manufacturing the same  
Hexachlorodisilane (Si 2 Cl 6 ) is used as a Si raw material for forming a silicon nitride film that can be widely different in the etching rate from a silicon oxide film. The silicon nitride film...
7091104 Shallow trench isolation  
A method for forming an isolation structure on a semiconductor substrate includes opening a portion of a pad oxide layer overlying the substrate using a process gas including an etchant gas and a...
7081398 Methods of forming a conductive line  
A method of forming a local interconnect includes forming an isolation trench within a semiconductor substrate. A first trench isolation material is deposited to within the trench. First isolation...
7081396 Method for manufacturing device isolation film of semiconductor device  
The present invention discloses method for manufacturing device isolation film wherein a high selectivity slurry containing M x P y O z is used for polishing nitride film to prevent the generation...
7081395 Silicon strain engineering accomplished via use of specific shallow trench isolation fill materials  
A method of forming a strained silicon layer created via a material mis-match with adjacent trench isolation (TI), regions filled with a dielectric layer comprised with either a higher, or lower...
7078315 Method for eliminating inverse narrow width effects in the fabrication of DRAM device  
The present invention provides a method for eliminating inverse narrow width effects in the fabrication of DRAM devices. A semiconductor substrate is provided having thereon a shallow trench. The...
7078312 Method for controlling etch process repeatability  
Plasma etch processes incorporating etch chemistries which include hydrogen. In particular, high density plasma chemical vapor deposition-etch-deposition processes incorporating etch chemistries...
7074691 Method of manufacturing a semiconductor integrated circuit device that includes forming dummy patterns in an isolation region prior to filling with insulating material  
A method for manufacturing a semiconductor integrated circuit device includes the steps of forming an isolation trench in an isolation region of a semiconductor substrate, filling the isolation...
7067390 Method for forming isolation layer of semiconductor device  
Disclosed is a method for forming an isolation layer of a semiconductor device. The method includes the steps of providing a semiconductor substrate having a predetermined isolation region,...
7067377 Recessed channel with separated ONO memory device  
Systems and methods of fabricating a U-shaped memory device with a recessed channel and a segmented/separated ONO layer are provided. Multibit operation is facilitated by a separated ONO layer,...
7060589 Method for manufacturing a semiconductor integrated circuit device that includes covering the bottom of an isolation trench with spin-on glass and etching back the spin-on glass to a predetermined depth  
A method for manufacturing a semiconductor integrated circuit device includes the steps of forming an isolation trench in an isolation region of a semiconductor substrate, filling the isolation...
7060588 Semiconductor device using shallow trench isolation and method of fabricating the same  
A semiconductor device adopting shallow trench isolation for reducing an internal stress of a semiconductor substrate. The semiconductor device is composed of a semiconductor substrate provided...
7060573 Extended poly buffer STI scheme  
A new method of forming shallow trench isolations has been described. A silicon semiconductor substrate is provided. A silicon nitride layer is deposited overlying the substrate. A polysilicon...
7052970 Method for producing insulator structures including a main layer and a barrier layer  
In order to produce insulator structures ( 8 ), insulator trenches ( 21 ) with aspect ratios of greater than 4:1 are introduced into a semiconductor substrate ( 1 ) from a substrate surface ( 10 )...
7041574 Composite intermetal dielectric structure including low-k dielectric material  
A method of forming a composite intermetal dielectric structure is provided. An initial intermetal dielectric structure is provided, which includes a first dielectric layer and two conducting...
7041547 Methods of forming polished material and methods of forming isolation regions  
In one aspect, the invention encompasses a method of forming a polished material. A substrate is provided and an elevational step is provided relative to the substrate. The elevational step has an...
7037785 Method of manufacturing flash memory device  
Disclosed is a method of manufacturing the flash memory device. The method comprises the steps of sequentially forming a tunnel oxide film, a first polysilicon film and a hard mask film on a...
7033909 Method of forming trench isolations  
Methods of forming trench isolations are provided. A method includes providing a semiconductor substrate having a cell array region and a peripheral region. At least one cell trench in the cell...
7033908 Methods of forming integrated circuit devices including insulation layers  
Methods of forming an electronic device including a substrate and a raised pattern on the substrate are provided. For example, a first insulating layer may be formed on the raised pattern and on...
7033907 Method for forming isolation layer of semiconductor device  
A method for forming an isolation layer of a semiconductor device is disclosed, which comprises the steps of: etching a silicon substrate having a cell region and a peripheral circuit region,...
7029989 Semiconductor device and method of manufacturing the same  
The present invention relates to a semiconductor device and a method of manufacturing the same. The minimum marginal width of an impurity diffusion layer is defined to reduce by a given width. The...
7029988 Fabrication method and device structure of shallow trench insulation for silicon wafer containing silicon-germanium  
A method and device are provided for shallow trench isolation for a silicon wafer containing silicon-germanium. In one example, the method comprises forming a trench region in a silicon-germanium...
7022584 Method of manufacturing a shallow trench isolation structure  
A semiconductor device is improved in reliability by suppressing the electric-field concentration at a top edge of a trench or the leak current at a bottom edge thereof. A first thermal oxide film...
7022565 Method of fabricating a trench capacitor of a mixed mode integrated circuit  
A method of fabricating a trench capacitor of a mixed mode integrated circuit includes forming shallow trench isolation regions for isolating active/passive devices on a semiconductor substrate....
7015116 Stress-relieved shallow trench isolation (STI) structure and method for forming the same  
A shallow trench isolation (STI) structure in a semiconductor substrate and a method for forming the same are provided. A trench is formed in a semiconductor substrate. A first dielectric layer is...
7001823 Method of manufacturing a shallow trench isolation structure with low trench parasitic capacitance  
Provided are methods and composition for forming an isolation structure on an integrated circuit substrate. First, a trench is etched in the integrated circuit substrate. A lower dielectric layer...
6998326 Method for manufacturing shallow trench isolation in semiconductor device  
The method for manufacturing a shallow trench isolation (STI) in a semiconductor device with an enhanced gap-fill property and without a detrimental effect of fluorine by introducing a two-stage...
6992024 Gapfill process using a combination of spin-on-glass deposition and chemical vapor deposition techniques  
A method of filling a plurality of trenches etched in a substrate. In one embodiment the method includes depositing a layer of spin-on glass material over the substrate and into the plurality of...
6991994 Method of forming rounded corner in trench  
A method for forming a trench having rounded corners in a semiconductor device comprises providing a substrate; forming a first pad oxide layer, a first silicon nitride layer, and a first oxide...
6984569 Shallow trench isolation (STI) region with high-K liner and method of formation  
A shallow trench isolation region formed in a layer of semiconductor material. The shallow trench isolation region includes a trench formed in the layer of semiconductor material, the trench being...
Matches 51 - 100 out of 529 < 1 2 3 4 5 6 7 8 9 10 11 >