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9040331 Diode-based devices and methods for making the same  
In accordance with an embodiment, a diode comprises a substrate, a dielectric material including an opening that exposes a portion of the substrate, the opening having an aspect ratio of at least...
9040382 Selective epitaxial growth of semiconductor materials with reduced defects  
A semiconductor device includes a substrate formed of a first semiconductor material; two insulators on the substrate; and a semiconductor region having a portion between the two insulators and...
9041088 Non-volatile memory devices having air gaps and methods of manufacturing the same  
Disclosed are non-volatile memory devices and methods of manufacturing the same. The non-volatile memory device includes device isolation patterns defining active portions in a substrate and gate...
9034724 Semiconductor substrate for photonic and electronic structures and method of manufacture  
A method of forming a substrate with isolation areas suitable for integration of electronic and photonic devices is provided. A common reticle and photolithographic technique is used to fabricate...
9034723 Method of making a FinFET device  
A method of fabricating a fin-like field-effect transistor (FinFET) device is disclosed. A plurality of mandrel features are formed on a substrate. First spacers are formed along sidewalls of the...
9034715 Method and structure for dielectric isolation in a fin field effect transistor  
A finFET and method of fabrication are disclosed. A sacrificial layer is formed on a bulk semiconductor substrate. A top semiconductor layer (such as silicon) is disposed on the sacrificial layer....
9035418 Nitride shallow trench isolation (STI) structures  
A shallow trench isolation (STI) structure includes a top surface formed completely of silicon nitride. The top surface of the STI structure is coplanar with a top substrate surface or extends...
9034707 Nonvolatile memory device and method for fabricating the same  
A nonvolatile memory device includes a floating gate formed over a semiconductor substrate, an insulator formed on a first sidewall of the floating gate, a dielectric layer formed on a second...
9029935 Nonvolatile memory device and method for fabricating the same  
A nonvolatile memory device includes a floating gate formed over a semiconductor substrate, an insulator formed on a first sidewall of the floating gate, a dielectric layer formed on a second...
9029272 Method for treating SiOCH film with hydrogen plasma  
A method for forming a gap-fill SiOCH film on a patterned substrate includes: (i) providing a substrate having recessed features on its surface; (ii) filling the recessed features of the substrate...
9024389 Borderless contact for ultra-thin body devices  
After formation of a semiconductor device on a semiconductor-on-insulator (SOI) layer, a first dielectric layer is formed over a recessed top surface of a shallow trench isolation structure. A...
RE45507 ***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***
Integrated circuit having oversized components and method of manufacture thereof
 
An integrated circuit includes electrical components that include one or more electrical elements on one or more dielectric layers. The electrical element has a geometric shape that exceeds...
9023714 Methods of forming a plurality of covered voids in a semiconductor substrate  
Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for distributing coolant, for guiding...
9012293 Sandwich damascene resistor  
A method is provided for forming sandwich damascene resistors in MOL processes and the resulting devices. Embodiments include forming on a substrate a film stack including an interlayer dielectric...
9012300 Manufacturing method for a shallow trench isolation  
A manufacturing method for a shallow trench isolation. First, a substrate is provided, a hard mask layer and a patterned photoresist layer are sequentially formed on the substrate, at least one...
9006079 Methods for forming semiconductor fins with reduced widths  
A method includes forming Shallow Trench Isolation (STI) regions extending from a top surface of a semiconductor substrate into the semiconductor substrate, and after the forming the STI regions,...
9006786 Fin structure of semiconductor device  
The disclosure relates to a fin field effect transistor (FinFET). An exemplary FinFET comprises a substrate comprising a major surface; a fin structure protruding from the major surface comprising...
9003651 Methods for integrated circuit fabrication with protective coating for planarization  
Various pattern transfer and etching steps can be used to create features. Conventional photolithography steps can be used in combination with pitch-reduction techniques to form superimposed,...
8999787 Semiconductor device  
A semiconductor device includes a plurality of conductive layers and a plurality of insulating layers formed alternately with each other, at least one channel layer passing through the plurality...
8999821 Fin formation by epitaxial deposition  
Methods of forming a fin structure for a field effect transistor are described. The methods may include the operations of patterning a mandrel on a surface of a substrate, and depositing an...
9000522 FinFET with dielectric isolation by silicon-on-nothing and method of fabrication  
An improved finFET and method of fabrication using a silicon-on-nothing process flow is disclosed. Nitride spacers protect the fin sides during formation of cavities underneath the fins for the...
8994144 Semiconductor device and method for fabricating the same  
A semiconductor device includes a first isolation layer formed in a trench in a substrate. The isolation layer includes a first oxide layer formed in the trench and a second oxide layer formed...
8993417 FinFET fin bending reduction  
An embodiment method of controlling fin bending in a fin field-effect transistor (FinFET) includes forming an isolation region over a substrate, performing a first annealing process, the first...
8987070 SOI device with embedded liner in box layer to limit STI recess  
A semiconductor substrate having an isolation region and method of forming the same. The method includes the steps of providing a substrate having a substrate layer, a buried oxide (BOX), a...
8987111 Method of manufacturing a three dimensional array having buried word lines of different heights and widths  
According to a method of fabricating a semiconductor device, a first mask pattern is used to etch first device isolation layers and active lines or form grooves, in which word lines will be...
8987082 Method of making a semiconductor device using sacrificial fins  
A method of making a semiconductor device includes forming a sacrificial layer above a semiconductor layer. Portions of the sacrificial layer are selectively removed to define a first set of...
8987119 Pillar devices and methods of making thereof  
A method of making a semiconductor device includes providing an insulating layer containing a plurality of openings, forming a first semiconductor layer in the plurality of openings in the...
8987110 Semiconductor device fabrication method for improved isolation regions and defect-free active semiconductor material  
A fabrication method for a semiconductor device structure is provided. The device structure has a layer of silicon and a layer of silicon dioxide overlying the layer of silicon, and the method...
8987108 Methods of forming semiconductor structures including bodies of semiconductor material  
Semiconductor structures that include bodies of a semiconductor material spaced apart from an underlying substrate. The bodies may be physically separated from the substrate by at least one of a...
8987851 Radio-frequency device package and method for fabricating the same  
The invention provides a radio-frequency (RF) device package and a method for fabricating the same. An exemplary embodiment of a radio-frequency (RF) device package includes a base, wherein a...
8975151 Semiconductor body with a buried material layer and method  
One aspect includes a method for forming a buried material layer in a semiconductor body, including providing a semiconductor body having a first side and having a plurality of first trenches...
8975152 Methods of reducing substrate dislocation during gapfill processing  
Methods of reducing dislocation in a semiconductor substrate between asymmetrical trenches are described. The methods may include etching a plurality of trenches on a semiconductor substrate and...
8975196 Manufacturing method of semiconductor device and manufacturing apparatus of semiconductor device  
According to one embodiment, a method of manufacturing a semiconductor device includes providing a substrate, supplying a first liquid including a terpene to a surface of the substrate, supplying...
8975154 Process for producing at least one deep trench isolation  
A method for producing at least one deep trench isolation in a semiconductor substrate including silicon and having a front side may include forming at least one cavity in the semiconductor...
8969941 Semiconductor device and method for manufacturing same  
According to an embodiment, a semiconductor device, includes a semiconductor substrate, first and second transistors. The first transistor includes a first insulating film provided on the...
8969171 Method of making deep trench, and devices formed by the method  
A method for forming a semiconductor device includes providing a semiconductor-on-insulator (SOI) structure, and forming at least one hard mask (HM) layer over the SOI structure. The SOI structure...
8962430 Method for the formation of a protective dual liner for a shallow trench isolation structure  
On a substrate formed of a first semiconductor layer, an insulating layer and a second semiconductor layer, a silicon oxide pad layer and a silicon nitride pad layer are deposited and patterned to...
8962444 Semiconductor device and method of manufacturing the same  
Methods of manufacturing a semiconductor device are provided. The method includes forming a poly-silicon layer doped with first p-type dopants on a substrate, etching the poly-silicon layer and...
8956950 Method of manufacturing semiconductor devices  
A method of manufacturing semiconductor devices includes forming a plurality of patterns spaced apart from each other on a semiconductor substrate, forming a filling layer, not removed in a...
8951913 Method for removing native oxide and associated residue from a substrate  
Native oxides and associated residue are removed from surfaces of a substrate by sequentially performing two plasma cleaning processes on the substrate in a single processing chamber. The first...
8951884 Method for forming a FinFET structure  
A method for forming a FinFET structure includes providing a substrate, a first region and a second region being defined on the substrate, a first fin structure and a second fin structure being...
8951881 Methods of fabricating nonvolatile memory devices including voids between active regions and related devices  
A method of fabricating a nonvolatile memory device includes forming trenches in a substrate defining device isolation regions therein and active regions therebetween. The trenches and the active...
8951883 Semiconductor device and manufacturing method thereof  
A semiconductor device and a manufacturing method therefor is based on the fact that a thinner liner oxide layer on the bottom of the trenches can lead to a higher subsequent deposition rate....
8946024 Nonvolatile memory device and method for fabricating the same  
A nonvolatile memory device includes a floating gate formed over a semiconductor substrate, an insulator formed on a first sidewall of the floating gate, a dielectric layer formed on a second...
8946049 Replacement gate structures and methods of manufacturing  
Gate structures and methods of manufacturing is disclosed. The method includes forming a continuous replacement gate structure within a trench formed in dielectric material. The method further...
8946050 Double trench well formation in SRAM cells  
A method is provided for forming SRAM cells with low energy implants. Embodiments include forming deep trenches in a silicon substrate; forming a deep n-well or deep p-well around a bottom of each...
8946048 Method of fabricating non-volatile memory with flat cell structures and air gap isolation  
High-density semiconductor memory is provided with enhancements to gate-coupling and electrical isolation between discrete devices in non-volatile memory. The intermediate dielectric between...
8941145 Systems and methods for dry etching a photodetector array  
Systems and methods for dry eteching a photodetector array based on InAsSb are provided. A method for fabricating an array of photodetectors includes receiving a pattern of an array of...
8940588 Bulk FinFET ESD devices  
Aspects of the disclosure provide a dual electrostatic discharge (ESD) protection device in fin field effect transistor (FinFET) process technology and methods of forming the same. In one...
8936995 Methods of fabricating isolation regions of semiconductor devices and structures thereof  
Methods of fabricating isolation regions of semiconductor devices and structures thereof are disclosed. In a preferred embodiment, a semiconductor device includes a workpiece and at least one...