|
Match
|
Document |
Document Title |
|
|
7415319 |
Lithographic apparatus and device manufacturing method
Correcting for misalignment of a substrate before it is exposed is performed using offset corrections and process corrections that are calculated based on alignment offset measurements of alignment...
|
|
|
7410880 |
Method for measuring bonding quality of bonded substrates, metrology apparatus, and method of producing a device from a bonded substrate
In a method for measuring the bonding quality of bonded substrates, such as bonded SOI wafers, a plurality of marks are created at a first side of a top substrate after, or before, the bonding of...
|
|
|
7408265 |
Use of a dual-tone resist to form photomasks including alignment mark protection, intermediate semiconductor device structures and bulk semiconductor device substrates
An alignment mark mask element protects an underlying alignment mark during subsequent processing of a fabrication substrate. The alignment mark mask element is formed concurrent with formation of...
|
|
|
7405134 |
Method of manufacturing a semiconductor device and electronic equipment
Exemplary embodiments of the present invention provide a method of manufacturing a semiconductor device that can take a connection between layers without giving damage to a layer, which is...
|
|
|
7393754 |
Tape carrier type semiconductor device and method of producing the same
A tape carrier type semiconductor device comprising: a long flexible insulating tape; and a plurality of semiconductor devices sequentially arranged on one surface of the tape, wherein each...
|
|
|
7390723 |
Alignment method of using alignment marks on wafer edge
A method for stacking and bonding wafers in precision alignment by detecting alignment marks provided on wafer edges, comprising the steps of: (a) providing at least a first wafer having at least a...
|
|
|
7390722 |
System and method for using an oxidation process to create a stepper alignment structure on semiconductor wafers
An oxidation process is used to produce a positional reference structure on a semiconductor wafer. A photolithographic mask layer used to define the positional reference structure can be combined...
|
|
|
7379184 |
Overlay measurement target
In an overlay metrology method used during semiconductor device fabrication, an overlay alignment mark facilitates alignment and/or measurement of alignment error of two layers on a semiconductor...
|
|
|
7371655 |
Method of fabricating low-power CMOS device
A low-power CMOS device can be fabricated by forming a shallow trench on a silicon substrate using a gate mask and negative photoresist. This enables an extremely low profile for a junction after...
|
|
|
7371652 |
Alignment using fiducial features
The present invention relates to positioning components of an assembly using fiducial features. A first fiducial feature on a first piece of the assembly can be located. A first component can be...
|
|
|
7368362 |
Methods for increasing photo alignment margins
Methods and structures are provided for increasing alignment margins when contacting pitch multiplied interconnect lines with other conductive features in memory devices. The portions of the lines...
|
|
|
7361569 |
Methods for increasing photo-alignment margins
Methods and structures are provided for increasing alignment margins when contacting pitch multiplied interconnect lines with other conductive features in memory devices. The portions of the lines...
|
|
|
7359054 |
Overlay target and measurement method using reference and sub-grids
A method of determining alignment error in electronic substrates comprises providing on a layer of a substrate a first contrasting set of elements forming a first grid pattern having a plurality of...
|
|
|
7349140 |
Triple alignment substrate method and structure for packaging devices
A method for aligning multiple substrates. The method includes providing a handle substrate, providing a spacer substrate, and forming a plurality of first alignment marks on a first surface of the...
|
|
|
7348246 |
Methods of fabricating non-volatile memory devices including divided charge storage structures
A semiconductor memory device includes a substrate having first and second source/drain regions therein and a channel region therebetween. The device also includes first and second charge storage...
|
|
|
7348109 |
Reticle, semiconductor die and method of manufacturing semiconductor device
The invention is directed to increasing the number of semiconductor dice obtained from one semiconductor wafer and enhancing the reliability and yield of the semiconductor dice when the...
|
|
|
7346415 |
Semiconductor wafer positioning method, and apparatus using the same
The intensity of light of a predetermined wavelength corresponding to the type of a protective tape joined to the surface of a semiconductor wafer is adjusted by a controller, and a holding stage...
|
|
|
7344955 |
Cut-and-paste imprint lithographic mold and method therefor
A method (and apparatus) of replicating a pattern on a structure, includes using imprint lithography to replicate a pattern formed on a first structure onto a portion of a second structure.
|
|
|
7338885 |
Alignment mark and method for manufacturing a semiconductor device having the same
In a method for manufacturing a semiconductor device having an alignment mark, a buffer layer is formed on a substrate. A trench is formed at an isolation region of the substrate. The trench is...
|
|
|
7335571 |
Method of making a semiconductor device having an opening in a solder mask
A method for a fiducial and pin one indicator that utilizes a single solder resist opening in a die mounting substrate to perform the combined functions of prior art fiducials and pin one...
|
|
|
7332405 |
Method of forming alignment marks for semiconductor device fabrication
A semiconductor integrated circuit is fabricated in a substrate having a semiconductor layer and an underlying insulator layer. The fabrication process includes a step of locally oxidizing the...
|
|
|
7330261 |
Marker structure for optical alignment of a substrate, a substrate including such a marker structure, an alignment method for aligning to such a marker structure, and a lithographic projection apparatus
A marker structure on a substrate for optical alignment of the substrate includes a plurality of first structural elements and a plurality of second structural elements. In use, the marker...
|
|
|
7323393 |
Method of reducing film stress on overlay mark
An integrated circuit capable of operating despite a profile shift is disclosed. Overlay marks on the integrated circuit are surrounded by a trench that tends to relieve the effect of a profile...
|
|
|
7319073 |
Method of reducing silicon damage around laser marking region of wafers in STI CMP process
A wafer has thereon a plurality of integrated circuit die areas, scribe line that surrounds each of the integrated circuit die areas, and a laser marking region having therein a laser marking...
|
|
|
7316963 |
Method for manufacturing semiconductor device
Disclosed herein is a method for manufacturing a semiconductor device. According to the present invention, a device isolation film having a step difference occurring during a process of forming a...
|
|
|
7313873 |
Surface position measuring method, exposure apparatus, and device manufacturing method
A surface position measuring method wherein measurement light is obliquely projected onto a substrate surface and on the basis of a position of the detected measurement light and a predetected...
|
|
|
7307001 |
Wafer repair method using direct-writing
A method of wafer repairing comprises identifying locations and patterns of defective regions in a semiconductor wafer; communicating the locations and patterns of defective regions to a...
|
|
|
7304713 |
Liquid crystal display panel with marks for checking cutting precision by visual inspection
A liquid crystal display (LCD) panel with marks for checking cutting precision by visual inspection is provided. A checkerboard mark is formed on an intersection of two adjacent cutting lines of...
|
|
|
7294937 |
Apparatus and method for manufacturing a semiconductor wafer with reduced delamination and peeling
A multi-layered semiconductor structure with free areas limiting the placement of test keys. First and second scribe lines intersect to define one corner point of a die. The first and second scribe...
|
|
|
7291931 |
Semiconductor device, semiconductor substrate and fabrication process of a semiconductor device
A semiconductor device includes a first insulation layer including a first conductor pattern, a second insulation layer formed on the first insulation layer and including a second conductor...
|
|
|
7289868 |
System and method for calculating a shift value between pattern instances
A method comprising adjusting a first relative position between a substrate and a fabrication unit by a first shift value, forming a first pattern relative to a first pattern instance on the...
|
|
|
7289213 |
Apparatus and methods for detecting overlay errors using scatterometry
Disclose is a combined scatterometry mark comprising a scatterometry critical dimension (CD) or profile target capable of being measured to determine CD or profile information and a scatterometry...
|
|
|
7288461 |
Method of forming interconnect having stacked alignment mark
A first film layer is formed over a substrate. A portion of the first film layer is removed to form a first alignment mark pattern and a first conductive layer is formed to fill the first alignment...
|
|
|
7283236 |
Alignment system and lithographic apparatus equipped with such an alignment system
A marker structure on a substrate includes line elements and trench elements, the line elements and trench elements each having a length in a first direction and being arranged in an alternating...
|
|
|
7282422 |
Overlay key, method of manufacturing the same and method of measuring an overlay degree using the same
An overlay key includes a first overlay key having a first main overlay pattern and a first auxiliary pattern, and a second overlay key having a second main overlay pattern and a second auxiliary...
|
|
|
7282421 |
Methods for reducing a thickness variation of a nitride layer formed in a shallow trench isolation CMP process and for forming a device isolation film of a semiconductor device
A method for reducing a thickness variation of a nitride layer in a shallow trench isolation (STI) CMP process is provided, the method including forming an active region pattern in an alignment key...
|
|
|
7276423 |
III-nitride device and method with variable epitaxial growth direction
A semiconductor device composed of III-nitride materials is produced with epitaxial growth that permits vertical and lateral growth geometries to improve device characteristics. The resulting...
|
|
|
7271073 |
Marker for alignment of non-transparent gate layer, method for manufacturing such a marker, and use of such a marker in a lithographic apparatus
A method for manufacturing a marker structure including line elements and trench elements arranged in a repetitive order includes filling the trench elements with silicon dioxide and leveling the...
|
|
|
7268440 |
Fabrication of semiconductor integrated circuit chips
A semiconductor wafer includes a plurality of active circuit die areas, each of which being bordered by a dicing line region through which the plurality of active circuit die areas are separated...
|
|
|
7268054 |
Methods for increasing photo-alignment margins
Methods and structures are provided for increasing alignment margins when contacting pitch multiplied interconnect lines with other conductive features in memory devices. The portions of the lines...
|
|
|
7268053 |
Semiconductor wafer and a method for manufacturing a semiconductor wafer
A semiconductor wafer includes (a) a first principal side and a second principal side opposite to each other, (b) a first bevel contour and a second bevel contour provided at an outer periphery of...
|
|
|
7265021 |
Alignment method, method for manufacturing a semiconductor device, substrate for a semiconductor device, electronic equipment
Aspects of the invention can provide an alignment method that is preferably applicable when manufacturing equipments by liquid-phase processing. The alignment method in a device manufacturing...
|
|
|
7253077 |
Substrate, method of preparing a substrate, method of measurement, lithographic apparatus, device manufacturing method and device manufactured thereby, and machine-readable storage medium
In a method according to one embodiment of the invention, a plurality of markers are printed in resist on a substrate at a range of angles relative to a crystal axis of the substrate. The markers...
|
|
|
7247952 |
Optical targets
An optical target is provided. In one embodiment, the target is formed on a substrate. The target includes a first layer deposited below a second layer on the substrate. The second layer is...
|
|
|
7241688 |
Aperture masks for circuit fabrication
Aperture masks and deposition techniques for using aperture masks are described. In addition, techniques for creating aperture masks and other techniques for using the aperture masks are described....
|
|
|
7241664 |
Alignment mark forming method, substrate in which devices are formed, and liquid discharging head using substrate
A method of manufacturing functional elements by forming a plurality of functional elements each having a through-hole piercing a surface on a substrate. The method includes the steps of forming an...
|
|
|
7238592 |
Method of manufacturing a semiconductor device having an alignment mark
A method of manufacturing a semiconductor device includes providing a substrate and forming a projecting alignment mark. The substrate includes an insulating layer and a semiconductor layer on the...
|
|
|
7236244 |
Alignment target to be measured with multiple polarization states
An alignment target includes periodic patterns on two elements. The periodic patterns are aligned when the two elements are properly aligned. By measuring the two periodic patterns at multiple...
|
|
|
7235464 |
Patterning method
The invention relates to a method for creating a pattern on a substrate comprising a first alignment structure, using an elastomeric stamp comprising a patterning structure and a second alignment...
|
|
|
7235455 |
Method of aligning an electron beam apparatus and semiconductor substrate utilizing an alignment mark
Disclosed are a semiconductor wafer, a semiconductor device, and a method of manufacturing the semiconductor device, which are capable of easily carrying out an alignment between a semiconductor...
|