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7598099 Method of controlling a fabrication process using an iso-dense bias  
Embodiments of controlling a fabrication process using an iso-dense bias are generally described herein. Other embodiments may be described and claimed.
7595213 Semiconductor devices, CMOS image sensors, and methods of manufacturing same  
A semiconductor device includes: a trench device isolating region formed in a substrate to define a photodiode active region; a channel stop impurity region formed in the substrate contacting the...
7592234 Method for forming a nitrogen-containing gate insulating film  
A method for forming a nitrogen-containing gate insulating film includes the steps of forming a silicon oxide film on a silicon substrate, nitriding the top portion of the silicon oxide film to...
7585745 Semiconductor device and a method of manufacturing the same  
A technique is provided which permits formation within a single chip both a field effect transistor of high reliability capable of suppressing the occurrence of a crystal defect and a field effect...
7560363 Manufacturing method for SIMOX substrate  
A manufacturing method for a SIMOX substrate for obtaining a SIMOX substrate by subjecting a silicon substrate having oxygen ions implanted thereinto by heat treatment at 1300 to 1350° C. in an...
7550361 Trench structure and method for co-alignment of mixed optical and electron beam lithographic fabrication levels  
A method for aligning a first set of features of a fabrication level of an integrated circuit chip to an electron beam alignment target formed in a substrate and forming the first set of features...
7521331 High dielectric film and related method of manufacture  
A method of forming a high dielectric film for a semiconductor device comprises supplying a first source gas to a reaction chamber during a first time interval, supplying a first reactant gas to...
7514802 Wiring board  
A flexible insulating base, a plurality of conductor wirings aligned on the flexible insulating base, and bump electrodes provided respectively in end portions of the plurality of conductor wirings...
7488671 Nanostructure arrays and methods of making same  
A method of making a nanostructure array including disposing a masking material on a nanoporous template such that a first number of the plurality of nanopores are fully coated while a second...
7485504 Stable PD-SOI devices and methods  
One aspect of the present subject matter relates to a partially depleted silicon-on-insulator structure. The structure includes a well region formed above an oxide insulation layer. In various...
7482258 Product and method for integration of deep trench mesh and structures under a bond pad  
A method of integrating circuit components under bond pads includes establishing a trench border on a circuit element and synthesizing a set of trench mesh edges of a trench mesh to be coincident...
7465642 Methods for forming semiconductor structures with buried isolation collars  
A semiconductor structure including a trench formed in a substrate and a buried isolation collar that extends about sidewalls of the trench. The buried isolation collar is constituted by an...
7432593 Semiconductor package assembly and method for electrically isolating modules  
A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for...
7429518 Method for forming shallow trench isolation of semiconductor device  
A shallow trench isolation well is formed to be very thin in a highly integrated semiconductor device. When critical dimension (CD) is small, it is difficult to reduce the width of the...
7407826 Vacuum packaged single crystal silicon device  
A method for forming a vibrating micromechanical structure having a single crystal silicon (SCS) micromechanical resonator formed using a two-wafer process, including either a Silicon-on-insulator...
7387918 Method of forming a silicon controlled rectifier structure with improved punch through resistance  
When a high-voltage, such as from an ESD pulse, is placed across a silicon controlled rectifier, which includes an NPN transistor and a PNP transistor that is connected to the NPN transistor, the...
7381625 Deterministic process for constructing nanodevices  
A method is provided for constructing a nanodevice. The method includes: fabricating an electrode on a substrate; forming a nanogap across the electrode; dispersing a plurality of nanoobjects onto...
7354812 Multiple-depth STI trenches in integrated circuit fabrication  
Multiple trench depths within an integrated circuit device are formed by first forming trenches in a substrate to a first depth, but of varying widths. Formation of a dielectric layer can cause...
7344981 Plated terminations  
A multilayer electronic component includes a plurality of dielectric layers interleaved with a plurality of internal electrode elements and a plurality of internal anchor tabs. Portions of the...
7303974 Method for producing electrochemical capacitor electrode  
A method is provided for optimizing the physical characteristics of a coating solution for an undercoat layer formed between a polarizable electrode layer and surface-roughened collector. A first...
7285433 Integrated devices with optical and electrical isolation and method for making  
The invention is directed to a method for optical and electrical isolation between adjacent integrated devices. The method comprises the steps of forming at least one trench through an exposed...
7279393 Trench isolation structure and method of manufacture therefor  
The present invention provides a trench isolation structure, a method for manufacturing a trench isolation structure, and a method for manufacturing an integrated circuit including the trench...
7262110 Trench isolation structure and method of formation  
In general, the present invention discloses at least one trench isolation region formed in a semiconductor substrate to electrically and/or optically isolate at least one active region from another...
7256099 Method of producing electrochemical device, and the electrochemical device  
A first electrode and a second electrode to be used are electrodes each of which has a collector, and a porous material layer with electron conductivity placed between the collector and a...
7214595 Method of producing semiconductor devices  
A method of producing semiconductor devices is provided, which makes it possible to bury a silicon oxide without shape deterioration in device isolation trenches. The method comprises the steps of:...
7172914 Method of making uniform oxide layer  
A method of forming a semiconductor structure includes forming an isolation region in a semiconductor substrate. A first oxide layer is on the substrate, a first sacrificial layer is on the first...
7166519 Method for isolating semiconductor devices with use of shallow trench isolation method  
The present invention relates to a method for isolating semiconductor devices. The method includes the steps of: forming a patterned pad nitride layer pattern to open at least one isolation region...
7154537 Camera system, control method thereof, device manufacturing apparatus, exposure apparatus, and device manufacturing method  
An exposure apparatus for exposing a substrate to a pattern. The apparatus includes a stage configured to hold the substrate and to move, a driving unit configured to drive the stage, a plurality...
7141486 Shallow trench isolation structures comprising a graded doped sacrificial silicon dioxide material and a method for forming shallow trench isolation structures  
A shallow trench isolation structure having a negative taper angle. A graded doped sacrificial layer is formed over a semiconductor substrate and etched to form a first trench therein having trench...
7112849 Method of preventing semiconductor layers from bending and semiconductor device formed thereby  
Disclosed herein are various methods for preventing bending of a patterned SOI layer during trench sidewall oxidation, the methods comprising providing a patterned SOI layer having at least one...
7094661 Single and dual damascene techniques utilizing composite polymer dielectric film  
A method of forming an electrically conductive element in an integrated circuit is disclosed. The method includes depositing a composite polymer dielectric film onto a silicon-containing substrate,...
7078349 Method to form self-aligned floating gate to diffusion structures in flash  
A self-aligned conductive region to active region structure is disclosed in which parallel active regions of a semiconductor region of a substrate, which extends to a surface, are separated by STI...
7072167 Co-fired ceramic capacitor and method for forming ceramic capacitors for use in printed wiring boards  
A capacitor structure is fabricated by forming a pattern of first dielectrics over a foil, forming first electrodes over the first dielectrics, and co-firing the first dielectrics and the first...
7071039 Manufacturing method of partial SOI wafer, semiconductor device using the partial SOI wafer and manufacturing method thereof  
A semiconductor device includes a first semiconductor region having a buried oxide layer formed therein, a second semiconductor region in which the buried oxide layer does not exist, a trench...
7053007 Method for fabricating semiconductor integrated circuit device  
A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and...
7052970 Method for producing insulator structures including a main layer and a barrier layer  
In order to produce insulator structures ( 8 ), insulator trenches ( 21 ) with aspect ratios of greater than 4:1 are introduced into a semiconductor substrate ( 1 ) from a substrate surface ( 10 )...
7045437 Method for fabricating shallow trenches  
A method of forming shallow trenches used, for example, in shallow trench isolation includes the steps of providing a p-type silicon substrate, forming a layer in the p-type silicon substrate,...
7019378 Field-shielded SOI-MOS structure free from floating body effects, and method of fabrication therefor  
A silicon-on-insulator structure provides an effective drift field for holes, and simultaneously enhanced recombination centers for holes and electrons. The structure includes a silicon substrate,...
7008547 Solid phase sensors  
Provided is a solid phase array of electrical sensors, each comprising a channel and electrical leads for attaching to a voltage, current or resistivity meter for measuring the voltage, current or...
7005334 Zero threshold voltage pFET and method of making same  
A zero threshold voltage (ZVt) pFET ( 104 ) and a method of making the same. The ZVt pFET is made by implanting a p-type substrate ( 112 ) with a retrograde n-well ( 116 ) so that a pocket ( 136 )...
6998695 Semiconductor device having a mushroom gate with hollow space  
A method of manufacturing a semiconductor device has the steps of: forming a mushroom gate traversing an active region of a semiconductor substrate and having a fine gate and an expanded over gate...
6995072 Method of making sacrificial self-aligned interconnection structure  
A sacrificial, self-aligned polysilicon interconnect structure is formed in a region of insulating material to the side of an active region location and underlying a semiconductor device of a...
6989317 Trench formation in semiconductor integrated circuits (ICs)  
A novel trench etching method for etching trenches of different depths which are self-aligned to one another is presented. The method comprises the steps of (a) creating first and second trenches...
6987065 Method of manufacturing self aligned electrode with field insulation  
The present invention provides a semiconductor device comprising: a semiconductor layer ( 3 ); a gate electrode ( 11 ) formed on the semiconductor layer ( 3 ) via a gate insulation film ( 10 ); and...
6982206 Mechanism for improving the structural integrity of low-k films  
According to one embodiment, a method of forming a low-k dielectric composite film is provided. A low-k interconnect dielectric layer is strengthened by forming whiskers in the low-k film. The...
6977205 Method for manufacturing SOI LOCOS MOSFET with metal oxide film or impurity-implanted field oxide  
This invention provides a semiconductor device with an element isolation implemented by a method of manufacturing a semiconductor device comprising the steps of: forming a pad oxide film 140 and...
6969663 Method of manufacturing a memory integrated circuit device  
A method of manufacturing a memory integrated circuit device including a memory cell region and a peripheral circuit region on a semiconductor substrate includes the steps of (a) forming a first...
6964911 Method for forming a semiconductor device having isolation regions  
A method for forming a semiconductor device having isolation structures decreases leakage current. A channel isolation structure decreases leakage current through a channel structure. In addition,...
6936481 Method of depositing dielectric  
This invention relates to a method of depositing dielectric on a semiconductor substrate to form part of a capacitor. The method includes reactive sputtering a metal oxide layer from a target of...
6933203 Methods for improving well to well isolation  
Methods are provided for forming wells in a semiconductor wafer, in which p-wells and n-wells are formed in a substrate, and first p-type dopants are implanted into n-well regions while an n-well...
Matches 1 - 50 out of 195 1 2 3 4 >