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8183137 Use of dopants to provide low defect gate full silicidation  
The disclosure provides a semiconductor device and method of manufacture therefore. The method for manufacturing the semiconductor device, in one embodiment, includes forming a layer of gate...
8178932 Semiconductor device having transistors  
A semiconductor device includes a first transistor having a threshold voltage (Vth) adjusted to a first Vth by a first dopant having a first peak of concentration at a first depth; and a second...
8174074 Asymmetric embedded silicon germanium field effect transistor  
A semiconductor device, an integrated circuit, and method for fabricating the same are disclosed. The semiconductor device includes a gate stack formed on an active region of a silicon-on-insulator...
8168505 Method of fabricating transistor with epitaxial layers having different germanium concentrations  
A method of fabricating a transistor is provided. The transistor includes a SiGe epitaxial layer formed in a recess region of a substrate at both side of a gate electrode and a SiGe capping layer...
8153496 Self-aligned process and method for fabrication of high efficiency solar cells  
An improved method of doping a substrate is disclosed. The method is particularly beneficial to the creation of interdigitated back contact (IBC) solar cells. A patterned implant is performed to...
8153495 Semiconductor device and LTPS-TFT within and method of making the same  
A thin film transistor (TFT) formed on a substrate includes a polycrystalline film, a gate insulator, a hydrogen-supplying film and a gate electrode. The polycrystalline film is formed on the...
8101528 Low temperature ion implantation  
A method of processing to a substrate while minimizing cost and manufacturing time is disclosed. The implantation of the source and drain regions of a semiconductor device are performed at low...
8097518 Semiconductor device and manufacturing method therefor  
There is provided a semiconductor device including a semiconductor substrate (10), a high concentration diffusion region (22) formed within the semiconductor substrate (10), a first low...
8076209 Methods for fabricating MOS devices having highly stressed channels  
Methods for forming a semiconductor device comprising a silicon-comprising substrate are provided. One exemplary method comprises depositing a polysilicon layer overlying the silicon-comprising...
8076211 Fabricating bipolar junction select transistors for semiconductor memories  
A bipolar junction transistor may act as a select device for a semiconductor memory. The bipolar junction transistor may be formed of a stack of base and collector layers. Sets of parallel trenches...
8071451 Method of doping semiconductors  
A method of doping a semiconductor body is provided herein. In one embodiment, a semiconductor body is exposed to an activated hydrogen gas for a predetermined time period and temperature. The...
8067301 Image sensor and method for forming the same  
A reliable image sensor and a method for forming the same are provided. The image sensor includes a photo-detective device. At least one transistor is electrically connected to the photo-detective...
8035196 Methods of counter-doping collector regions in bipolar transistors  
The present invention provides a method of forming a bipolar transistor. The method includes doping a silicon layer with a first type of dopant and performing a first implant process to implant...
8030167 Varied impurity profile region formation for varying breakdown voltage of devices  
Methods are disclosed for forming a varied impurity profile for a collector using scattered ions while simultaneously forming a subcollector. In one embodiment, the invention includes: providing a...
7993698 Techniques for temperature controlled ion implantation  
Techniques for temperature-controlled ion implantation are disclosed. In one particular exemplary embodiment, the techniques may be realized as an apparatus for temperature-controlled ion...
7972971 Method for producing Si1-yGey based zones with different contents in Ge on a same substrate by condensation of germanium  
The disclosure relates to a method for producing a microelectronic device including a plurality of Si1-yGey based semi-conducting zones (where 0
7951681 Substrate-triggered bipolar junction transistor and ESD protection circuit  
An ESD protection circuit using a novel substrate-triggered lateral bipolar junction transistor (STLBJT) for providing a discharging path between power rails. The ESD protection circuit comprises...
7939418 Partial implantation method for semiconductor manufacturing  
Disclosed herein is a partial implantation method for manufacturing semiconductor devices. The method involves implantation of dopant ions at different densities into a plurality of wafer regions,...
7935601 Method for providing semiconductors having self-aligned ion implant  
A method is disclosed that provides a self-aligned nitrogen-implant particularly suited for a Junction Field Effect Transistor (JFET) semiconductor device preferably comprised of a silicon carbide...
7913195 Method for creating mask layout data, apparatus for creating mask layout data, and method for manufacturing semiconductor device  
According to mask layout data created for a particular factory facility, transistors constituting a semiconductor device are classified into multiple groups depending on the gate length....
7897459 Semiconductor device and manufacturing method thereof  
A through electrode is formed prior to fabricating a semiconductor device by using a standard manufacturing method. Aside face of the through electrode is insulated from a semiconductor substrate...
7888226 Method of fabricating power semiconductor device for suppressing substrate recirculation current  
A power semiconductor device has a first region in which a transistor is formed, a third region in which a control element is formed, and a second region for separating the first region and the...
7883946 Angled implantation for deep submicron device optimization  
A method for forming a submicron device includes depositing a hard mask over a first region that includes a polysilicon well of a first dopant type and a gate of a second dopant type and a second...
7851317 Method for fabricating high voltage drift in semiconductor device  
A drift of a high voltage transistor formed using an STI (shallow trench isolation). The method for forming a high voltage drift of a semiconductor device can include forming a pad insulating film...
7846806 System and method for providing a self aligned silicon germanium (SiGe) heterojunction bipolar transistor using a mesa emitter-base architecture  
A system and method are disclosed for providing a self aligned silicon germanium (SiGe) heterojunction bipolar transistor using a mesa emitter-base architecture. The transistor of the present...
7838378 Semiconductor device and manufacturing method thereof  
A semiconductor device and a method for manufacturing the semiconductor device are provided. The method includes forming a collector region of a second conductivity type in a semiconductor...
7838375 System and method for providing a polyemit module for a self aligned heterojunction bipolar transistor architecture  
A system and method are disclosed for providing an improved polyemit module for a self aligned heterojunction bipolar transistor architecture. The polyemit module of the transistor of the present...
7825457 Semiconductor device and manufacturing method therefor  
There is provided a semiconductor device including a semiconductor substrate (10), a high concentration diffusion region (22) formed within the semiconductor substrate (10), a first low...
7820511 Normally-off integrated JFET power switches in wide bandgap semiconductors and methods of making  
Wide bandgap semiconductor devices including normally-off VJFET integrated power switches are described. The power switches can be implemented monolithically or hybridly, and may be integrated with...
7772075 Formation of a MOSFET using an angled implant  
A LDMOS transistor having a channel region located between an outer boundary of an n-type region and an inner boundary of a p-body region. A width of the LDMOS channel region is less than 80% of a...
7759211 Method of fabricating semiconductor device  
There is provided a method of fabricating semiconductor devices that allows ion implantation to be performed at high temperature with ions accelerated with high energy to help to introduce dopant...
7759148 Method for manufacturing semiconductor optical device  
A method for manufacturing a semiconductor optical device includes forming a BDR (Band Discontinuity Reduction) layer of a first conductivity type doped with an impurity, depositing a contact layer...
7756687 Method for predicting contributions of silicon interstitials to n-type dopant transient enhanced diffusion during a pn junction formation  
A method for predicting the contribution of silicon interstitials to n-type dopant transient enhanced diffusion during a pn junction formation is disclosed. Initially, fundamental data for a set of...
7750405 Low-cost high-performance planar back-gate CMOS  
A method of fabricating a high-performance planar back-gate CMOS structure having superior short-channel characteristics and reduced capacitance using processing steps that are not too lengthy or...
7737014 Reduction of boron diffusivity in pFETs  
A stressed film applied across a boundary defined by a structure or a body (e.g. substrate or layer) of semiconductor material provides a change from tensile to compressive stress in the...
7736994 Method for manufacturing compound material wafers and corresponding compound material wafer  
The invention relates to a method for manufacturing compound material wafers, in particular, silicon on insulator type wafers, by providing an initial donor substrate, forming an insulating layer...
7732292 Bipolar transistor with self-aligned retrograde extrinsic base implant profile and self-aligned silicide  
Disclosed is a method of forming a transistor in an integrated circuit structure that begins by forming a collector in a substrate and an intrinsic base above the collector. Then, the invention...
7727845 Ultra shallow junction formation by solid phase diffusion  
An ultra shallow junction (USJ) FET device and method for forming the same with improved control over SDE or LDD doped region interfaces to improve device performance and reliability is provided,...
7727868 Apparatus and method for controlling diffusion  
A method and device for reducing a dopant diffusion rate in a doped semiconductor region is provided. The methods and devices include selecting a plurality of dopant elements. Selection of a...
7648893 Method for manufacturing a semiconductor-on-insulator substrate for microelectronics and optoelectronics  
A method for manufacturing a semiconductor including the steps of supplying a substrate having a support with one face supporting a strained silicon thin layer; forming a first mask on a portion of...
7645652 CMOS image sensor and method for fabricating the same  
A CMOS image sensor and a method of fabricating the same are provided. The CMOS image sensor includes: a semiconductor substrate of a first conductivity type having a photodiode region and a...
7642169 Method of making a bipolar junction transistor  
Embodiments relate to a bipolar junction transistor and a method for manufacturing the same. An oxide pattern may be formed on a P type semiconductor substrate. A low-density N type collector area...
7615458 Activation of CMOS source/drain extensions by ultra-high temperature anneals  
A method of manufacturing a semiconductor device that includes forming a gate dielectric layer over a semiconductor substrate. A gate electrode is formed over the gate dielectric layer. A dopant is...
7572708 Utilization of doped glass on the sidewall of the emitter window in a bipolar transistor structure  
A bipolar transistor device architecture and method of manufacture uses doped glass on the sidewall of the emitter window opening to reduce the emitter-base overlap capacitance while at the same...
7563685 Bipolar-transistor and method for the production of a bipolar-transistor  
The invention relates to NPN and PNP bipolar transistors and to a method for the production thereof, said transistors being characterised by a particularly high collector-emitter and collector-base...
7556994 Normally-off integrated JFET power switches in wide bandgap semiconductors and methods of making  
Wide bandgap semiconductor devices including normally-off VJFET integrated power switches are described. The power switches can be implemented monolithically or hybridly, and may be integrated with...
7550355 Low-leakage transistor and manufacturing method thereof  
A boron ion stream may be used to implant ions, such as boron ions, into the sidewalls of an active area, such as an NFET active area. The boron ion stream has both vertical tilt and horizontal...
7550358 MEMS device including a laterally movable portion with piezo-resistive sensing elements and electrostatic actuating elements on trench side walls, and methods for producing the same  
A method to create piezoresistive sensing elements and electrostatic actuator elements on trench sidewalls is disclosed. P-type doped regions are formed in the upper surface of an n-type substrate....
7485528 Method of forming memory devices by performing halogen ion implantation and diffusion processes  
Disclosed is a method of forming memory devices employing halogen ion implantation and diffusion processes. In one illustrative embodiment, the method includes forming a plurality of word line...
7442616 Method of manufacturing a bipolar transistor and bipolar transistor thereof  
A bipolar transistor (100) is manufactured using the following processes: (a) forming a base electrode layer (129) as a portion of a base electrode over a semiconductor substrate (110); (b) forming...
Matches 1 - 50 out of 189 1 2 3 4 >