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7378324 Selective links in silicon hetero-junction bipolar transistors using carbon doping and method of forming same  
Bipolar transistors and methods of forming the bipolar transistors. The method including forming a P-type collector in a silicon substrate; forming an intrinsic base on the collector, the intrinsic...
7033895 Method of fabricating a MOS transistor with elevated source/drain structure using a selective epitaxial growth process  
In a metal-oxide semiconductor (MOS) transistor with an elevated source/drain structure and in a method of fabricating the MOS transistor with the elevated source/drain structure using a selective...
6767798 Method of forming self-aligned NPN transistor with raised extrinsic base  
A self-aligned bipolar transistor and a method of formation thereof are provided. The bipolar transistor has a raised extrinsic base such that the link base resistance is reduced by providing an...
6699760 Method for growing layers of group III-nitride semiconductor having electrically passivated threading defects  
One method includes epitaxially growing a layer of group III-nitride semiconductor under growth conditions that cause a growth surface to be rough. The method also includes performing an epitaxial...
6624045 Thermal conducting trench in a seminconductor structure and method for forming the same  
The invention relates to a method of forming a trench filled with a thermally conducting material in a semiconductor substrate. In one embodiment, the method includes filling a portion of the...
6593200 Method of forming an integrated inductor and high speed interconnect in a planarized process with shallow trench isolation  
A method of forming a semiconductor device with an inductor and/or high speed interconnect. The method comprises forming an epitaxial layer over the substrate, forming an opening through the...
6579774 Semiconductor device fabrication method  
A semiconductor device fabrication method includes the steps of forming a first insulation layer and a first semiconductor layer sequentially on a semiconductor substrate having a buried diffusion...
6444591 Method for reducing contamination prior to epitaxial growth and related structure  
According to a disclosed embodiment, the surface of a semiconductor wafer is covered by an etch stop layer. For example, the etch stop layer can be composed of silicon dioxide. A cap layer is then...
6436780 Semiconductor device  
A number of npn and pnp bipolar transistors are formed in a single chip of silicon, so that some of the transistors have a greater frequency response than others The higher frequency transistors...
6331470 Process for manufacturing a semiconductor material wafer having power regions dielectrically insulated from circuitry regions  
A manufacturing process is carried out starting from an SOI type wafer including a top silicon layer and a bottom silicon layer separated from each other by a buried silicon dioxide layer. In the...
6313000 Process for formation of vertically isolated bipolar transistor device  
A vertically-isolated bipolar transistor occupying reduced surface area is fabricated by circumscribing an expected active device region within a first narrow trench. The first trench is filled...
6297118 Vertical bipolar semiconductor power transistor with an interdigitzed geometry, with optimization of the base-to-emitter potential difference  
A transistor including an epitaxial layer with a first conductivity type, a base buried region with a second conductivity type, and a sinker base region with the second conductivity type which...
6242313 Use of polysilicon field plates to improve high voltage bipolar device breakdown voltage  
A method for fabricating a buried layer pinched collector bipolar, (BPCB), device, sharing several process steps with simultaneously formed CMOS devices, has been developed. The BPCB device...
6228733 Non-selective epitaxial depostion technology  
Base layer formation without the use of selective epitaxial deposition is described. The process begins with the deposition of a seed layer of polysilicon over both the field oxide and the wafer...
6171894 Method of manufacturing BICMOS integrated circuits on a conventional CMOS substrate  
A method of manufacturing a BICMOS integrated circuit including an NPN transistor in a heavily-doped P-type wafer coated with a lightly-doped P-type layer, including the steps of forming an N well...
6140196 Method of fabricating high power bipolar junction transistor  
A method of fabricating a high power bipolar junction transistor. A P-type substrate having an N-type buried region is provided and a trench is formed within the substrate to expose the buried...
6057184 Semiconductor device fabrication method using connecting implants  
A semiconductor device and method of fabrication for such device in which a P- epitaxial layer is positioned above a P++ substrate. A P++ buried layer implant is positioned within the device...
6015726 Semiconductor device and method of producing the same  
A method of producing a semiconductor device having a bipolar transistor and a CMOS (Complementary Metal Oxide Semiconductor) transistor is disclosed. An epitaxial layer is formed on a...
6010937 Reduction of dislocations in a heteroepitaxial semiconductor structure  
A heteroepitaxial semiconductor device having reduced density of threading dislocations and a process for forming such a device. According to one embodiment, the device includes a substrate which...
5909623 Manufacturing method of semiconductor device  
A manufacturing method of the present invention comprises the first step of forming an epitaxial base layer in an opening of an element-isolating oxide film on a semiconductor substrate in a...
5866446 Method of manufacturing bimos device  
To enable a high speed operation and to increase the current gain, the disclosed a method of manufacturing a semiconductor device, comprising the steps of: forming a first semiconductor layer with...
5677209 Method for fabricating a vertical bipolar transistor  
A method for reproducibly fabricating a thin base region of a vertical bipolar transistor therein, which has a high transfer speed and increases a current driving force, and a method for increasing...
5646055 Method for making bipolar transistor  
A bipolar transistor (10) includes a collector region (13), a base region (14) in the collector region (13), and an emitter region (20) in the base region (14). A portion (18) of an electrical...
5580798 Method of fabricating bipolar transistor having a guard ring  
In a bipolar or BiCMOS process, a heavily doped buried layer of a first conductivity type and a heavily doped channel stop region of a second conductivity type are formed in a lightly doped...
5512508 Method and apparatus for improvement of interconnection capacitance  
A method and apparatus for reducing interconnection capacitance. A lightly doped buried layer is provided in or on a substrate below a field oxide region. The capacitance of an interconnect on the...
5500378 Process for forming a bipolar type semiconductor device  
A semiconductor device in which a bipolar transistor is provided, such as a BiCMOS, and a production process thereof. The device has collector region of a first conductivity type; an intrinsic base...
5416039 Method of making BiCDMOS structures  
A process is disclosed which simultaneously forms high quality complementary bipolar transistors, relatively high voltage CMOS transistors, relatively low voltage CMOS transistors, DMOS...
5389563 Method of fabricating a bipolar transistor having a high ion concentration buried floating collector  
A semiconductor device having a reduced leakage current is fabricated in a short time at a low cost with excellent controllability. A buried layer (20) which includes a principal buried layer (21)...
5389553 Methods for fabrication of transistors  
In a bipolar transistor, the collector and the base are formed in an isolation region laterally bounded by a field insulator. The isolation region corners are spaced far from the emitter to reduce...
5376564 Method of manufacturing a bipolar transistor having a decreased collector-base capacitance  
On manufacturing a bipolar transistor, a field silicon oxide layer (7) having a beaked edge portion (bird's beak portion) is formed by a heat oxidation process using a silicon nitride film (5) as...
5366907 Method of fabricating a BI-CMOS integrated circuit device  
The invention provides a novel method of fabricating a semiconductor integrated circuit device involving a bipolar transistor having a collector contact with side-wall oxide films. After forming an...
5364802 Method of making a semiconductor device with buried electrode  
A semiconductor device including a bipolar transistor, has a collector region including a first semiconductor region of the first conductivity type and a second semiconductor region of the first...
5352617 Method for manufacturing Bi-CMOS transistor devices  
A method of manufacturing a semiconductor device having a bipolar transistor and a MOS transistor is disclosed, which comprises covering the bipolar transistor formation region with a gate...
5328858 Method for producing the bipolar transistor  
A silicon oxide film is formed at a surface of a silicon substrate of a first conductive type, and then patterned to have an opening. PSG is deposited on the silicon substrate having the insulating...
5324672 Manufacturing method for bipolar transistor  
A bipolar transistor including a semiconductor layer formed on a semiconductor substrate; a base region formed at an upper portion of the semiconductor layer; a graft base region formed at the...
5294558 Method of making double-self-aligned bipolar transistor structure  
A method of making an improved bipolar transistor and the transistor itself having a double-self-aligned device structure are disclosed. The method and the transistor device provide self-alignment...
5244832 Method for fabricating a poly emitter logic array and apparatus produced thereby  
A Schottky diode includes a metal layer (62) on an epitaxial region (24). The metal layer (62) is covered with a dielectric layer (64). An area (90) on the metal is exposed by opening a via (68) in...
5242854 High performance semiconductor devices and their manufacture  
A high performance bipolar transistor and a method of fabrication. Base resistance is reduced by a self-aligned silicide formed in the single-crystal region of the extrinsic base, thereby...
5238850 Bi-MOS type semiconductor integrated circuit device having high-frequency characteristics and method of making the same  
A Bi-MOS type semiconductor integrated circuit device having at least one bipolar transistor in an island region is provided. The island region is covered with a multilayer insulating film which is...
5229307 Method of making extended silicide and external contact  
There is disclosed a process for making high performance bipolar and high performance MOS devices on the same integrated circuit die. The process comprises forming isolation islands of epitaxial...
5213988 Method of manufacturing bipolar transistor with self-aligned base regions  
To manufacture a semiconductor device, a buried layer, epitaxial layer and an element separating layer are formed on a substrate, in order; a first resist film is formed thereon and an opening at...
5208169 Method of forming high voltage bipolar transistor for a BICMOS integrated circuit  
A high voltage bipolar transistor (10) is fabricated in an N- HV/epitaxial well (12) formed by an N- substrate implant and the overlying portion of the N- epitaxial layer 12b. The N- substrate...
5139961 Reducing base resistance of a BJT by forming a self aligned silicide in the single crystal region of the extrinsic base  
A high performance bipolar transistor and a method of fabrication. Base resistance is reduced by a self-aligned silicide formed in the single-crystal region of the extrinsic base, thereby...
5137839 Method of manufacturing a bipolar transistor having polysilicon layer which serves as an emitter electrode and passivating dangling bonds  
In a bipolar transistor, a polysilicon layer formed on an emitter diffusion layer is used as an emitter electrode. After the polysilicon layer is formed, an atom is introduced into the polysilicon...
5061646 Method for forming a self-aligned bipolar transistor  
A structure and process for fabricating a fully self-aligned high-performance bipolar semiconductor device is disclosed. In accordance with one embodiment of the invention, a substrate is provided...
5045484 Fabrication method of a BIMOS semiconductor device  
A method for fabricating a BIMOS device includes steps of forming a first insulator layer on the semiconductor layer in correspondence to a first region, providing a gate electrode of a...
5013672 Manufacturing process for high-frequency bipolar transistors  
The process calls for determination of the contact areas occupied by the collector, emitter and base implantations by selective removal of a layer of oxidation resistant material only from said...
5010026 Process for making bipolar transistor  
A bipolar transistor has a base region consisting of a graft base region, linking base region and an intrinsic base region, and a diffusion suppressing region of an opposite conductivity type to...
5006476 Transistor manufacturing process using three-step base doping  
In a transistor fabrication process, the use of a three-step base doping technique enables the characteristics of a vertical bipolar transistor to be controllably reproduced at highly optimal...
4994413 Method of manufacturing a semiconductor device having a silicon carbide layer  
A method of forming a semiconductor device on a silicon carbide layer comprises steps of introducing an impurity into selected parts of the silicon carbide layer, and oxidizing the silicon carbide...
Matches 1 - 50 out of 132 1 2 3 >