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7585723 Method for fabricating capacitor  
A method for fabricating a semiconductor device includes forming an insulation structure over a substrate structure including contact plugs, etching the insulation structure to form opening regions...
7579251 Aerosol deposition process  
A circuit substrate includes a passive element and an interconnection pattern, wherein any of the passive element and the interconnection pattern is formed by an aerosol deposition process that...
7572710 Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects  
The invention comprises methods of forming a conductive contact to a source/drain region of a field effect transistor, and methods of forming local interconnects. In one implementation, a method of...
7531416 Thick film capacitors on ceramic interconnect substrates  
Thick-film capacitors are formed on ceramic interconnect substrates having high capacitance densities and other desirable electrical and physical properties. The capacitor dielectrics are fired at...
7531405 Method of manufacturing a dielectric layer and corresponding semiconductor device  
A polycrystalline dielectric layer is formed wherein the dielectric layer comprises a first dielectric material containing an oxide or nitride and a second material contributing to less than 1% in...
7494889 Method of manufacturing an interposer including at least one passive element at least partially defined by a recess therein  
An interposer for assembly with a semiconductor die and methods of manufacture are disclosed. The interposer may include at least one passive element at least partially defined by at least one...
7488665 Structurally-stabilized capacitors and method of making of same  
Structurally-stable, tall capacitors having unique three-dimensional architectures for semiconductor devices are disclosed. The capacitors include monolithically-fabricated upright microstructures,...
7456484 Semiconductor device having IGBT and diode  
A semiconductor device includes: a semiconductor substrate having first and second semiconductor layers; an IGBT having a collector region, a base region in the first semiconductor layer, an...
7446014 Nanoelectrochemical cell  
A method is provided for forming a NanoElectroChemical (NEC) cell. The method provides a bottom electrode with a top surface. Nanowire shells are formed. Each nanowire shell has a nanowire and a...
7446011 Array of cells including a selection bipolar transistor and fabrication method thereof  
A cell array is formed by a plurality of cells each including a selection bipolar transistor and a storage component. The cell array is formed in a body including a common collector region of P...
7416904 Method for forming dielectric layer of capacitor  
A fabrication method for forming a semiconductor device having a capacitor is provided. A capacitor dielectric layer is formed by depositing a first layer and a second layer. The second layer is a...
7413994 Hydrogen and oxygen based photoresist removal process  
The present invention provides a photoresist removal process and a method for manufacturing an interconnect using the same. One embodiment of the photoresist removal process includes, among other...
7341919 Capacitor element, manufacturing method therefor, semiconductor device substrate, and semiconductor device  
A capacitor element configured to mount a semiconductor element thereon includes a base. A capacitor part is provided on the base. The base is made of a resin whose coefficient of linear expansion...
7314786 Metal resistor, resistor material and method  
A metal resistor and resistor material and method of forming the metal resistor are disclosed. The metal resistor may include an infused metal selected from the group consisting of: copper (Cu)...
7314780 Semiconductor package, method of production of same, and semiconductor device  
A semiconductor package, provided with a multilayer interconnect structure, for mounting a semiconductor chip on its top surface, wherein a topmost stacked structure of the multilayer interconnect...
7306999 High voltage sensor device and method therefor  
In one embodiment, a high voltage element is formed overlying a doped semiconductor region that can be depleted during the operation of the high voltage element.
7288826 Semiconductor integrated circuit device  
The bottom side of an N type silicon substrate is connected to a power supply terminal, a second P type epitaxial layer is formed on all sides of the N type silicon substrate, and a device forming...
7276420 Method of manufacturing a passive integrated matching network for power amplifiers  
An impedance matching network is integrated on a first die and coupled to a second die, with the first and second dies mounted on a conductive back plate. The impedance matching network comprises a...
7253495 Integrated circuit package with air gap  
An integrated circuit (IC) package comprises an IC wafer comprising a circuit. A “C”-shaped layer is arranged adjacent to the substrate and that creates an air gap between the “C”-shaped...
7250348 Apparatus and method for packaging semiconductor devices using a patterned photo sensitive film to reduce stress buffering  
A method and apparatus for packaging semiconductor devices using patterned laminate films to reduce stress buffering. The method includes fabricating a semiconductor die having thin film resistors...
7226845 Semiconductor constructions, and methods of forming capacitor devices  
The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage...
7202648 Fully integrated DC-to-DC regulator utilizing on-chip inductors with high frequency magnetic materials  
An fully integrated DC-to-DC switching converter having an inductor, where the inductor has magnetic material that may be amorphous CoZrTa, CoFeHfO, CoAlO, FeSiO, CoFeAlO, CoNbTa, CoZr, and other...
7169661 Process of fabricating high resistance CMOS resistor  
A process of forming a high resistance CMOS resistor with a relatively small die size is provided. According to an aspect of the present invention, the process of fabricating a high resistance...
7160772 Structure and method for integrating MIM capacitor in BEOL wiring levels  
A method for integrating a metal-insulator-metal (MIM) capacitor in back end of line (BEOL) wiring levels of a semiconductor device includes forming an isolating layer over a lower wiring level,...
7151036 Precision high-frequency capacitor formed on semiconductor substrate  
A precision high-frequency capacitor includes a dielectric layer formed on the front side surface of a semiconductor substrate and a first electrode on top of the dielectric layer. The...
7141865 Low noise semiconductor amplifier  
A Low Noise semiconductor amplifier structure formed from layers of differently doped semiconductor material. This structure when properly biased will amplify voltage signals applied to the input...
7135415 Insulated structure of a chip array component and fabrication method of the same  
An insulated structure of a chip array component and fabrication method of the same, the element is fabricated by enclosing its main body with a dense layer of high surface insulation resistance...
7135375 Varactors for CMOS and BiCMOS technologies  
Varactors are provided which have a high tunability and/or a high quality factor associated therewith as well as methods for fabricating the same. One type of varactor disclosed is a quasi...
7084485 Method of manufacturing a semiconductor component, and semiconductor component formed thereby  
A method of manufacturing a semiconductor component includes: providing a semiconductor substrate ( 210, 510 ); forming a trench ( 130, 430 ) in the semiconductor substrate to define a plurality of...
7078304 Method for producing an electrical circuit  
An electrical circuit is formed by forming and patterning a conductive layer on a substrate, forming and patterning a conductive layer on another substrate, depositing a dielectric layer on at...
7045426 Vertical type power MOSFET having trenched gate structure  
A power MOSFET comprising a drain layer of a first conductivity type, a drift layer of the first conductivity type provided on the drain layer, a base layer of a first or a second conductivity type...
7041565 Method for fabricating a capacitor in a semiconductor device  
A method for fabricating a capacitor in a semiconductor device that includes providing a semiconductor substrate, forming at least one shallow trench isolation structure in the semiconductor...
7033900 Protection of integrated circuit gates during metallization processes  
In one embodiment, a first transistor is configured to switch ON to discharge accumulated charges on an interconnect line during a metallization process. This advantageously protects a second...
7025615 Fabrication method, varactor, and integrated circuit  
A method in the fabrication of an integrated bipolar circuit for forming a p/n-junction varactor is disclosed. The method featuring the steps of providing a p-doped substrate ( 10; 10, 41 );...
6995053 Vertical thin film transistor  
A vertical thin-film transistor (V-TFT) is provided along with a method for forming the V-TFT. The method comprises: providing a substrate made from a material such as Si, quartz, glass, or...
6940147 Integrated inductor having magnetic layer  
A dielectric layer is formed over a substrate comprising a semiconductor material. A magnetic layer is formed over the dielectric layer. The magnetic layer comprises an amorphous alloy comprising...
6916719 Method and apparatus for non-conductively interconnecting integrated circuits  
Methods and apparatus are described for capacitively signaling between different semiconductor chips and modules without the use of connectors, solder bumps, wire-bond interconnections or the like....
6890826 Method of making bipolar transistor with integrated base contact and field plate  
A method of manufacturing a bipolar junction transistor results in an integrated polysilicon base contact and field plate element minimally spaced from a polysilicon emitter contact by using a...
6867475 Semiconductor device with an inductive element  
There is provided a semiconductor device able to prevent performance degradation of an inductor element provided thereon. A high resistance region is provided below the inductor element formed on...
6833606 Fabrication of a heterojunction bipolar transistor with integrated MIM capacitor  
In the present invention, a semiconductor device is formed which includes an MIM capacitor located on the upper surface of a heterostructure from which the emitter, base and collector sections of a...
6830970 Inductance and via forming in a monolithic circuit  
A method for manufacturing, in a monolithic circuit including a substrate, an inductance and a through via, including the step of forming, from a first surface of the substrate, at least one trench...
6808973 Manufacturing method of semiconductor device  
In a capacitor formation area A 1 , a capacitor C 1 is formed. The capacitor is constituted by a lower-layer electrode-use polysilicon layer 105 (lower-layer electrode) formed on a LOCOS...
6800532 Method of manufacturing a semiconductor device comprising a bipolar transistor and a variable capacitor  
A variable capacitor includes an N + layer including a variable capacitance region, a P + layer epitaxially grown on the N + layer and formed from a SiGe film and a Si film, and a P-type...
6791158 Integrated inductor  
The invention concerns an intgrated inductor ( 20 ), consisting of a flat winding of one or several turns ( 21, 22, 23 ) made of a conductive material above a substrate provided with at least a...
6784518 Integrated circuit device comprising an inductor with high quality coefficient  
The integrated circuit comprises an inductor made at a metallization level of the circuit and a buried layer situated in the substrate of the integrated circuit under the said inductor, and...
6777774 Low noise inductor using electrically floating high resistive and grounded low resistive patterned shield  
A novel complimentary shielded inductor on a semiconductor is disclosed. A region of electrically floating high resistive material is deposited between the inductor and the semiconductor substrate....
6774459 Capacitor layout technique for reduction of fixed pattern noise in a CMOS sensor  
A new capacitor architecture includes a front plate of the capacitor formed form a first polysilicon layer. The front plate is surround by first and second dielectric layers. The back plate of the...
6764918 Structure and method of making a high performance semiconductor device having a narrow doping profile  
A structure and method of making an NPN heterojunction bipolar transistor ( 100 ) includes a semiconductor substrate ( 11 ) with a first region ( 82 ) containing a dopant ( 86 ) for forming a base...
6727154 Methods for fabricating inductor for integrated circuit or integrated circuit package  
An inductor for an integrated circuit or integrated circuit package comprises a three-dimensional structure. In one embodiment the inductor is arranged on an integrated circuit substrate in at...
6645875 Method of processing metal and method of manufacturing semiconductor device using the metal  
When a barrier metal disposed on a thin film resistor material is wet-etched to expose the underlying thin film resistor material as a thin film resistor, the wet etching is performed at first and...
Matches 1 - 50 out of 130 1 2 3 >