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7569474 |
Method and apparatus for soldering modules to substrates
A method and apparatus for attaching a module such as a semiconductor device, having an array of contacts arranged thereon in a given pattern to a substrate such as a printed circuit board...
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7250340 |
Method of fabricating programmable structure including discontinuous storage elements and spacer control gates in a trench
A method of fabricating a semiconductor storage cell that includes first and second source/drain regions underlying first and second trenches defined in a semiconductor substrate. Sidewalls of the...
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6875649 |
Methods for manufacturing integrated circuit devices including an isolation region defining an active region area
Integrated circuit devices including an isolation region are provided. The devices include an integrated circuit substrate and a trench in the integrated circuit substrate that defines an active...
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6858509 |
Bipolar transistor with upper heterojunction collector and method for making same
A collector-up heterojunction bipolar transistor including, stacked on a substrate, an emitter layer, a base layer, and a collector layer. In this transistor the surface area of the base-emitter...
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6833308 |
Structure and method for dual gate oxide thicknesses
Structures and methods involving at least a pair of gate oxides having different thicknesses, one suitable for use in a logic device and one suitable for use in a memory device, have been shown....
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6777302 |
Nitride pedestal for raised extrinsic base HBT process
A method of fabricating a high-performance, raised extrinsic base HBT having a narrow emitter width is provided. In accordance with the method, a patterned nitride pedestal region and inner spacers...
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6777301 |
Method of producing hetero-junction bipolar transistor
A method of producing a hetero-junction bipolar transistor includes: laminating semiconductor layers that are to be a subcollector layer, a collector layer, a base layer, an emitter layer and an...
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6683364 |
Integrated circuit devices including an isolation region defining an active region area and methods for manufacturing the same
Integrated circuit devices including an isolation region are provided. The devices include an integrated circuit substrate and a trench in the integrated circuit substrate that defines an active...
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6649472 |
Method of manufacturing a flash memory cell with high programming efficiency by coupling from floating gate to sidewall
A new method to form flash memory devices in the manufacture of an integrated circuit device is achieved. The method comprises providing a substrate. A first film is formed comprising a first oxide...
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6624017 |
Manufacturing process of a germanium implanted HBT bipolar transistor
A process fabricates a vertical structure high carrier mobility transistor on a substrate of crystalline silicon doped with impurities of the N type, the transistor having a collector region...
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6605519 |
Method for thin film lift-off processes using lateral extended etching masks and device
A method for forming an etching mask structure on a substrate includes etching the substrate, laterally expanding the etching mask structure, and depositing a self-aligned metal layer that is...
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6579752 |
Phosphorus dopant control in low-temperature Si and SiGe epitaxy
A method of manufacturing a semiconductor device comprising the step of epitaxially growing of an n-type doped layer of a semiconductor material using an n-type dopant gas, the growth process being...
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6570215 |
Nonvolatile memories with floating gate spacers, and methods of fabrication
In a nonvolatile memory, a floating gate includes a portion of a conductive layer ( 150 ), and also includes conductive spacers ( 610 ). The spacers increase the capacitive coupling between the...
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6506670 |
Self aligned gate
A method for making a gate in an integrated circuit. A gate layer is formed on a substrate, and a blocking layer is formed on the gate layer. The blocking layer is masked with a photoresist layer,...
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6500721 |
Bipolar thin-film transistors and method for forming
A bipolar junction transistor includes a substrate, a first layer, a second layer, and a third layer. The first layer comprises non-single-crystalline semiconductor material having a first...
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6461927 |
Semiconductor device and method of producing the same
In the case of a semiconductor device where a base electrode 11 in a collector top heterojunction bipolar transistor is disposed so as to contact with the side face of a base layer 5 in which...
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6436765 |
Method of fabricating a trenched flash memory cell
A method of fabricating a trenched flash memory cell is provided. A plurality of shallow trench isolation structures are formed to enclose at least an active area in a silicon substrate. A doped...
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6426266 |
Manufacturing method for an inverted-structure bipolar transistor with improved high-frequency characteristics
In an element intrinsic region 12 of a bipolar transistor, an emitter is formed by two emitter layers 31,32 so as to reduce the potential barrier presented to minority carriers, this resulting...
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6329259 |
Collector-up RF power transistor
A method for manufacturing a low voltage high frequency silicon power transistor applying epitaxial mesa structure using a minimized number of masks has a highly doped silicon n + + substrate...
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6281089 |
Method for fabricating an embedded flash memory cell
A method for embedded flash cell fabrication beyond 0.35 Ξm generation. First, a relatively thick field oxide layer is formed on the P-type substrate to separate the flash cell areas and logic...
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6150224 |
Method of manufacturing a semiconductor device with a bipolar transistor
The invention relates to the manufacture of a so-called differential bipolar transistor comprising a base (1A), an emitter (2) and a collector (3), the base (1A) being formed by applying a doped...
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6090675 |
Formation of dielectric layer employing high ozone:tetraethyl-ortho-silicate ratios during chemical vapor deposition
A method for forming upon a microelectronics layer upon a substrate employed within a microelectronics fabrication a silicon oxide dielectric layer with enhanced density and reduced mobile species,...
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5943577 |
Method of making heterojunction bipolar structure having air and implanted isolations
In a method manufacturing a semiconductor device, a semiconductor layer having a device forming region is formed on substrate. Next, a region except for the device forming region is changed into an...
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5821149 |
Method of fabricating a heterobipolar transistor
A method of fabricating an HBT using differential epitaxy. By using an emitter mask and an exside-inside spacer structure, a self-aligned fabrication of an emitter contact and a base contact is...
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5710058 |
Method of making multi-terminal resonant tunneling transistor
A transistor according to the invention for simultaneously providing at least two current-voltage characteristics includes a base, a collector, and an emitter. At least one of the base, collector,...
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5705408 |
Method for forming semiconductor integrated circuit using monolayer epitaxial growth
A semiconductor integrated circuit device including: an off-substrate having a semiconductor surface with a plurality of steps each having a height of one monolayer and extending in one direction;...
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5631173 |
Method for forming collector up heterojunction bipolar transistor having insulative extrinsic emitter
A process and structure for an improved collector-up bipolar transistor. The base is formed after the emitter is implanted to eliminate base damage during oxygen implantation typical in prior art...
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5512496 |
Method of making collector-up bipolar transistor having improved emitter injection efficiency
A collector-up bipolar transistor having an undercut region (522) beneath extrinsic regions of a base layer (510) and an emitter layer (508). The extrinsic emitter region is depleted of charge...
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5434091 |
Method for making collector up bipolar transistors having reducing junction capacitance and increasing current gain
This is a method of fabricating a bipolar transistor on a wafer. The method can comprise: forming a doped emitter contact layer 31 on a substrate 30; forming a doped emitter layer 32 on top of the...
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5296389 |
Method of fabricating a heterojunction bipolar transistor
On a semi-insulating substrate, an emitter layer (or a collector layer), a base layer, a compound semiconductor layer containing In and a collector layer (or an emitter layer) are provided. The...
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5264379 |
Method of making a hetero-junction bipolar transistor
A method of manufacturing a heterojunction bipolar transistor is disclosed. On a base layer of a first semiconductor which contains at least one of gallium and arsenic as a constituent element, an...
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5166081 |
Method of producing a bipolar transistor
A dummy emitter is formed in the portion corresponding to an emitter region, on a multiplayer structural material comprising layers for forming emitter, base and collector, and using it as mask, an...
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5053346 |
Method for making a high speed gallium arsenide transistor
Vertical buried emitter heterojunction bipolar transistors having greatly reduced emitter to base junction area and collector dimensions are fabricated in a gallium arsenide substrate to form an...
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5047365 |
Method for manufacturing a heterostructure transistor having a germanium layer on gallium arsenide using molecular beam epitaxial growth
A heterostructure bipolar transistor is formed by a process of steps of holding an N-type gallium arsenide body using as an emitter region in a high vacuum of 10 -9 torr to 10 -13 torr at a first...
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5037769 |
Method of manufacturing semiconductor device
A semiconductor device of a multilayer structure comprising semiconductor materials of different properties manufactured by using at least a step of epitaxially forming a semiconductor material...
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5013682 |
Method for selective epitaxy using a WS.sub.I mask
Selective growth of GaAs and related semiconductors (34) by use of tungsten silicide and related materials for growth masks (36) plus devices incorporating the selective growth plus use of the...
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5006488 |
High temperature lift-off process
Disclosed is a process for forming a pattern of metallization on a processed semiconductor substrate, under high temperature conditions, employing a polyimide precursor material as a lift-off...
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4843033 |
Method for outdiffusion of zinc into III-V substrates using zinc tungsten silicide as dopant source
A method of diffusion of dopants (e.g. zinc) into III-V substrates (e.g. GaAs) using metal silicide and dopants (e.g. W x Si y :Zn) is disclosed. A cap layer (e.g. SiO 2 or Si 3 N 4 ) is also...
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4746626 |
Method of manufacturing heterojunction bipolar transistors
A heterojunction bipolar transistor having excellent high-frequency characteristics is manufactured by forming a semi-insulating semiconductor layer on a collector (or emitter) layer, removing a...
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4654960 |
Method for fabricating GaAs bipolar integrated circuit devices
Bipolar transistors and other electronic structures are fabricated on a gallium arsenide (GaAs) substrate to form an integrated circuit device. This process is made possible by development of an...
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4617724 |
Process for fabricating heterojunction bipolar transistor with low base resistance
When the collector, base and emitter layers of a heterojunction bipolar transistor or a tunneling hot electron transistor are vertically stacked, the thickness of the base layer is preferably small...
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4573064 |
GaAs/GaAlAs Heterojunction bipolar integrated circuit devices
Bipolar transistors and other electronic structures are fabricated on a gallium arsenide (GaAs) substrate to form an integrated circuit device. This integrated circuit device is made possible by...
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