Matches 101 - 150 out of 368 < 1 2 3 4 5 6 7 8 >


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7582536 Electronic device with reduced interface charge between epitaxially grown layers and a method for making the same  
An electronic device contains a substrate, a sub-collector supported by the substrate, an un-doped layer having a selectively implanted buried sub-collector and supported by the sub-collector, an...
7566919 Method to reduce seedlayer topography in BICMOS process  
A method for forming an epitaxial base layer in a bipolar device. The method comprises the steps of: providing a structure having a field isolation oxide region (12) adjacent to an active silicon...
7556976 Method of fabricating semiconductor devices employing at least one modulation doped quantum well structure and one or more etch stop layers for accurate contact formation  
A method of fabricating a semiconductor device includes the steps of forming (or providing) a series of layers formed on a substrate, the layers including a first plurality of layers including an...
7550351 Structure and method for creation of a transistor  
The invention is directed to an improved transistor that reduces dopant cross-diffusion and improves chip density. A first embodiment of the invention comprises gate electrode material partially...
7524730 Method of fabricating bipolar junction transistor  
A method of fabricating a bipolar junction transistor is provided herein. An isolation structure is formed on a first conductive type substrate. A second conductive type deep well is formed in the...
7517768 Method for fabricating a heterojunction bipolar transistor  
A bipolar transistor with a SiGe:C film and a seed layer forming beneath the SiGe:C film and methods of making same. The method includes placing a substrate in a reactor chamber and introducing a...
7498620 Integration of phosphorus emitter in an NPN device in a BiCMOS process  
According to one exemplary embodiment, a heterojunction bipolar transistor includes a base situated on a substrate. The heterojunction bipolar transistor can be an NPN silicon-germanium...
7494888 Device and method using isotopically enriched silicon  
The present invention provides a process for manufacturing a semiconductor device that can be incorporated into an integrated circuit. The method includes, forming a first doped layer of...
7488662 Self-aligned vertical PNP transistor for high performance SiGe CBiCMOS process  
A structure and a process for a self-aligned vertical PNP transistor for high performance SiGe CBiCMOS process. Embodiments include SiGe CBiCMOS with high-performance SiGe NPN transistors and PNP...
7485537 Method of fabricating a vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thickness  
The present invention provides a a method of fabricating bipolar junction transistors (BJTs) on selected areas of a very thin buried oxide (BOX) using a conventional silicon-on-insulator (SOI)...
7476914 Methods to improve the SiGe heterojunction bipolar device performance  
Methods of boosting the performance of bipolar transistor, especially SiGe heterojunction bipolar transistors, is provided together with the structure that is formed by the inventive methods. The...
7473587 High-quality SGOI by oxidation near the alloy melting temperature  
A method of forming a low-defect, substantially relaxed SiGe-on-insulator substrate material is provided. The method includes first forming a Ge-containing layer on a surface of a first single...
7473610 Local collector implant structure for heterojunction bipolar transistors and method of forming the same  
A method of forming a heterojunction bipolar transistor (HBT) device is disclosed. The method includes forming an intrinsic base layer over a collector layer; forming a sacrificial block structure...
7468287 Method of fabricating a heterojunction of organic semiconducting polymers  
Provided is a method of forming a heterojunction of contiguous layers of organic semiconducting polymers. The method comprises firstly forming a layer of a first organic semiconducting polymer on...
7465969 Bipolar transistor and method for fabricating the same  
A bipolar transistor includes a Si single crystalline layer serving as a collector, a single crystalline Si/SiGeC layer and a polycrystalline Si/SiGeC layer which are formed on the Si single...
7459368 Method for manufacturing integrated circuits having silicon-germanium heterobipolar transistors  
Method for manufacturing integrated circuits having silicon-germanium heterobipolar transistors, wherein a collector semiconductor region is created, an etch stop layer is created on a connection...
7456092 Self-releasing spring structures and methods  
According to various exemplary embodiments, a spring device that includes a substrate, a self-releasing layer provided over the substrate and a stressed-metal layer provided over the...
7432539 Imaging method utilizing thyristor-based pixel elements  
An improved imaging array (and corresponding method of operation) includes a plurality of heterojunction thyristor-based pixel elements disposed within resonant cavities formed on a substrate....
7413963 Method of edge bevel rinse  
A method of edge bevel rinse. First, a wafer having a coating material layer disposed thereon is provided. A light beam is optically projected on the wafer to form a reference pattern. The...
7414298 Super self-aligned collector device for mono-and hetero bipolar junction transistors, and method of making same  
The invention relates to a process of forming a compact bipolar junction transistor (BJT) that includes forming a self-aligned collector tap adjacent the emitter stack and an isolation structure....
7396731 Method for preparing a non-self-aligned heterojunction bipolar transistor with a small emitter-to-base spacing  
The present invention refers to a method for preparing a non-self-aligned heterojunction bipolar transistor comprising: preparing a patterned emitter metal on an emitter epi layer of a HBT epi...
7390721 Methods of base formation in a BiCMOS process  
Methods for fabricating a heterojunction bipolar transistor having a raised extrinsic base is provided in which the base resistance is reduced by forming a silicide atop the raised extrinsic base...
7371671 System and method for photolithography in semiconductor manufacturing  
A method for forming a semiconductor device includes forming a photoresist layer over a substrate and patterning the photoresist layer to form photoresist portions. A second layer is formed over...
7368764 Heterojunction bipolar transistor and method to make a heterojunction bipolar transistor  
A heterojunction bipolar transistor and a method of making a heterojunction bipolar transistor. The heterojunction bipolar transistor includes: a regrown emitter region; an intrinsic base region...
7364977 Heterojunction bipolar transistor and method of fabricating the same  
Disclosed are a heterojunction bipolar transistor and a method of fabricating the same. A first dielectric layer easily etched is deposited on the overall surface of a substrate before an...
7323725 Semiconductor device  
The present invention relates to a semiconductor device having a multi-layered structure comprising an emitter layer, a base layer, and a collector layer, each composed of a group III-V n-type...
7317215 SiGe heterojunction bipolar transistor (HBT)  
A heterojunction bipolar transistor is formed in a semiconductor substrate of a first conductivity type including a collector region. A base region is formed on the substrate and an emitter region...
7303968 Semiconductor device and method having multiple subcollectors formed on a common wafer  
A semiconductor device and a method of fabricating a semiconductor device having multiple subcollectors which are formed in a common wafer, in order to provide multiple structures having different...
7300849 Bandgap engineered mono-crystalline silicon cap layers for SiGe HBT performance enhancement  
A method for fabricating a heterojunction bipolar transistor (HBT) is provided. The method includes providing a substrate including a collector region; forming a compound base region over the...
7297992 Method and structure for integration of phosphorous emitter in an NPN device in a BiCMOS process  
According to one exemplary embodiment, a heterojunction bipolar transistor includes a base situated on a substrate. The heterojunction bipolar transistor can be an NPN silicon-germanium...
7297993 Bipolar transistor and fabrication method of the same  
A bipolar transistor having a base electrode of an air bridge structure is simplified in structure and enhanced in the degree of freedom of a contact position of a base wiring line with the base...
7297589 Transistor device and method  
A method for making a heterojunction bipolar transistor includes the following steps: forming a heterojunction bipolar transistor by depositing, on a substrate, subcollector, collector, base, and...
7285457 Heterojunction bipolar transistor and manufacturing method thereof  
In the method for manufacturing a heterojunction bipolar transistor, a collector contact layer, a collector layer, a base layer, a base protection layer, an emitter layer, an emitter contact...
7273789 Method of fabricating heterojunction bipolar transistor  
Provided is a method of fabricating a heterojunction bipolar transistor (HBT). The method includes: sequentially depositing a sub-collector layer, a collector layer, a base layer, an emitter...
7265018 Method to build self-aligned NPN in advanced BiCMOS technology  
The present invention provides a method of forming a self-aligned heterobipolar transistor (HBT) device in a BiCMOS technology. The method includes forming a raised extrinsic base structure by...
7247892 Imaging array utilizing thyristor-based pixel elements  
An improved imaging array (and corresponding method of operation) includes a plurality of heterojunction thyristor-based pixel elements disposed within resonant cavities formed on a substrate....
7229874 Method and apparatus for allowing formation of self-aligned base contacts  
A method and apparatus for depositing self-aligned base contacts where over-etching the emitter sidewall to undercut the emitter contact is not needed. A semiconductor structure has a T-shaped...
7224005 Heterojunction bipolar transistor structure  
A material made by arranging layers of gallium-arsenide-antimonide (GaAsxSb1-x, 0.0≦x≦1.0) and/or indium-gallium-arsenic-nitride (InyGa1-yAszN1-z, 0.0≦y, z≦1.0) in a specific order is used to form...
7208387 Method for manufacturing compound semiconductor wafer and compound semiconductor device  
A method for producing a compound semiconductor wafer used for production of HBT by vapor growth of a sub-collector layer, a collector layer, a base layer and an emitter layer in this turn on a...
7202136 Silicon germanium heterojunction bipolar transistor with carbon incorporation  
A silicon germanium heterojunction bipolar transistor device and method comprises a semiconductor region, and a diffusion region in the semiconductor region, wherein the diffusion region is...
7190047 Transistors and methods for making the same  
Apparatus comprising: a first compound semiconductor composition layer doped to have a first charge carrier polarity; a second compound semiconductor composition layer doped to have a second...
7186624 Bipolar transistor with lattice matched base layer  
A semiconductor material which has a high carbon dopant concentration and is composed of gallium, indium, arsenic and nitrogen is disclosed. The material is useful in forming the base layer of...
7176098 Semiconductor element and method for fabricating the same  
A heterojunction bipolar transistor comprises a collector layer, a base layer formed on the collector layer and an emitter layer formed on the base layer. The emitter layer includes a first...
7176099 Hetero-junction bipolar transistor and manufacturing method thereof  
A hetero-junction bipolar transistor that satisfies high resistance required to avoid a potential breakdown includes: an n-type sub-collector layer 110 that is made of GaAs; an n-type first...
7151035 Semiconductor device and manufacturing method thereof  
A sidewall-insulation film 9 is provided on a side surface of a first opening portion 8a formed in a base extraction electrode 5B of a hetero-junction bipolar transistor, and a portion of the...
7118981 Method of fabricating an integrated silicon-germanium heterobipolar transistor and an integrated silicon-germanium heterobipolar transistor  
In a method of fabricating an integrated silicon-germanium heterobipolar transistor a silicon dioxide layer arranged between a silicon-germanium base layer and a silicon emitter layer is formed by...
7109095 Method for fabricating semiconductor device  
Immediately after a Si/SiGe film containing a contaminant is formed over all surfaces of a substrate by epitaxial growth, a portion of the Si/SiGe film formed to the back surface side of the...
7084040 Method for growth of group III-V semiconductor material on a dielectric  
Formation of a regrowth layer of a Group III–V semiconductor material is facilitated by prior formation of an intermediate layer, selected primarily for its smooth morphology properties. The...
7074686 Method of creating high-quality relaxed SiGe-on-insulator for strained Si CMOS applications  
A method of forming a thin, high-quality relaxed SiGe-on-insulator substrate material is provided which first includes forming a SiGe or pure Ge layer on a surface of a first single crystal Si...
7074685 Method of fabrication SiGe heterojunction bipolar transistor  
A method of fabricating a semiconductor device includes a SiGe(C) heterojunction bipolar transistor using a non-selective epitaxial growth where an insulating layer is formed on a substrate and a...

Matches 101 - 150 out of 368 < 1 2 3 4 5 6 7 8 >