Patents in Class 438/310

Matches 1 - 50 out of 61

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Match	Document	Document Title
1	7573083	Transistor type ferroelectric memory and method of manufacturing the same A transistor type ferroelectric memory including: a substrate; a gate electrode formed above the substrate; a ferroelectric layer formed above the substrate to cover the gate electrode; a source...
2	7569693	Naphthalene-based semiconductor materials and methods of preparing and use thereof Provided are mono- and diimide naphthalene compounds for use in the fabrication of various device structures. In some embodiments, the naphthalene core of these compounds are mono-, di-, or...
3	7498620	Integration of phosphorus emitter in an NPN device in a BiCMOS process According to one exemplary embodiment, a heterojunction bipolar transistor includes a base situated on a substrate. The heterojunction bipolar transistor can be an NPN silicon-germanium...
4	7422951	Method of fabricating self-aligned bipolar transistor The present invention provides a method of fabricating a self-aligned bipolar transistor, by which the fabricating method can be simplified by forming P+ and N+ junctions by self-alignment and by...
5	7297992	Method and structure for integration of phosphorous emitter in an NPN device in a BiCMOS process According to one exemplary embodiment, a heterojunction bipolar transistor includes a base situated on a substrate. The heterojunction bipolar transistor can be an NPN silicon-germanium...
6	7297630	Methods of fabricating via hole and trench A method of fabricating a via and a trench is disclosed. A disclosed method comprises: forming a via hole and a trench in a interlayer dielectric layer on a semiconductor substrate where a...
7	7211482	Method of forming a memory cell having self-aligned contact regions A memory cell of a semiconductor device and a method for forming the same, wherein the memory cell includes a substrate having active regions and field regions, a gate layer formed over the...
8	7169674	Complementary metal oxide semiconductor (CMOS) gate stack with high dielectric constant gate dielectric and integrated diffusion barrier A diffusion barrier (and method for forming the diffusion barrier) for a field-effect transistor having a channel region and a gate electrode, includes an insulating material being disposed over...
9	7169664	Method of reducing wafer contamination by removing under-metal layers at the wafer edge According to the present invention, a metal and a barrier material, such as copper and a tantalum-based barrier material, are effectively removed from the wafer edge and especially from the bevel...
10	7135351	Method for controlling of thermal donor formation in high resistivity CZ silicon The present invention is directed to a single crystal Czochralski-type silicon wafer, and a process for the preparation thereof, which has at least a surface layer of high resistivity, the layer...
11	6958264	Scribe lane for gettering of contaminants on SOI wafers and gettering method A method of manufacturing a semiconductor device on a silicon-on-insulator wafer including a silicon active layer having at least two die pads formed thereon, the at least two die pads separated by...
12	6897084	Control of oxygen precipitate formation in high resistivity CZ silicon The present invention is directed to a single crystal Czochralski-type silicon wafer, and a process for the preparation thereof, which has at least a surface layer of high resistivity, the layer...
13	6838321	SEMICONDUCTOR SUBSTRATE WITH DEFECTS REDUCED OR REMOVED AND METHOD OF MANUFACTURING THE SAME, AND SEMICONDUCTOR DEVICE CAPABLE OF BIDIRECTIONALLY RETAINING BREAKDOWN VOLTAGE AND METHOD OF MANUFACTURING THE SAME An N − -type silicon substrate ( 1 ) has a bottom surface and an upper surface which are opposed to each other. In the bottom surface of the N − -type silicon substrate ( 1 ), a P-type impurity...
14	6815282	Silicon on insulator field effect transistor having shared body contact Silicon on insulator (SOI) field effect transistors (FET) with a shared body contact, a SRAM cell and array including the SOI FETs and the method of forming the SOI FETs. The SRAM cell has a hybrid...
15	6777272	Method of manufacturing an active matrix display A driver circuit integration type (monolithic type) active matrix display device having high performance is formed by using thin film transistors (TFT). While a nickel element is added t an...
16	6703281	Differential laser thermal process with disposable spacers MOSFETs are fabricated with accurately defined, high and uniformly concentrated source/drain regions and extensions employing plural, sequential pre-amorphizing, implanting and laser thermal...
17	6670259	Inert atom implantation method for SOI gettering The present invention relates to a method of manufacturing a silicon-on-insulator substrate, comprising the steps of (1) providing a silicon-on-insulator semiconductor wafer having at least one...
18	6551866	Method of manufacturing a semiconductor memory device A method of manufacturing a semiconductor memory device comprising: a step of forming a storage node in which a conductive layer 7 to be the storage node is formed in the vicinity of single...
19	6433380	Integrated circuit capacitors having composite titanium oxide and tantalum pentoxide dielectric layers therein Methods of forming integrated circuit capacitors (e.g., DRAM capacitors) include the steps of forming a first capacitor electrode (e.g., polysilicon electrode) on a substrate and then forming a...
20	6344384	Method of production of semiconductor device A method of production of a semiconductor device able to be miniaturized by preventing the decline of the h fe at a low current caused by an increase of a surface recombination current of a...
21	6339011	Method of forming semiconductive active area having a proximity gettering region therein and method of processing a monocrystalline silicon substrate to have a proximity gettering region In one implementation, A method of forming semiconductive material active area having a proximity gettering region received therein includes providing a substrate comprising bulk semiconductive...
22	6309938	Deuterated bipolar transistor and method of manufacture thereof A bipolar transistor and a method of manufacturing the transistor. The transistor includes: (1) a substrate having a base region, an emitter region and a base-emitter junction between said base and...
23	6165867	Method to reduce aspect ratio of DRAM peripheral contact The present invention provides a method for reducing aspect ratio of DRAM peripheral contact so as to achieving a good contact etching and metal deposition by utilizing conventional equipment....
24	6090645	Fabrication method of semiconductor device with gettering treatment A fabrication method of a semiconductor device capable of effective gettering treatment even when electronic elements are further miniaturized and further integrated and a semiconductor substrate...
25	6051474	Negative biasing of isolation trench fill to attract mobile positive ions away from bipolar device regions The tendency of mobile positive ions to be transported into device regions of a bipolar transistor is effectively minimized by surrounding the transistor with a `positive ion`-attracting electric...
26	5976956	Method of controlling dopant concentrations using transient-enhanced diffusion prior to gate formation in a device Dopant atoms have coefficients of diffusion that vary due to implant damage. Damaged regions are selected and created by implanting silicon atoms into a silicon substrate prior to formation of a...
27	5895236	Semiconductor device fabricating method having a gettering step A device isolation region and a gate oxide film are formed on a front surface of a silicon substrate, with a gate electrode formed on the gate oxide film. Next, an interlayer insulator film is...
28	5892292	Getterer for multi-layer wafers and method for making same A getterer structure for dielectrically isolated wafer structures such as bonded wafers. The getterer is a layer of polysilicon along the sidewalls of semiconductor regions isolated from each other...
29	5753563	Method of removing particles by adhesive The removal of particulate contaminants, such as dust particles, from the surface of a semiconductor wafer is achieved by pressing a soft adhesive layer against the wafer surface, leaving it in...
30	5376562	Method for forming vertical transistor structures having bipolar and MOS devices A transistor is formed as either a bipolar transistor (10) or an MOS transistor (11). Each transistor (10 or 11) has a substrate (12). Bipolar transistor (10) has a first current electrode (26)...
31	5137839	Method of manufacturing a bipolar transistor having polysilicon layer which serves as an emitter electrode and passivating dangling bonds In a bipolar transistor, a polysilicon layer formed on an emitter diffusion layer is used as an emitter electrode. After the polysilicon layer is formed, an atom is introduced into the polysilicon...
32	5102810	Method for controlling the switching speed of bipolar power devices The switching speed of bipolar power rectifiers is increased by formation of misfit dislocations in the depletion region, spaced from the substrate/epitaxial layer interface, in order to reduce...
33	5098852	Method of manufacturing a semiconductor device by mega-electron volt ion implantation A method of manufacturing a semiconductor device includes forming desired semiconductor elements in a major surface region of a semiconductor substrate, and ion-implanting a selected element into...
34	4796073	Front-surface N+ gettering techniques for reducing noise in integrated circuits Large "inactive" N+ regions are provided in P channel junction field effect transistors (JFETs) or NPN transistors immediately adjacent to "active" areas thereof to getter impurities away from the...
35	4771009	Process for manufacturing semiconductor devices by implantation and diffusion A process for manufacturing semiconductor devices according to the present invention comprises a step for thermally oxidizing semiconductor substrates (1), (12), to form first and second oxide...
36	4766086	Method of gettering a semiconductor device and forming an isolation region therein In a method of manufacturing a semiconductor device according to the present invention, a given position of a thermal oxide film formed on a monocrystalline silicon layer is opened to expose a...
37	4732874	Removing metal precipitates from semiconductor devices Rapid thermal annealing, involving rapid heating to a temperature of between 550 degrees C. and 750 degree C. for between 30 and 90 seconds and rapid cooling, is used to dissolve the precipitates...
38	4717680	Fabrication of vertical NPN and PNP bipolar transistors in monolithic substrate Vertical PNP and the NPN transistors, each having a gain-bandwidth product greater than 1 GHz are formed in dielectrically isolated regions in polysilicon substrate. The substrate may include...
39	4597804	Methods of forming denuded zone in wafer by intrinsic gettering and forming bipolar transistor therein A variety of methods are applicable to production of semiconductor devices in which the active layer is produced in a denuded zone which is thin and free of defects. This denuded zone in...
40	4575922	Method of fabricating integrated circuits incorporating steps to detect presence of gettering sites A method of fabricating integrated circuits on a semiconductor substrate includes the steps of directing electromagnetic radiation onto the semiconductor substrate at a small angular offset from...
41	4505759	Method for making a conductive silicon substrate by heat treatment of oxygenated and lightly doped silicon single crystals A method for the heat treatment of oxygenated and lightly doped silicon single crystals provides a conductive silicon substrate which draws off stray currents from adjacent n-channel and p-channel...
42	4498227	Wafer fabrication by implanting through protective layer Manufacture of bipolar substantially isoplanar integrated circuit structures is accomplished by rearrangement of the conventional masking steps and by the substitution and full integration of...
43	4371403	Method of providing gettering sites through electrode windows A method of fabricating semiconductor integrated circuit devices in which leakage currents at the junction and at the surface of one or more regions of desired conductivity type formed in a...
44	4315782	Method of making semiconductor device with passivated rectifying junctions having hydrogenated amorphous regions A device and method for forming the device formed of semiconductor material provides metallization for the circuit and passivation of a rectifying junction in but a single photolithographic etching...
45	4279671	Method for manufacturing a semiconductor device utilizing dopant predeposition and polycrystalline deposition A method for manufacturing a npn-type transistor includes steps of depositing phosphorus on a base region, covering the deposited phosphorus with a polycrystalline silicon layer and heating the...
46	4272882	Method of laying out an integrated circuit with specific alignment of the collector contact with the emitter region The method entails laying out NPN transistors in a bipolar integrated circuit in a manner which prevents crystal dislocations from making the transistor unreliable. The long edges of the collector...
47	4069068	Semiconductor fabrication method for improved device yield by minimizing pipes between common conductivity type regions A method for fabricating bipolar semiconductor devices of large scale integration in which the formation of pipes, which result in shorts or leakages between two conductivity types of the...
48	4007297	Method of treating semiconductor device to improve its electrical characteristics Certain electrical characteristics of a semiconductor device which includes a body of semiconductor material are improved by exposing the semiconductor device to a substantially water vapor free...
49	3999282	Method for manufacturing semiconductor devices having oxide films and the semiconductor devices manufactured thereby A silicon crystal body having a major surface lying parallel to a {110} or {100} crystal plane is prepared. A silicon oxide film is formed on the major surface by heating the body in an atmosphere...
50	3915755	Method for doping an insulating layer Method for doping a first insulating layer, such as a silicon dioxide layer, located on a semiconductor body which comprises covering the exposed surfaces of the first insulating layer with a...

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