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8158451 |
Method for manufacturing a junction
The present invention relates to a semiconductor device comprising a homojunction or a heterojunction with a controlled dopant (concentration) profile and a method of making the same. Accordingly,...
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8143910 |
Semiconductor integrated circuit and method of testing the same
Provided is a semiconductor integrated circuit including: a first path that includes a first logic circuit; a second path that includes a second logic circuit; and a subsequent-stage circuit that...
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8133765 |
Integrated RF ESD protection for high frequency circuits
The invention relates to a high-frequency integrated circuit requiring ESD protection for a circuit node. One or more metallic layer is deposited within the integrated circuit and patterned to form...
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8133791 |
Method of manufacturing a bipolar transistor and bipolar transistor obtained therewith
The invention relates to a method according to the part of the surface of the semiconductor body adjoining the opening and which is to be kept free is provided with a cover layer after which the...
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8129248 |
Method of producing bipolar transistor structures in a semiconductor process
In the method of producing bipolar transistor structures in a semiconductor process, an advanced epitaxial trisilane process can be used without the risk of poly stringers being formed. A base...
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8119475 |
Method of forming gate of semiconductor device
A method of forming a gate of a semiconductor device comprising providing a semiconductor substrate over which a gate insulating layer, a first conductive layer, a dielectric layer, and a second...
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8110472 |
High power and high temperature semiconductor power devices protected by non-uniform ballasted sources
A semiconductor power device is formed on a semiconductor substrate. The semiconductor power device includes a plurality of transistor cells distributed over different areas having varying amount...
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8093131 |
Lateral insulated gate bipolar transistor having a retrograde doping profile in base region and method of manufacture thereof
In a semiconductor device of the present invention, a first base region 16 is extended to a part under a gate electrode 7 while having a vertical concentration profile of an impurity that increases...
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8067290 |
Bipolar transistor with base-collector-isolation without dielectric
The disclosed invention provides a method for the fabrication of a bipolar transistor having a collector region comprised within a semiconductor body separated from an overlying base region by one...
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8058121 |
Method for fabricating semiconductor device, method for fabricating bipolar-CMOS-DMOS
A semiconductor device fabricating method is described. The semiconductor device fabricating method comprises forming an epitaxial layer on a substrate, wherein the epitaxial layer is the same...
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8058124 |
Method of manufacturing a semiconductor device
The semiconductor device, which provides reduced electric current leakage and parasitic resistance to achieve stable current gain, is provided. A first polycrystalline semiconductor layer is grown...
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8053843 |
Integrated electrostatic discharge (ESD) device
A semiconductor device for ESD protection includes a semiconductor substrate of a first conductivity type and a well region of a second conductivity type formed within the substrate. The well...
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8043910 |
Integrated semiconductor structure including a heterojunction bipolar transistor and a Schottky diode
An integrated semiconductor structure includes a heterojunction bipolar transistor and a Schottky diode. The structure has a substrate, the heterojunction bipolar transistor overlying and...
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8035196 |
Methods of counter-doping collector regions in bipolar transistors
The present invention provides a method of forming a bipolar transistor. The method includes doping a silicon layer with a first type of dopant and performing a first implant process to implant...
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8030167 |
Varied impurity profile region formation for varying breakdown voltage of devices
Methods are disclosed for forming a varied impurity profile for a collector using scattered ions while simultaneously forming a subcollector. In one embodiment, the invention includes: providing a...
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8026146 |
Method of manufacturing a bipolar transistor
The invention provides for an alternative and less complex method of manufacturing a bipolar transistor comprising a field plate (17) in a trench (7) adjacent to a collector region (21), which...
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8021951 |
Formation of longitudinal bipolar transistor with base region in trenches having emitter and collector regions disposed along portions of side surfaces of base region
Provided is a semiconductor device including: a silicon substrate; at least two trenches spaced apart from each other, being in parallel with each other, and being formed by vertically etching the...
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8003475 |
Method for fabricating a transistor structure
A method for fabricating a transistor structure with a first and a second bipolar transistor having different collector widths is presented. The method includes providing a semiconductor substrate,...
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8003473 |
Bipolar transistor with silicided sub-collector
Embodiments of the invention provide a method of fabricating a semiconductor device. The method includes defining a sub-collector region in a layer of doped semiconductor material; forming an...
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7989301 |
Semiconductor device with bipolar transistor and method of fabricating the same
Disclosed is a semiconductor device with a bipolar transistor and method of fabricating the same. The device may include a collector region in a semiconductor substrate. A base pattern may be...
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7981753 |
Method and device for electrostatic discharge protection
A device for providing electrostatic discharge (ESD) protection is provided. The device includes a semiconductor substrate having a drain, a source, and a gate formed therein. The drain contains a...
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7951681 |
Substrate-triggered bipolar junction transistor and ESD protection circuit
An ESD protection circuit using a novel substrate-triggered lateral bipolar junction transistor (STLBJT) for providing a discharging path between power rails. The ESD protection circuit comprises...
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7939414 |
Ion implantation and process sequence to form smaller base pick-up
Methods for forming a bipolar junction transistor device are described herein. A method for forming the bipolar junction transistor device may include doping a first portion of a substrate with a...
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7932155 |
Structure and method for performance improvement in vertical bipolar transistors
A method of forming a semiconductor device having two different strains therein is provided. The method includes forming a strain in a first region with a first straining film, and forming a second...
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7927955 |
Adjustable bipolar transistors formed using a CMOS process
By providing a novel bipolar device design implementation, a standard CMOS process (105-109) can be used unchanged to fabricate useful bipolar transistors (80) and other bipolar devices having...
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7915709 |
Semiconductor device and method of manufacturing the same
The invention relates to a semiconductor device (10) with a semiconductor body (12) comprising a bipolar transistor with an emitter region, a base region and a collector region (1, 2, 3) of,...
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7910448 |
Method for fabricating a mono-crystalline emitter
Fabrication of a mono-crystalline emitter using a combination of selective and differential growth modes. The steps include providing a trench (14) formed on a silicon substrate (16) having opposed...
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7910447 |
System and method for providing a self aligned bipolar transistor using a simplified sacrificial nitride emitter
A system and method are disclosed for providing a self aligned bipolar transistor using a simplified sacrificial nitride emitter. An active region of a transistor is formed and a silicon nitride...
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7897452 |
Method of producing a semiconductor device with an aluminum or aluminum alloy rear electrode
A method of producing a semiconductor device having a thickness of 90 μm to 200 μm and with an electrode on the rear surface, which achieves a high proportion of non-defective devices by o...
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7898061 |
Structure for performance improvement in vertical bipolar transistors
A method of forming a semiconductor device having two different strains therein is provided. The method includes forming a strain in a first region with a first straining film, and forming a second...
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7888199 |
PNP light emitting transistor and method
A semiconductor light-emitting transistor device, including: a bipolar pnp transistor structure having a p-type collector, an n-type base, and a p-type emitter; a first tunnel junction coupled with...
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7875915 |
Integrated circuit comprising a photodiode of the floating substrate type and corresponding fabrication process
An integrated circuit includes at least one photodiode associated with a read transistor. The photodiode is formed from a stack of three semiconductor layers comprising a buried layer, an floating...
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7871893 |
Method for non-selective shallow trench isolation reactive ion etch for patterning hybrid-oriented devices compatible with high-performance highly-integrated logic devices
Disclosed are embodiments of a hybrid-orientation technology (HOT) wafer and a method of forming the HOT wafer with improved shallow trench isolation (STI) structures for patterning devices in both...
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7871847 |
System and method for high temperature compact thermoelectric generator (TEG) device construction
A method for creating an array of thermoelectric elements includes applying a first coating of dielectric material to P-type wafers and N-type wafers to form coated P-type wafers and coated N-type...
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7872326 |
Array of vertical bipolar junction transistors, in particular selectors in a phase change memory device
A process for manufacturing an array of bipolar transistors, wherein deep field insulation regions of dielectric material are formed in a semiconductor body, thereby defining a plurality of active...
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7871882 |
Method of fabricating a deep trench insulated gate bipolar transistor
In one embodiment, a method comprises forming an epitaxial layer over a substrate of an opposite conductivity type, the epitaxial layer being separated by a buffer layer having a doping...
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7868335 |
Modulation doped super-lattice sub-collector for high-performance HBTs and BJTs
A bipolar junction transistor having an emitter, a base, and a collector includes a stack of one or more layer sets adjacent the collector. Each layer set includes a first material having a first...
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7863148 |
Method for integrating SiGe NPN and vertical PNP devices
According to one exemplary embodiment, a method for forming an NPN and a vertical PNP device on a substrate comprises forming an insulating layer over an NPN region and a PNP region of the...
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7855094 |
Photo-detector for detecting image signal of infrared laser radar and method of manufacturing the same
A photo-detector, in which metal wiring for connecting electrodes is arranged on a planarized surface and thus the metal wiring arrangement is simplified, and a method of manufacturing the same are...
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7846805 |
Self-aligned vertical PNP transistor for high performance SiGe CBiCMOS process
A structure and a process for a self-aligned vertical PNP transistor for high performance SiGe CBiCMOS process. Embodiments include SiGe CBiCMOS with high-performance SiGe NPN transistors and PNP...
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7816221 |
Dielectric ledge for high frequency devices
High frequency performance of (e.g., silicon) bipolar devices (40, 100, 100″) is improved by reducing the capacitive coupling (Cbc) between the extrinsic base contact (46) and the collector (44, 4...
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7811894 |
Bipolar junction transistor and manufacturing method thereof
An improved bipolar junction transistor and a method for manufacturing the same are provided. The bipolar junction transistor includes: a buried layer and a high concentration N-type collector...
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7807539 |
Ion implantation and process sequence to form smaller base pick-up
Methods for forming a bipolar junction transistor device are described herein. A method for forming the bipolar junction transistor device may include doping a first portion of a substrate with a...
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7803676 |
Semiconductor device and method of fabricating the same
Provided are a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device using a DMOS device includes: a semiconductor substrate, in which a first...
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7800143 |
Dynamic random access memory with an amplified capacitor
A memory cell and methods of making and operating the same are provided. In one aspect, a method of forming a memory cell is provided that includes forming a MOS transistor that has a gate, a...
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7795102 |
ESD high frequency diodes
In a SiGe BJT process, a diode is formed by defining a p-n junction between the BJT collector and BJT internal base, blocking the external gate regions of the BJT and doping the emitter poly of the...
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7795103 |
Bipolar transistors with depleted emitter
This invention disclosed a novel method of fully depleted emitter so that the built-in potential between emitter and the base becomes lower and the charge storage between the emitter and base...
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7790519 |
Semiconductor device and manufacturing method thereof
A semiconductor device has a MOS gate side surface structure, including a gate electrode filling a trench formed in a semiconductor substrate with an insulator film between the trench and the gate...
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7785974 |
Methods of employing a thin oxide mask for high dose implants
A method for forming a bipolar transistor device includes providing a semiconductor substrate. An oxide layer is formed on the semiconductor substrate. The oxide layer is patterned to form an...
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RE41477 |
Semiconductor device with a reduced mask count buried layer
An N type buried layer is formed, in one embodiment, by a non selective implant on the surface of a wafer and later diffusion. Subsequently, the wafer is masked and a selective P type buried layer...
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