Matches 1 - 50 out of 418 1 2 3 4 5 6 7 8 9 >
Match Document Document Title
7622357 Semiconductor device structures with backside contacts for improved heat dissipation and reduced parasitic resistance  
The present invention relates to a device structure that comprises a substrate with front and back surfaces, and at least one semiconductor device with a first conductive structure located in the...
7618871 Method for the production of a bipolar transistor comprising an improved base terminal  
For the production of an improved bipolar transistor comprising a low-resistance base terminal, a dielectric layer is deposited over the semiconductor substrate and is highly doped via an...
7615455 Integrated circuit bipolar transistor  
A bipolar transistor having a base region resting by its lower surface on a collector region and surrounded with a first insulating layer, a base contact conductive region in contact with an...
7611953 Bipolar transistor with isolation and direct contacts  
A bipolar transistor has a collector that is contacted directly beneath a base-collector junction by metallization to reduce collector resistance. A conventional reach-through and buried layer, as...
7605046 Active matrix structure for a display device and method for its manufacture  
The invention relates to an active matrix structure and method for manufacturing the active matrix structure for a display device, wherein the structure includes: providing a matrix substrate with...
7598148 Non-self-aligned heterojunction bipolar transistor and a method for preparing a non-self-aligned heterojunction bipolar transistor  
The present invention refers to a method for preparing a non-self-aligned heterojunction bipolar transistor comprising: preparing a patterned emitter metal on an emitter epi layer of a HBT epi...
7595249 Bipolar transistors with vertical structures  
A method for fabricating a bipolar transistor includes forming a vertical sequence of semiconductor layers, forming an implant mask on the last formed semiconductor layer, and implanting dopant...
7579230 High voltage BICMOS device and method for manufacturing the same  
A high voltage BICMOS device and a method for manufacturing the same, which may improve the reliability of the device by securing a distance between adjacent DUF regions, are provided. The high...
7564117 Bipolar transistor having variable value emitter ballast resistors  
Methods of forming and structures of a relatively large bipolar transistor is provided. The method includes forming a collector in a semiconductor region. Forming a base contiguous with a portion...
7563685 Bipolar-transistor and method for the production of a bipolar-transistor  
The invention relates to NPN and PNP bipolar transistors and to a method for the production thereof, said transistors being characterised by a particularly high collector-emitter and collector-base...
7550790 D/A conversion circuit and semiconductor device  
A D/A conversion circuit with a small area is provided. In the D/A conversion circuit, according to a digital signal transmitted from address lines of an address decoder, one of four gradation...
7544572 Multi-operational mode transistor with multiple-channel device structure  
A multiple operating mode transistor is provided in which multiple channels having different respective operational characteristics are employed. Multiple channels have threshold voltages that are...
7541248 Integrated semiconductor device and method of manufacturing thereof  
An integrated semiconductor device containing semiconductor elements that have respective desired on-resistances and breakdown voltages achieves appropriate characteristics as a whole of the...
7538395 Method of forming low capacitance ESD device and structure therefor  
In one embodiment, the ESD device uses highly doped P and N regions deep within the ESD device to form a zener diode that has a controlled breakdown voltage.
7521328 Methods of fabricating bipolar transistor with emitter and collector in separate device isolation trenches  
A bipolar transistor and method of fabricating the same is disclosed. Particularly, a bipolar transistor may have an emitter and a collector diffusion layer in the sidewalls and the bottom of a...
7521327 High fT and fmax bipolar transistor and method of making same  
A high f T and f max bipolar transistor includes an emitter, a base, and a collector. The emitter has a lower portion and an upper portion that extends beyond the lower portion. The base includes...
7517768 Method for fabricating a heterojunction bipolar transistor  
A bipolar transistor with a SiGe:C film and a seed layer forming beneath the SiGe:C film and methods of making same. The method includes placing a substrate in a reactor chamber and introducing a...
7494887 Method and apparatus for fabricating heterojunction bipolar transistors with simultaneous low base resistance and short base transit time  
A method for fabricating heterojunction bipolar transistors that exhibit simultaneous low base resistance and short base transit times, which translate into semiconductor devices with low power...
7492011 Semiconductor device and manufacturing method of semiconductor device  
To present a semiconductor device mounting ESD protective device appropriately applicable to transistors mutually different in dielectric strength, and its manufacturing method. The semiconductor...
7488662 Self-aligned vertical PNP transistor for high performance SiGe CBiCMOS process  
A structure and a process for a self-aligned vertical PNP transistor for high performance SiGe CBiCMOS process. Embodiments include SiGe CBiCMOS with high-performance SiGe NPN transistors and PNP...
7485537 Method of fabricating a vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thickness  
The present invention provides a a method of fabricating bipolar junction transistors (BJTs) on selected areas of a very thin buried oxide (BOX) using a conventional silicon-on-insulator (SOI)...
7485486 Photodiode for multiple wavelength operation  
A method of a fabricating a multiple wavelength adapted photodiode and resulting photodiode includes the steps of providing a substrate having a first semiconductor type surface region on at least...
7473610 Local collector implant structure for heterojunction bipolar transistors and method of forming the same  
A method of forming a heterojunction bipolar transistor (HBT) device is disclosed. The method includes forming an intrinsic base layer over a collector layer; forming a sacrificial block structure...
7473609 Surface treatment in preparation for contact placement  
A contact is formed on indium-phosphide material. Regions of the indium-phosphide material are exposed. An energetic bombardment is performed on exposed regions of the indium-phosphide material....
7470594 System and method for controlling the formation of an interfacial oxide layer in a polysilicon emitter transistor  
A method is disclosed for controlling the formation of an interfacial oxide layer in a polysilicon emitter transistor device. The interfacial oxide layer is formed between an underlying substrate...
7470558 Method for manufacturing solid-state imaging device, and solid-state imaging device  
A method for manufacturing a solid-state imaging device, comprising: a step of forming an imaging portion comprising a photoelectric conversion portion and a charge transfer portion that transfers...
7462546 Collector tailored structures for integration of binary junction transistors  
A bipolar transistor is formed in an integrated BiCMOS process. A buried layer is formed in a semiconductor body. An intrinsic dilute mask is formed over the buried layer that covers at least a...
7459368 Method for manufacturing integrated circuits having silicon-germanium heterobipolar transistors  
Method for manufacturing integrated circuits having silicon-germanium heterobipolar transistors, wherein a collector semiconductor region is created, an etch stop layer is created on a connection...
7459367 Method of forming a vertical P-N junction device  
A P-N junction device and method of forming the same are disclosed. The P-N junction device may include a P-N diode, a PiN diode or a thyristor. The P-N junction device may have a monocrystalline...
7456070 Method of fabricating a bipolar transistor with high breakdown voltage collector  
A method of fabricating a transistor that includes a doped buried region within a semiconductor body. The doped buried region includes a portion having a first thickness and a second thickness, the...
7449388 Method for forming multiple doping level bipolar junctions transistors  
A process for forming bipolar junction transistors having a plurality of different collector doping densities on a semiconductor substrate and an integrated circuit comprising bipolar junction...
7446009 Manufacturing method for semiconductor device  
A semiconductor device manufacturing method including forming a conductive layer and a silicon film on a semiconductor substrate including an active region, forming an emitter electrode containing...
7442617 Method for manufacturing bipolar transistor  
A method for manufacturing a bipolar transistor comprising: forming a device isolation layer in a device isolation region of a semiconductor substrate having therein first and second well regions...
7442616 Method of manufacturing a bipolar transistor and bipolar transistor thereof  
A bipolar transistor ( 100 ) is manufactured using the following processes: (a) forming a base electrode layer ( 129 ) as a portion of a base electrode over a semiconductor substrate ( 110 ); (b)...
7439608 Symmetric bipolar junction transistor design for deep sub-micron fabrication processes  
Described herein are embodiments of a bipolar junction transistor including a plurality of base terminal rings having an emitter terminal ring between any two base terminal rings of the plurality...
7432169 Method for manufacturing semiconductor device  
An excessive etch in the conventional manufacturing process causes a roughened surface of a contact bottom, resulting in an increased variation in characteristics of semiconductor devices. A...
7422952 Method of forming a BJT with ESD self protection  
A ballasting region is placed between the base region and the collector contact of a bipolar junction transistor to relocate a hot spot away from the collector contact of the transistor. Relocating...
7422951 Method of fabricating self-aligned bipolar transistor  
The present invention provides a method of fabricating a self-aligned bipolar transistor, by which the fabricating method can be simplified by forming P+ and N+ junctions by self-alignment and by...
7414298 Super self-aligned collector device for mono-and hetero bipolar junction transistors, and method of making same  
The invention relates to a process of forming a compact bipolar junction transistor (BJT) that includes forming a self-aligned collector tap adjacent the emitter stack and an isolation structure. A...
7387918 Method of forming a silicon controlled rectifier structure with improved punch through resistance  
When a high-voltage, such as from an ESD pulse, is placed across a silicon controlled rectifier, which includes an NPN transistor and a PNP transistor that is connected to the NPN transistor, the...
7371650 Method for producing a transistor structure  
A method for fabricating a transistor structure with a first and a second bipolar transistor having different collector widths is presented. The method includes providing a semiconductor substrate,...
7354840 Method for opto-electronic integration on a SOI substrate  
According to an exemplary embodiment, a method includes providing a silicon-on-insulator substrate including a buried oxide layer situated over a bulk silicon substrate and a silicon layer situated...
7341920 Method for forming a bipolar transistor device with self-aligned raised extrinsic base  
Disclosed are embodiments of a method of fabricating a bipolar transistor with a self-aligned raised extrinsic base. In the method a dielectric pad is formed on a substrate with a minimum dimension...
7329620 System and method for providing an integrated circuit having increased radiation hardness and reliability  
A system and method is disclosed for providing an integrated circuit that has increased radiation hardness and reliability. A device active area of an integrated circuit is provided and a layer of...
7323390 Semiconductor device and method for production thereof  
The semiconductor device according to the invention includes a substrate, a field insulating region which delimits an active region of the semiconductor substrate, a collector, at least one...
7319251 Bipolar transistor  
A bipolar transistor formed in a substrate includes a collector, a base layer above the collector, where the base layer includes a base that is monocrystalline, and an emitter layer that is...
7314791 Bipolar transistor for an integrated circuit having variable value emitter ballast resistors  
An integrated circuit including a bipolar transistor with improved forward second breakdown is disclosed. In one embodiment, the bipolar transistor includes a base, a collector, a plurality of...
7303968 Semiconductor device and method having multiple subcollectors formed on a common wafer  
A semiconductor device and a method of fabricating a semiconductor device having multiple subcollectors which are formed in a common wafer, in order to provide multiple structures having different...
7301203 Superjunction semiconductor device  
In accordance with an embodiment of the invention, a superjunction semiconductor device includes an active region and a termination region surrounding the active region. A central vertical axis of...
7297993 Bipolar transistor and fabrication method of the same  
A bipolar transistor having a base electrode of an air bridge structure is simplified in structure and enhanced in the degree of freedom of a contact position of a base wiring line with the base...
Matches 1 - 50 out of 418 1 2 3 4 5 6 7 8 9 >