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6913981 Method of fabricating a bipolar transistor using selective epitaxially grown SiGe base layer  
Embodiments of a bipolar transistor are disclosed, along with methods for making the transistor. An exemplary transistor includes a collector region in a semiconductor substrate, a base layer...
6911715 Bipolar transistors and methods of manufacturing the same  
A bipolar transistor in which the occurrence of Kirk effect is suppressed when a high current is injected into the bipolar transistor and a method of fabricating the bipolar transistor are...
6911368 Arrangement for preventing short-circuiting in a bipolar double-poly transistor and a method of fabricating such an arrangement  
In a bipolar double-poly transistor comprising a layer of base silicon (1′) on a silicon substrate (2′), a first layer of silicon dioxide (3′) on the base silicon layer (1′), an emitter window...
6905934 Semiconductor device and a method of manufacturing the same  
The invention provides a bipolar transistor with improved performance. An insulation film comprising a silicon oxide film is formed by means of oxidation treatment on the side surface of an...
6893932 Heterojunction bipolar transistor containing at least one silicon carbide layer  
A bipolar transistor includes a collector that is selected from the group SiC and SiC polytypes (4H, 6H, 15R, 3C . . . ), a base that is selected from the group Si, Ge and SiGe, at least a first...
6890826 Method of making bipolar transistor with integrated base contact and field plate  
A method of manufacturing a bipolar junction transistor results in an integrated polysilicon base contact and field plate element minimally spaced from a polysilicon emitter contact by using a...
6890794 Flip chip with novel power and ground arrangement  
A method of forming a flip chip device comprises providing a semiconductor die having a core area and a periphery area. The periphery area includes an electrostatic discharge (ESD) structure. The...
6888226 Semiconductor structure and method for improving its ability to withstand electrostatic discharge (ESD) and overloads  
A semiconductor structure includes a base layer of a first conductivity type, a first layer of the first conductivity type arranged on the base layer and having a dopant concentration that is...
6884651 Producing method of CMOS image sensor  
A CMOS image sensor is made such that an oxide film, a nitride film, an oxide film, and a nitride film constituting an antireflection film are stacked over the surface of a photodiode, and the...
6878976 Carbon-modulated breakdown voltage SiGe transistor for low voltage trigger ESD applications  
Selectively implanting carbon in a transistor lowers the collector-to-emitter breakdown (BVCEO) of the transistor. This transistor, with the lowered BVCEO, is then used as a “trigger” device in an...
6873029 Self-aligned bipolar transistor  
A heterojunction bipolar transistor with self-aligned features having a self-aligned dielectric sidewall spacer disposed between base contact and emitter contact, and self-aligned base mesa...
6870184 Mechanically-stable BJT with reduced base-collector capacitance  
A bipolar junction transistor (BJT) requires the fabrication of a BJT structure and of a support post which is adjacent to, but physically and electrically isolated from, the BJT structure. The...
6869852 Self-aligned raised extrinsic base bipolar transistor structure and method  
A method of fabricating a bipolar transistor structure that provides unit current gain frequency (fT) and maximum oscillation frequency (fMAX) improvements of a raised extrinsic base using...
6861323 Method for forming a SiGe heterojunction bipolar transistor having reduced base resistance  
A method for forming a heterojunction bipolar transistor includes forming an epitaxial layer, forming a first polysilicon layer, and forming a dielectric layer on the first polysilicon layer. The...
6858510 Low-voltage punch-through bi-directional transient-voltage suppression devices having surface breakdown protection and methods of making the same  
A method of making a bi-directional transient voltage suppression device is provided, which comprises: (a) providing a p-type semiconductor substrate; (b) epitaxially depositing a lower...
6858485 Method for creation of a very narrow emitter feature  
A double-polysilicon, self-aligned bipolar transistor has a collector region formed in a doped semiconductor substrate, an intrinsic counterdoped base formed on the surface of the substrate and a...
6858532 Low defect pre-emitter and pre-base oxide etch for bipolar transistors and related tooling  
An oxide etch process is described which may be used for emitter and base preparation in bipolar SiGe devices. The low temperature process employed produces electrical insulation between the...
6855609 Method of manufacturing ESD protection structure  
A transistor structure is manufactured for ESD protection in an integrated circuit device. A semiconductor substrate has source and drain diffusion regions and respective source and drain wells...
6855611 Fabrication method of an electrostatic discharge protection circuit with a low resistant current path  
A fabrication method of an electrostatic discharge protection circuit is described, in which a buried layer is formed in the substrate of the electrostatic discharge protection circuit, and a...
6855612 Method for fabricating a bipolar transistor  
A method for producing bipolar transistors with the aid of selective epitaxy for producing a collector and base. The method includes widening the area of the base either by the isotropic etching...
6847061 Elimination of implant damage during manufacture of HBT  
During the conventional manufacture of HBTs, implant damage occurs which leads to enhanced internal base diffusion. This problem has been overcome by making the base and base contact area from a...
6841810 Cell structure for bipolar integrated circuits and method  
In one embodiment, a bipolar cell (31) includes a cell boundary (32) that defines a cell active area (33), a first array of bipolar transistors (41) is formed within the cell active area (33) and...
6833606 Fabrication of a heterojunction bipolar transistor with integrated MIM capacitor  
In the present invention, a semiconductor device is formed which includes an MIM capacitor located on the upper surface of a heterostructure from which the emitter, base and collector sections of...
6830981 Vertical nanotube transistor and process for fabricating the same  
A vertical nanotube transistor and a process for fabricating the same. First, a source layer and a catalyst layer are successively formed on a substrate. A dielectric layer is formed on the...
6818520 Method for controlling critical dimension in an HBT emitter  
According to one exemplary embodiment, a heterojunction bipolar transistor comprises a base. The heterojunction bipolar transistor further comprises a first nitride spacer and a second nitride...
6815301 Method for fabricating bipolar transistor  
A method for fabricating a bipolar transistor includes: a first step of implanting, along the normal direction of the principle surface of a first-conductive-type semiconductor single crystalline...
6815765 Semiconductor device with function of modulating gain coefficient and semiconductor integrated circuit including the same  
A semiconductor device has a structure in which an impurity diffusion region with an impurity concentration lower than an impurity concentration of a source and a drain is formed between the...
6806159 Method for manufacturing a semiconductor device with sinker contact region  
A method for manufacturing a semiconductor device includes forming a buried layer of a semiconductor substrate. An active region is formed adjacent at least a portion of the buried layer. A first...
6806158 Mixed crystal layer growing method and device, and semiconductor device  
When a silicon-germanium mixed crystal layer is grown on a substrate by introducing a silicon source gas, a germanium source gas, a boron source gas, and a carbon source gas into a reaction...
6806160 Method for forming a lateral SCR device for on-chip ESD protection in shallow-trench-isolation CMOS process  
A method for forming a lateral SCR device for on-chip ESD protection in shallow-trench-isolation CMOS process is provided. In the present lateral SCR device, the shallow trench isolation among the...
6806152 Retrograde doped buried layer transistor and method for producing the same  
An active transistor area with a retrograde doping area on a substrate in bipolar technology is produced by a method including the following steps: providing a substrate; producing a buried doping...
6803634 Stabilization in device characteristics of a bipolar transistor that is included in a semiconductor device with a CMOSFET  
In the manufacturing process of a Bi-CMOS semiconductor device, which includes a CMOSFET and a bipolar transistor, the steps for forming a well region, source regions, and drain regions of the...
6803259 Silicon controlled rectifier for sige process, manufacturing method thereof and integrated circuit including the same  
A silicon controlled rectifier for SiGe process. The silicon controlled rectifier comprises a substrate, a buried layer of a first conductivity type in the substrate, a well of the first...
6797578 Method for fabrication of emitter of a transistor and related structure  
A disclosed embodiment is a method for fabricating an emitter structure, comprising a step of conformally depositing an undoped polysilicon layer in an emitter window opening and over a base....
6797577 One mask PNP (or NPN) transistor allowing high performance  
A method is disclosed for the improvement of BiCMOS or CMOS manufactured device performance, specifically bipolar junction transistor performance, in a cost effective manner. The method provides...
6797995 Heterojunction bipolar transistor with InGaAs contact and etch stop layer for InP sub-collector  
A thin InGaAs contact layer is provided for the collector of a heterojunction bipolar transistor (HBT) above an InP sub-collector. The contact layer provides a low resistance contact mechanism and...
6797580 Method for fabricating a bipolar transistor in a BiCMOS process and related structure  
According to one exemplary embodiment, a method for fabricating a bipolar transistor in a BiCMOS process comprises a step of forming an emitter window stack by sequentially depositing a base oxide...
6791126 Heterojunction bipolar transistor with zero conduction band discontinuity  
A bipolar heterojunction transistor (HBT) includes a collector layer, a base layer formed on the collector layer, a first transition layer formed on the base layer, an emitter layer formed on the...
6787427 Method to fabricate SiGe HBTs with controlled current gain and improved breakdown voltage characteristics  
A method of fabricating a SiGe heterojunction bipolar transistor (HBT) is provided which results in a SiGe HBT that has a controllable current gain and improved breakdown voltage. The SiGe HBT...
6784513 Semiconductor light receiving device and electronic apparatus incorporating the same  
A semiconductor light receiving device is provided, which comprises a semiconductor substrate, a collector region, a base region, and an emitter region, an insulating film covering the surface of...
6780724 Method of manufacturing a bipolar transistor semiconductor device  
The invention relates to a method of manufacturing implanted-base, double polysilicon bipolar transistors whose emitter, base and collector are all situated in a single active area. In accordance...
6780702 Method of reducing device parasitic capacitance using underneath crystallographically selective wet etching  
When InP DHBTs are located in parallel to a crystallographical direction of <011>, there are several advantages in the aspect of device property such as reliability. But, in case of a direction...
6767842 Implementation of Si-Ge HBT with CMOS process  
A semiconductor device wherein Si—Ge is the base of a bipolar transistor and a Silicon layer is the emitter. A method of making such a semiconductor device including steps of forming a Silicon...
6764918 Structure and method of making a high performance semiconductor device having a narrow doping profile  
A structure and method of making an NPN heterojunction bipolar transistor (100) includes a semiconductor substrate (11) with a first region (82) containing a dopant (86) for forming a base region...
6764913 Method for controlling an emitter window opening in an HBT and related structure  
According to one exemplary embodiment, a heterojunction bipolar transistor comprises a base having a top surface. The heterojunction bipolar transistor further comprises a first spacer and a...
6756278 Lateral heterojunction bipolar transistor and method of fabricating the same  
A lateral heterojunction bipolar transistor comprises a first semiconductor layer in a mesa configuration disposed on an insulating layer, a second semiconductor layer formed by epitaxial growth...
6756279 Method for manufacturing a bipolar transistor in a CMOS integrated circuit  
A method for manufacturing a contact between a semiconductor substrate and a doped polysilicon layer deposited on the substrate with an interposed insulating layer, wherein elements adapted to...
6746928 Method for opening a semiconductor region for fabricating an HBT  
According to one disclosed embodiment, a transistor gate is fabricated on a substrate. For example, the gate can be a polycrystalline silicon gate in a FET. Thereafter, a conformal layer is...
6740562 Manufacturing method of a semiconductor device having a polysilicon electrode  
A semiconductor device and a method of manufacturing the semiconductor device having a vertical NPN bipolar transistor, a lateral PNP bipolar transistor, and P-type and N-type resistors are...
6740560 Bipolar transistor and method for producing same  
The aim of the invention is to provide for a bipolar transistor and a method for producing the same. Said bipolar transistor should have minimal base-emitter capacities and very good high...