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7411245 Spacer barrier structure to prevent spacer voids and method for forming the same  
A semiconductor device includes a spacer adjacent a gate structure. A protection layer covers oxide portions of the spacer surface such that subsequent manufacturing operations such as wet oxide...
7410876 Methodology to reduce SOI floating-body effect  
A method for making a semiconductor device, comprising (a) providing a structure comprising a gate electrode ( 207 ) disposed on a substrate ( 203 ); (b) creating first ( 213 ) and second ( 214 )...
7402494 Method for fabricating high voltage semiconductor device  
A method for fabricating a high voltage semiconductor device, which comprises a semiconductor substrate; a gate insulation layer formed on the semiconductor substrate; and a gate electrode formed...
7402485 Method of forming a semiconductor device  
A sidewall spacer structure is formed adjacent to a gate structure whereby a material forming an outer surface of the sidewall spacer structure contains nitrogen. Subsequent to its formation the...
7402451 Optimized transistor for imager device  
An imager device that has mitigated dark current leakage and punch-through protection. The transistor associated with the photoconversion device is formed with a single (i.e, one-sided) active area...
7396730 Integrated circuit devices including an L-shaped depletion barrier layer adjacent opposite sides of a gate pattern and methods of forming the same  
Integrated circuit devices include an integrated circuit substrate having a channel region therein. A gate pattern is disposed on a top surface of the channel region. A depletion barrier layer...
7385261 Extended drain metal oxide semiconductor transistor and manufacturing method thereof  
A MOS transistor having an extended drain structure and including a semiconductor substrate formed in a well of a first conductivity type. A gate insulating layer is formed on the substrate, a gate...
7381623 Pre-epitaxial disposable spacer integration scheme with very low temperature selective epitaxy for enhanced device performance  
The embodiments of the invention provide a method, etc. for a pre-epitaxial disposable spacer integration scheme with very low temperature selective epitaxy for enhanced device performance. More...
7378317 Superjunction power MOSFET  
Methods and apparatus are provided for TMOS devices, comprising multiple N-type source regions, electrically in parallel, located in multiple P-body regions separated by N-type JFET regions at a...
7371646 Manufacture of insulated gate type field effect transistor  
After a field insulating film having an element opening is formed on the surface of a p-type well, a gate insulating film is formed on a semiconductor surface in the element opening. A gate...
7371623 Semiconductor device with semiconductor circuit comprising semiconductor units, and method for fabricating it  
The invention is to provide a high-productivity method for fabricating a TFT device having different LDD structures on one and the same substrate, and the TFT device. Specifically, the invention...
7368357 Semiconductor device having a graded LDD region and fabricating method thereof  
A semiconductor device and fabricating method thereof in which a lightly doped drain junction is graded using a diffusion property of dopant implanted in heavily doped source/drain region are...
7364957 Method and apparatus for semiconductor device with improved source/drain junctions  
A semiconductor device with improved source/drain junctions and methods for fabricating the device are disclosed. A preferred embodiment comprises a MOS transistor with a gate structure overlying a...
7361565 Method of forming a metal gate in a semiconductor device  
In a method of forming a metal gate in a semiconductor device, a gate insulation pattern and a dummy gate pattern are formed on a substrate. An insulation interlayer is formed on the dummy gate...
7361564 Method of manufacturing high-voltage device  
A method of manufacturing a high-voltage device DDD (Double Doped Drain) ion implantation process is performed at a tilt angle in order to form a smooth junction profile. Accordingly, the intensity...
7361551 Method for making an integrated circuit having an embedded non-volatile memory  
A method for forming a portion of a semiconductor device includes: patterning gate stack layers overlying a substrate into a gate stack; implanting dopant ions to form shallow source/drain...
7361540 Method of reducing noise disturbing a signal in an electronic device  
Certain aspects of a method for reducing noise disturbing at least one signal in an electronic device may comprise shielding a first layer doped with a first dopant from a signaling layer employing...
7358168 Ion implantation method for forming a shallow junction  
A shallow junction that previously would require the use of a low-energy ion implanter can be directly formed by high-energy or middle-energy ion implanters such that the manufacturer need not...
7354839 Gate structure and a transistor having asymmetric spacer elements and methods of forming the same  
Methods for forming asymmetric gate structures comprising spacer elements disposed on the opposed sides of a gate electrode and having a different width are disclosed. The asymmetric gate...
7354833 Method for improving threshold voltage stability of a MOS device  
This invention provides a method for improving threshold voltage stability of at least one metal-oxide-semiconductor (MOS) device. In one embodiment of the invention, at least one well is formed on...
7351659 Methods of forming a transistor with an integrated metal silicide gate electrode  
Methods of forming a transistor having integrated metal silicide transistor gate electrode on a semiconductor assembly are described. The transistor gate is partially fabricated by reacting the...
7351627 Method of manufacturing semiconductor device using gate-through ion implantation  
Disclosed herein is a method of manufacturing a semiconductor device via gate-through ion implantation, comprising forming a gate stack on a semiconductor substrate and performing ion implantation...
7345355 Complementary junction-narrowing implants for ultra-shallow junctions  
Methods are disclosed for forming ultra shallow junctions in semiconductor substrates using multiple ion implantation steps. The ion implantation steps include implantation of at least one...
7344951 Surface preparation method for selective and non-selective epitaxial growth  
According to one embodiment of the invention, a surface preparation method for selective and non-selective epitaxial growth includes providing a substrate having a gate region, a source region, and...
7344947 Methods of performance improvement of HVMOS devices  
Methods fabricate DEMOS devices having varied channel lengths and substantially similar threshold voltages. A threshold voltage is selected for first and second devices. First and second well...
RE40138 Method for improving hot carrier lifetime via a nitrogen implantation procedure performed before or after a Teos liner deposition  
A process for fabricating input/output, N channel, (I/O NMOS) devices, featuring an ion implanted nitrogen region, used to reduce hot carrier electron, (HEC), injection, has been developed. The...
7338871 Method for fabricating semiconductor device  
The present invention provides a method for fabricating a semiconductor device capable of preventing a contact resistance from increasing in a region contacted to an N-type conductive region during...
7335568 Method of forming doped regions in the bulk substrate of an SOI substrate to control the operational characteristics of transistors formed thereabove, and an integrated circuit device comprising same  
In one illustrative embodiment, the method comprises providing an SOI substrate comprised of an active layer, a buried insulation layer and a bulk substrate, forming a doped region in the bulk...
7335563 Rotated field effect transistors and method of manufacture  
An apparatus and method for manufacturing rotated field effect transistors. The method comprises providing a substrate including a first gate structure and a second gate structure, which are not...
7329583 Method of fabricating isolated semiconductor devices in epi-less substrate  
An structure for electrically isolating a semiconductor device is formed by implanting dopant into a semiconductor substrate that does not include an epitaxial layer. Following the implant the...
7316957 Semiconductor device and method for manufacturing the same  
A semiconductor device and a method for manufacturing the same are provided. A gate insulating film is formed under a vacuum condition to prevent deterioration of reliability of the device due to...
7314804 Plasma implantation of impurities in junction region recesses  
A transistor device having a conformal depth of impurities implanted by isotropic ion implantation into etched junction recesses. For example, a conformal depth of arsenic impurities and/or carbon...
7310238 Thin-film embedded capacitance, method for manufacturing thereof, and a printed wiring board  
The present invention provides a thin-film embedded capacitance having a substantial electrostatic capacity per unit area, and a method for manufacturing thereof. A thin film embedded capacitance...
7309901 Field effect transistors (FETs) with multiple and/or staircase silicide  
A semiconductor structure and method for forming the same. The semiconductor structure comprises a field effect transistor (FET) having a channel region disposed between first and second...
7309899 Semiconductor device including a MOSFET with nitride side wall  
A semiconductor device includes a semiconductor substrate, a gate insulating layer, a gate electrode structure and a side wall structure. The gate insulating layer is formed on the semiconductor...
7309637 Method to enhance device performance with selective stress relief  
A structure and method of fabrication of a semiconductor device having a stress relief layer under a stress layer in one region of a substrate. In a first example, a stress relief layer is formed...
7303967 Method for fabricating transistor of semiconductor device  
Disclosed is a method for fabricating a transistor of a semiconductor device, the method comprising the steps of: providing a semiconductor; forming a gate electrode; performing a low-density ion...
7303965 MIS transistor and method for producing same  
In a MIS transistor, the top surfaces of source/drain regions (S/D diffusion layers) formed on a semiconductor substrate 1 are arranged nearer to a gate electrode than a channel plane on the...
7300848 Semiconductor device having a recess gate for improved reliability  
A semiconductor device having a recess gate is formed by first forming a recess below the upper surface of the substrate. A spacer is formed at each sidewall of the recess. An impurity doping area...
7288470 Semiconductor device comprising buried channel region and method for manufacturing the same  
A semiconductor device includes a gate insulating film formed on a semiconductor substrate between first diffusion layers, a gate electrode including a first gate portion formed on the gate...
7279387 Method for fabricating asymmetric semiconductor device  
A method for fabricating an asymmetric semiconductor device is provided. A substrate formed with at least one base structure of MOSFET thereon is provided, wherein the base structure includes a...
7276431 Method of fabricating isolated semiconductor devices in epi-less substrate  
An structure for electrically isolating a semiconductor device is formed by implanting dopant into a semiconductor substrate that does not include an epitaxial layer. Following the implant the...
7276419 Semiconductor device and method for forming the same  
A semiconductor device may include first, second, and third semiconductor layers. The first and third layers may have a first dopant type, and the second layer may have a second dopant type. A...
7268050 Method for fabricating a MOS transistor in a semiconductor device including annealing in a nitrogen environment to form a nitrided oxide film  
A method for fabricating a MOS transistor in a semiconductor device is disclosed. An example method subjects a surface of a semiconductor substrate to thermal oxidation to form an oxide film for...
7265011 Method of manufacturing a transistor  
A method of manufacturing a transistor according to some embodiments includes sequentially forming a dummy gate oxide layer and a dummy gate electrode on an active region of a semiconductor...
7259075 Method for manufacturing field effect transistor  
The manufacturing stability can be improved while effectively inhibiting the short-channel effect in the transistor according to the present invention. A halo impurity having a conductivity type...
7256125 Method of manufacturing a semiconductor device  
For improving the reliability of a semiconductor device having a stacked structure of a polycrystalline silicon film and a tungsten silicide film, the device is manufactured by forming a...
7256096 Semiconductor device having a dual-damascene gate and manufacturing method thereof  
A method of manufacturing a semiconductor device having a dual-damascene gate including forming LDD regions by forming a gate oxide film on a semiconductor substrate, and by implanting...
7256095 High voltage metal-oxide-semiconductor transistor devices and method of making the same  
A method for fabricating metal-oxide-semiconductor devices is provided. The method includes forming a gate dielectric layer on a substrate; depositing a polysilicon layer on the gate dielectric...
7247909 Method for forming an integrated circuit with high voltage and low voltage devices  
A method is disclosed for integrally forming at least one low voltage device and at least one high voltage device. According to the method, a first gate structure and a second gate structure are...
Matches 1 - 50 out of 1531 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >