Patents in Class 438/305

Matches 1 - 50 out of 1333

Match	Document	Document Title
1	7622353	Method for forming recessed gate structure with stepped profile Disclosed herein are a recess-gate structure in which junctions have a thickness significantly smaller than the thickness of a device isolation layer to thereby prevent shorting of the junctions...
2	7618869	Manufacturing method for increasing product yield of memory devices suffering from source/drain junction leakage A DRAM device includes contact pads having a bottom in contact with a corresponding source/drain region 21 and a top in contact with a bottom of an overlying contact plug. The source/drain region...
3	7611951	Method of fabricating MOS transistor having epitaxial region Example embodiments relate to a method of manufacturing a semiconductor device. Other example embodiments relate to a method of manufacturing a metal-oxide-semiconductor (MOS) transistor having an...
4	7608512	Integrated circuit structure with improved LDMOS design A semiconductor integrated circuit including an LDMOS device structure comprises a semiconductor layer with a pair of spaced-apart field effect gate structures over an upper surface of the...
5	7605045	Field effect transistors and methods for fabricating the same Field effect transistors and methods for fabricating field effect transistors are provided. A method, in accordance with an exemplary embodiment of the invention, comprises forming a...
6	7605038	Semiconductor device and manufacturing method thereof A high voltage semiconductor deice and a manufacturing method thereof are provided. The high voltage semiconductor device comprises: second conductive type drift regions disposed spaced from each...
7	7602014	Superjunction power MOSFET An embodiment of an MOS device includes a semiconductor substrate of a first conductivity type, a first region of the first conductivity type having a length L acc and a net active dopant...
8	7601635	Method of manufacturing a semiconductor device For improving the reliability of a semiconductor device having a stacked structure of a polycrystalline silicon film and a tungsten silicide film, the device is manufactured by forming a...
9	7601599	Semiconductor device and method for manufacturing the same A method for manufacturing a semiconductor device includes the steps of (a) forming a first insulating film pattern, which has a first portion and a second portion separated from the first portion...
10	7601598	Reverse metal process for creating a metal silicide transistor gate structure The present invention teaches a method of forming a MOSFET transistor having a silicide gate which is not subject to problems produced by etching a metal containing layer when forming the gate...
11	7598147	Method of forming CMOS with Si:C source/drain by laser melting and recrystallization A method of forming crystalline Si:C in source and drain regions is provided. After formation of shallow trench isolation and gate electrodes of field effect transistors, gate spacers are formed on...
12	7598146	Self-aligned gate and method A semiconductor structure comprises a silicon substrate of a first conductivity type including wells of a second conductivity type formed on a surface thereof. The wells may be laterally isolated...
13	7585720	Dual stress liner device and method A dual stress liner manufacturing method and device is described. Overlapping stress liner layers of opposite effect (e.g., tensile versus compression) may be deposited over portions of the device,...
14	7582520	Method of fabricating complementary metal-oxide-semiconductor transistor and metal-oxide-semiconductor transistor A method of fabricating a metal-oxide-semiconductor transistor is provided. A first gate structure and a second gate structure are formed on a substrate. The first gate structure has a dimension...
15	7579246	Semiconductor device manufacturing method including oblique ion implantation process and reticle pattern forming method An active region and an opposite conductivity active region are formed in a semiconductor substrate. The opposite conductivity active region is covered with a resist pattern. Impurities are...
16	7572706	Source/drain stressor and method therefor A method for forming a semiconductor device is provided. The method includes forming a gate structure overlying a substrate. The method further includes forming a sidewall spacer adjacent to the...
17	7572697	Method of manufacturing flash memory device A method of manufacturing flash memory devices wherein, after gate lines are formed, an HDP oxide film having at least the same height as that of a floating gate is formed between the gate lines....
18	7569444	Transistor and method for manufacturing thereof A transistor includes a gate insulating layer over a semiconductor substrate; a first insulating layer on both sides of the gate insulating layer; first spacers over the first insulating layer and...
19	7557022	Implantation of carbon and/or fluorine in NMOS fabrication Formation of an NMOS transistor is disclosed, where at least one of carbon, atomic fluorine and molecular fluorine (F 2 ) are combined with implantations of at least one of arsenic, phosphorous and...
20	7544556	Process for forming CMOS devices using removable spacers A process for forming CMOS devices is disclosed in which disposable spacers are used to obtain a structure having improved gap-fill characteristics. First, gate film stacks are formed on the...
21	7544553	Integration scheme for fully silicided gate To form a semiconductor device, a silicon (e.g., polysilicon) gate layer is formed over a gate dielectric and a sacrificial layer (preferably titanium nitride) is formed over the silicon gate...
22	7541210	Method for fabricating CMOS image sensor A CMOS image sensor and a method for fabricating the same are disclosed, in which transfer characteristics are improved. The method includes forming a photodiode region and a second conductive type...
23	7534707	MOS Transistors having inverted T-shaped gate electrodes and fabrication methods thereof MOS transistors have an active region defined in a portion of a semiconductor substrate, a gate electrode on the active region, and drain and source regions in the substrate. First and second...
24	7524715	Memory cell transistor having different source/drain junction profiles connected to DC node and BC node and manufacturing method thereof A memory cell transistor of a DRAM device is provided. A gate stack pattern is formed on a semiconductor substrate. A DC node and a BC node are formed substantially under lateral sides of the gate...
25	7524682	Method for monitoring temperature in thermal process A method for monitoring a temperature in a thermal process is described. A monitor substrate is provided and subject to ion implantation, and a characteristic parameter of the monitor substrate...
26	7514332	Semiconductor device and method for manufacturing the same A method for manufacturing a semiconductor device includes the steps of (a) forming a first region by selectively ion-implanting a second conductive type impurity into a first conductive type...
27	7510955	Method of fabricating multi-fin field effect transistor A multi-fin field effect transistor includes a substrate, an oxide layer, a conductive layer, a gate oxide layer, and a doped region is provided. The substrate is surrounded by a trench, and there...
28	7504309	Pre-silicide spacer removal A method forms a gate conductor over a substrate, and simultaneously forms spacers on sides of the gate conductor and a gate cap on the top of the gate conductor. Isolation regions are formed in...
29	7504293	Fabrication method for semiconductor device A fabrication method for a semiconductor device includes a step of forming a gate insulating film on a semiconductor layer, and a step of forming a first gate electrode layer on the gate insulating...
30	7501322	Methods of forming non-volatile memory devices having trenches A semiconductor memory device includes a semiconductor substrate having a trench therein. First and second gate patterns are formed on a surface of the substrate adjacent the trench, a respective...
31	7494885	Disposable spacer process for field effect transistor fabrication According to one exemplary embodiment, a method for forming a field effect transistor on a substrate comprises a step of forming disposable spacers adjacent to a gate stack situated on the...
32	7491616	Method of manufacturing a semiconductor device including dopant introduction The invention relates to a method of manufacturing a semiconductor device ( 10 ) in which a semiconductor body ( 1 ) of silicon is provided, at a surface thereof, with a semiconductor region ( 4 )...
33	7485905	Electrostatic discharge protection device An electrostatic discharge protection device comprising a multi-finger gate, a first lightly doped region of a second conductivity, a first heavily doped region of the second conductivity, and a...
34	7485536	Abrupt junction formation by atomic layer epitaxy of in situ delta doped dopant diffusion barriers A method including forming a channel region between source and drain regions in a substrate, the channel region including a first dopant profile; and forming a barrier layer between the channel...
35	7482212	Semiconductor device and manufacturing method thereof A method of manufacturing a semiconductor device including forming a trench on a first surface of a silicon substrate, forming a thermal oxide layer and a deposited oxide layer on the trench and...
36	7473608	N-channel MOSFETs comprising dual stressors, and methods for forming the same The present invention relates to a semiconductor device comprising at least one n-channel field effect transistor (n-FET). Specifically, the n-FET comprises first and second patterned stressor...
37	7473607	Method of manufacturing a multi-workfunction gates for a CMOS circuit A method of manufacturing a device includes doping a low voltage threshold area and a high voltage threshold area. Gate structures are formed over the low voltage threshold and high voltage...
38	7468305	Forming pocket and LDD regions using separate masks A method of decoupling the formation of LDD and pocket regions is provided. The method includes providing a semiconductor chip including active regions, forming gate structures in the active...
39	7468303	Semiconductor device and manufacturing method thereof Junction leakage in a medium voltage MOS transistor having a silicide structure is prevented. A titanium layer is formed by sputtering titanium over the entire surface of a semiconductor substrate....
40	7462539	Direct tunneling memory with separated transistor and tunnel areas A semiconductor device has: an isolation region formed on a semiconductor substrate and defining a continuous active region including a select transistor region and a direct tunnel element region;...
41	7456062	Method of forming a semiconductor device A sidewall spacer structure is formed adjacent to a gate structure whereby a material forming an outer surface of the sidewall spacer structure contains nitrogen. Subsequent to its formation the...
42	7452780	Method of forming a stable transistor by dual source/drain implantation A method of forming a transistor includes: forming a gate oxide layer and a gate polysilicon layer on a silicon substrate; forming low-energy ion implantation regions in the silicon substrate and...
43	7449386	Manufacturing method for semiconductor device to mitigate short channel effects A method of manufacturing a plurality of MOS transistors includes forming gate structures in first and second regions on a substrate and forming mask portions only between adjacent drain sides of...
44	7446004	Method for reducing overlap capacitance in field effect transistors A field effect transistor (FET) device includes a gate conductor formed over a semiconductor substrate, a source region having a source extension that overlaps and extends under the gate conductor,...
45	7442602	Methods of fabricating phase change memory cells having a cell diode and a bottom electrode self-aligned with each other Integrated circuit devices are provided having a vertical diode therein. The devices include an integrated circuit substrate and an insulating layer on the integrated circuit substrate. A contact...
46	7439123	Low resistance contact semiconductor device structure A method for making a semiconductor device structure includes producing a substrate having formed thereon a gate with spacers, respective source and drain regions adjacent to the gate and an;...
47	7432168	Method for fabricating semiconductor device with thin gate spacer A method for fabricating a transistor. A substrate having a gate electrode thereon and insulated therefrom is provided. A first gate spacer with a first dielectric material is formed on the...
48	7432146	Semiconductor device and manufacturing method thereof To make it possible to obtain a sharp impurity profile without presenting a disadvantage such as an increase in parasitic resistance or the like using a laser annealing method to thereby meet...
49	7411245	Spacer barrier structure to prevent spacer voids and method for forming the same A semiconductor device includes a spacer adjacent a gate structure. A protection layer covers oxide portions of the spacer surface such that subsequent manufacturing operations such as wet oxide...
50	7410876	Methodology to reduce SOI floating-body effect A method for making a semiconductor device, comprising (a) providing a structure comprising a gate electrode ( 207 ) disposed on a substrate ( 203 ); (b) creating first ( 213 ) and second ( 214 )...

Matches 1 - 50 out of 1333

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >