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7618864 Nonvolatile memory device and methods of forming the same  
Example embodiments relate to a semiconductor memory device and methods of forming the same. Other example embodiments relate to a nonvolatile memory device and methods of forming the same. The...
7595245 Semiconductor device having a gate electrode material feature located adjacent a gate width side of its gate electrode and a method of manufacture therefor  
The present invention provides a semiconductor device, a method of manufacture therefore and an integrated circuit including the same. The semiconductor device ( 300 ), without limitation, may...
7579243 Split gate memory cell method  
Split gate memory cell formation includes forming a sacrificial layer over a substrate. The sacrificial layer is patterned to form a sacrificial structure with a first sidewall and a second...
7569436 Manufacturing method of semiconductor device  
The present invention makes it is possible to provide a manufacturing method of a semiconductor device by which damage by plasma process or doping process during a LDD formation process can be...
7566615 Methods of fabricating scalable two transistor memory devices  
A memory device includes a semiconductor substrate, a first gate insulator on a first portion of a semiconductor substrate, a storage node on the first gate insulator, a tunnel junction barrier on...
7547602 Semiconductor integrated circuit device and its manufacturing method  
A method of manufacturing a semiconductor integrated circuit device is provided including providing a substrate with projecting island regions formed in stripes, with first regions of the substrate...
7544562 Method for manufacturing a capacitor electrode structure  
A method for manufacturing a capacitor electrode structure, according to which the following steps are executed: A substrate is provided, which comprises contact pads arranged in lines and rows on...
7541241 Method for fabricating memory cell  
A memory cell structure comprises a semiconductor substrate, two stack structures positioned on the semiconductor substrate, two conductive spacers positioned on sidewalls of the two stack...
7537988 Differential offset spacer  
A method of fabricating a CMOS integrated circuit includes the steps of providing a substrate having a semiconductor surface, forming a gate dielectric and a plurality of gate electrodes thereon in...
7521314 Method for selective removal of a layer  
A method for forming a semiconductor device includes forming a liner over a semiconductor material including a control electrode. The method further includes forming a first spacer adjacent to the...
7517757 Non-volatile memory device having dual gate and method of forming the same  
A non-volatile memory device including a control gate pattern having a tunnel insulation pattern, a trap-insulation pattern, a blocking insulation pattern and a control gate electrode, which are...
7510941 Semiconductor device and manufacturing method of the same  
The invention improves the performance of a semiconductor device. A metal silicide film is formed by a silicide process on a gate electrode and an n + -type source region of an LDMOSFET, and no...
7432168 Method for fabricating semiconductor device with thin gate spacer  
A method for fabricating a transistor. A substrate having a gate electrode thereon and insulated therefrom is provided. A first gate spacer with a first dielectric material is formed on the...
7429527 Method of manufacturing self-aligned contact openings  
A method of manufacturing self-aligned contact openings is provided. A substrate having a number of device structures is provided and the top of the device structures is higher than the surface of...
7419870 Method of manufacturing a flash memory device  
Provided is a method of manufacturing a flash memory device. In the method, after forming a cell string and source/drain selection transistors, it forms a first oxide film in which a sidewall oxide...
7419879 Transistor having gate dielectric layer of partial thickness difference and method of fabricating the same  
A transistor having a gate dielectric layer of partial thickness difference and a method of fabricating the same are provided. The method includes forming a gate dielectric layer having a main...
7371631 Method of manufacturing a nonvolatile semiconductor memory device, and a nonvolatile semiconductor memory device  
For enhancing the high performance of a non-volatile semiconductor memory device having an MONOS type transistor, a non-volatile semiconductor memory device is provided with MONOS type transistors...
7361564 Method of manufacturing high-voltage device  
A method of manufacturing a high-voltage device DDD (Double Doped Drain) ion implantation process is performed at a tilt angle in order to form a smooth junction profile. Accordingly, the intensity...
7338870 Methods of fabricating semiconductor devices  
Methods of recovering damage on a semiconductor device by performing a hydrogen annealing process are disclosed. An example disclosed method includes forming an STI structure on a semiconductor...
7335567 Gate electrodes of semiconductor devices and methods of manufacturing the same  
Gate electrodes of semiconductor devices and methods of manufacturing the same are disclosed. An example method comprises: sequentially forming a gate oxide layer and a sacrificial buffer layer on...
7312129 Method for producing two gates controlling the same channel  
A semiconductor process and apparatus use a predetermined sequence of patterning and etching steps to etch a gate stack ( 62 ) formed over a substrate ( 11 ) and a first spacer structure ( 42 ),...
7262456 Bit line structure and production method thereof  
The disclosure relates to a bit line structure and an associated production method for the bit line structure. In the bit line structure, at least in a region of a second contact and a plurality of...
7259062 Method of making a magnetic tunnel junction device  
A method of making a magnetic tunnel junction device is disclosed. The magnetic tunnel junction device includes a magnetic tunnel junction stack and an electrically non-conductive spacer in contact...
7220649 Method of manufacturing semiconductor device and the semiconductor device manufactured by the method  
The method of manufacturing the semiconductor device that includes a high voltage MOS transistor with high operating voltage under both high and low gate voltages with low-cost is disclosed. When...
7217624 Non-volatile memory device with conductive sidewall spacer and method for fabricating the same  
The present invention relates to a non-volatile memory device having conductive sidewall spacers and a method for fabricating the same. The non-volatile memory device includes: a substrate; a gate...
7189623 Semiconductor processing method and field effect transistor  
A method of forming a transistor gate includes forming a gate oxide layer over a semiconductive substrate. Chlorine is provided within the gate oxide layer. A gate is formed proximate the gate...
7172944 Method of fabricating a semiconductor device having an elevated source/drain  
The present invention provides a semiconductor device having an elevated source/drain and a method of fabricating the same. In the semiconductor device, an active region is defined at a...
7169674 Complementary metal oxide semiconductor (CMOS) gate stack with high dielectric constant gate dielectric and integrated diffusion barrier  
A diffusion barrier (and method for forming the diffusion barrier) for a field-effect transistor having a channel region and a gate electrode, includes an insulating material being disposed over...
7169678 Method of forming a semiconductor device using a silicide etching mask  
Semiconductor devices and methods for fabricating a silicide of a semiconductor device are disclosed. An illustrated method comprises: forming a gate electrode; depositing an insulating layer;...
7118977 System and method for improved dopant profiles in CMOS transistors  
According to one embodiment of the present invention, a method of forming a semiconductor device includes forming a gate stack on an outer surface of a semiconductor body. First and second sidewall...
7112498 Methods of forming silicide layer of semiconductor device  
Methods of forming silicide layers of a semiconductor device are disclosed. A disclosed method comprises depositing a polysilicon layer, a buffer oxide layer, and a buffer nitride layer on a...
7101766 Methods of fabricating semiconductor device having T-shaped gate and L-shaped spacer  
There are provided methods of fabricating a semiconductor device having a T-shaped gate and an L-shaped spacer. In the method, an insulating layer and a sacrificial layer are formed in sequence on...
7098124 Method of forming contact hole and method of fabricating semiconductor device  
A method of forming contact holes is provided. A substrate having a plurality of device structures is provided. A first dielectric layer and a conductive layer sequentially cover the device...
7094654 Manufacture of electronic devices comprising thin-film transistors  
A method of manufacturing an electronic device including a thin film transistor comprises forming a semiconductor film over an insulating substrate; depositing a first masking layer over the...
7087503 Shallow self isolated doped implanted silicon process  
A process and structure for forming electrical devices. The process and structure provide for forming an insulating layer on a substrate. A conductive region is then formed in the insulating layer...
7071046 Method of manufacturing a MOS transistor  
A method of manufacturing a MOS transistor, comprising the steps of providing a semiconductor substrate, forming a gate structure on the semiconductor substrate, performing an implantation to form...
7071061 Method for fabricating non-volatile memory  
A method of fabricating a non-volatile memory is described. A substrate is provided and a first dielectric layer, an electron trapping layer and a second dielectric layer are sequentially formed...
7064022 Method of forming merged FET inverter/logic gate  
A method forms a semiconductor device from a device that includes a first source region, a first drain region, and a first fin structure that are separated from a second source region, a second...
7045433 Tip architecture with SPE for buffer and deep source/drain regions  
A method of manufacturing a semiconductor device includes forming a gate, source/drain extensions, buffer regions, and source/drain regions. The gate is formed over a semiconductor layer, and the...
7033856 Spacer chalcogenide memory method  
The present invention includes devices and methods to form memory cell devices including a spacer comprising a programmable resistive material alloy. Particular aspects of the present invention are...
6998302 Method of manufacturing mosfet having a fine gate width with improvement of short channel effect  
A method for fabricating a transistor in a semiconductor device is disclosed. An example method forms an isolation region in a semiconductor substrate and sequentially deposits a pad oxide layer, a...
6991973 Manufacturing method of thin film transistor  
A method of manufacturing a thin film transistor for solving the drawbacks of the prior arts is disclosed. The method includes steps of providing an insulating substrate, sequentially forming a...
6982201 Structure and fabricating method with self-aligned bit line contact to word line in split gate flash  
A new structure is disclosed for semiconductor devices in which contact regions are self-aligned to conductive lines. Openings to a gate oxide layer, in partially fabricated devices on a silicon...
6967143 Semiconductor fabrication process with asymmetrical conductive spacers  
A semiconductor process and resulting transistor includes forming conductive extension spacers ( 146, 150 ) on either side of a gate electrode ( 116 ). Conductive extensions ( 146, 150 ) and gate...
6943082 Method for manufacturing a nonvolatile memory device  
A method, for manufacturing a nonvolatile memory device, includes: forming a gate layer above which a stopper layer is disposed on a semiconductor layer; forming control gates on both side surfaces...
6908822 Semiconductor device having an insulating layer and method for forming  
An insulating layer ( 24, 66, 82 ) is formed over a stack ( 14 ) of materials and a semiconductor substrate ( 12 ) and an implant is performed through the insulating layer into the semiconductor...
6908833 Shallow self isolated doped implanted silicon process  
A process and structure for forming electrical devices. The process and structure provide for forming an insulating layer on a substrate. A conductive region is then formed in the insulating layer...
6897116 Method and structure to improve the gate coupling ratio (GCR) for manufacturing a flash memory device  
Method and structure to improve the gate coupling ratio (GCR) for manufacturing a flash memory device are provided. The method and structure include the following steps. A gate oxide layer, a first...
6867103 Method of fabricating an ESD device on SOI  
A method to form transistors having improved ESD performance in the manufacture of an integrated circuit device is achieved. The method includes providing a SOI substrate with a doped silicon layer...
6849515 Semiconductor process for disposable sidewall spacers  
A semiconductor process and structure ( 32 ) uses a disposable sidewall spacer ( 42 ) associated with lightly doped drain (LDD) transistors. The disposable sidewall spacers are efficiently removed...
Matches 1 - 50 out of 226 1 2 3 4 5 >