Patents in Class 438/303

Matches 1 - 50 out of 1114

Match	Document	Document Title
1	7642152	Method of fabricating spacers and cleaning method of post-etching and semiconductor device A method of fabricating spacers is provided. The method includes providing a substrate with a device structure formed thereon. The device structure comprises a gate structure and a pair of...
2	7638400	Method for fabricating semiconductor device A method for forming a uniform doped region in a substrate having a non-uniform material layer thereon is provided. The non-uniform material layer is removed form the substrate. Thereafter, a...
3	7618868	Method of manufacturing field effect transistors using sacrificial blocking layers Provided are a more stable semiconductor integrated circuit device and a method of manufacturing the same. The method includes providing a semiconductor substrate comprising a first transistor...
4	7615458	Activation of CMOS source/drain extensions by ultra-high temperature anneals A method of manufacturing a semiconductor device that includes forming a gate dielectric layer over a semiconductor substrate. A gate electrode is formed over the gate dielectric layer. A dopant is...
5	7611952	Method of manufacturing semiconductor device having side wall spacers Gate insulating films 12 A and 12 B of different thickness are formed in element openings 16 a and 16 b in the isolation film 16 of a wafer 10 . The gate insulating film 12 B is the...
6	7605030	Hafnium tantalum oxynitride high-k dielectric and metal gates Electronic apparatus and methods may include a hafnium tantalum oxynitride film on a substrate for use in a variety of electronic systems. The hafnium tantalum oxynitride film may be structured as...
7	7605044	Method of manufacturing semiconductor device A method of manufacturing a semiconductor device including at least one step of: forming a transistor on and/or over a semiconductor substrate; forming silicide on and/or overa gate electrode and a...
8	7605407	Composite stressors with variable element atomic concentrations in MOS devices A semiconductor device includes a semiconductor substrate, a gate stack on the semiconductor substrate, and a stressor adjacent the gate stack and having at least a portion in the semiconductor...
9	7605043	Semiconductor device and manufacturing method for the same A semiconductor device includes a first diffusion region including germanium atoms and first impurity atoms, provided on a surface layer of a semiconductor substrate, the first impurity atoms...
10	7601598	Reverse metal process for creating a metal silicide transistor gate structure The present invention teaches a method of forming a MOSFET transistor having a silicide gate which is not subject to problems produced by etching a metal containing layer when forming the gate...
11	7602014	Superjunction power MOSFET An embodiment of an MOS device includes a semiconductor substrate of a first conductivity type, a first region of the first conductivity type having a length L acc and a net active dopant...
12	7595247	Halo-first ultra-thin SOI FET for superior short channel control Superior control of short-channel effects for an ultra-thin semiconductor-on-insulator field effect transistor (UTSOI-FET) is obtained by performing a halo implantation immediately after a gate...
13	7585738	Method of forming a fully silicided semiconductor device with independent gate and source/drain doping and related device A method of forming a fully silicided semiconductor device with independent gate and source/drain doping and related device. At least some of the illustrative embodiments are methods comprising...
14	7579246	Semiconductor device manufacturing method including oblique ion implantation process and reticle pattern forming method An active region and an opposite conductivity active region are formed in a semiconductor substrate. The opposite conductivity active region is covered with a resist pattern. Impurities are...
15	7579250	Method for reducing hot carrier effect of MOS transistor A semiconductor device structure is described, including a MOS transistor, a silicon-rich silicon nitride layer having a refractive index of about 2.00-2.30, and a dielectric layer. The...
16	7575997	Method for forming contact hole of semiconductor device A method for forming a contact hole of a semiconductor is provided. Conductive patterns are formed over a substrate. An insulation layer is formed over the substrate to bury the conductive...
17	7572720	Semiconductor device and method for fabricating the same A semiconductor device includes a substrate, first, second, and third gate lines disposed over the substrate, the first and second gate lines defining a first trench with a first aspect ratio, the...
18	7572697	Method of manufacturing flash memory device A method of manufacturing flash memory devices wherein, after gate lines are formed, an HDP oxide film having at least the same height as that of a floating gate is formed between the gate lines....
19	7572692	Complementary transistors having different source and drain extension spacing controlled by different spacer sizes Disclosed is a method of forming an integrated circuit structure having first-type transistors, such as P-type field effect transistors (PFETs) and complementary second-type transistors, such as...
20	7572706	Source/drain stressor and method therefor A method for forming a semiconductor device is provided. The method includes forming a gate structure overlying a substrate. The method further includes forming a sidewall spacer adjacent to the...
21	7569856	Semiconductor device and method for manufacturing the same A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film....
22	7569457	Method of fabricating semiconductor device An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region ( 3 ), and one...
23	7569464	Method for manufacturing a semiconductor device having improved across chip implant uniformity The present invention provides a method for manufacturing a semiconductor device, which includes forming a gate structure over a substrate, and forming a stack of layers on the substrate and at...
24	7566624	Method for the production of transistor structures with LDD A method for producing a transistor structure with a lightly doped drain (LDD) includes structuring a gate electrode on a gate dielectric. The method also includes etching the semiconductor body or...
25	7560326	Silicon/silcion germaninum/silicon body device with embedded carbon dopant A semiconductor structure and method of manufacturing a semiconductor device, and more particularly, an NFET device. The devices includes a stress receiving layer provided over a stress inducing...
26	7560353	Methods of fabricating memory devices with memory cell transistors having gate sidewall spacers with different dielectric properties A memory device, such as a DRAM, SRAM or non-volatile memory device, includes a substrate, a gate electrode disposed on the substrate, and source and drain regions in the substrate adjacent...
27	7553726	Method of fabricating nonvolatile memory device A method of fabricating nonvolatile memory devices may involve forming separate floating gates on a semiconductor substrate, forming control gates on the semiconductor substrate, conformally...
28	7550357	Semiconductor device and fabricating method thereof A semiconductor device with a low drain current in the off-state of LDD type accommodating high voltages is provided. On the thermal oxide film, a polysilicon film and a CVD oxide film, and a...
29	7544554	Methods of forming gatelines and transistor devices The invention includes semiconductor constructions, methods of forming gatelines, and methods of forming transistor structures. The invention can include, for example, a damascene method of forming...
30	7541216	Method of aligning deposited nanotubes onto an etched feature using a spacer A method of forming an aligned connection between a nanotube layer and a raised feature is disclosed. A substrate having a raised feature has spacers formed next to the side of the raised feature....
31	7537988	Differential offset spacer A method of fabricating a CMOS integrated circuit includes the steps of providing a substrate having a semiconductor surface, forming a gate dielectric and a plurality of gate electrodes thereon in...
32	7534706	Recessed poly extension T-gate A method is provided for making a silicided gate in a semiconductor device. In accordance with the method, a gate ( 213 ) is provided which comprises a first portion ( 214 ) and a second portion (...
33	7534689	Stress enhanced MOS transistor and methods for its fabrication A stress enhanced MOS transistor and methods for its fabrication are provided. In one embodiment the method comprises forming a gate electrode overlying and defining a channel region in a...
34	7531435	Semiconductor device and manufacturing method of the same In consideration of an optimum combination of impurities used for the purpose of forming an extension region ( 13 ) and a pocket region ( 11 ) and further inhibiting impurity diffusion in the...
35	7528067	MOSFET structure with multiple self-aligned silicide contacts A metal oxide semiconductor field effect transistor (MOSFET) structure that includes multiple and distinct self-aligned silicide contacts and methods of fabricating the same are provided. The...
36	7528047	Self-aligned split gate memory cell and method of forming A method of forming a split gate memory device using a semiconductor layer includes patterning an insulating layer to leave a pillar thereof. A gate dielectric is formed over the semiconductor...
37	7521314	Method for selective removal of a layer A method for forming a semiconductor device includes forming a liner over a semiconductor material including a control electrode. The method further includes forming a first spacer adjacent to the...
38	7521316	Methods of forming gate structures for semiconductor devices Methods of forming a semiconductor device may include forming a tunnel oxide layer on a semiconductor substrate, forming a gate structure on the tunnel oxide layer, forming a leakage barrier oxide,...
39	7521740	Semiconductor device comprising extensions produced from material with a low melting point A semiconductor device comprises a gate electrode ( 1 ) and a gate insulating layer ( 2 ) both surrounded by a spacer ( 3 ) and produced on a surface (S) of a substrate ( 100 ) of a first...
40	7517745	Semiconductor device having MOSFET with offset-spacer, and manufacturing method thereof A semiconductor device includes a gate insulating film which is formed on the major surface of a semiconductor substrate, a gate electrode which is formed on the gate insulating film, a first...
41	7517766	Method of removing a spacer, method of manufacturing a metal-oxide-semiconductor transistor device, and metal-oxide-semiconductor transistor device A method of removing a spacer, a method of manufacturing a metal-oxide-semiconductor transistor device, and a metal-oxide-semiconductor transistor device, in which, before the spacer is removed, a...
42	7517767	Forming conductive stud for semiconductive devices Embodiments of the present invention provide a method of forming a conductive stud contacting a semiconductor device. The method includes forming a protective layer covering the semiconductor...
43	7517779	Recessed drain extensions in transistor device A method of forming an integrated circuit transistor ( 50 ). The method provides a first semiconductor region ( 52 ) and forms ( 110 ) a gate structure ( 54 x ) in a fixed position relative to the...
44	7514331	Method of manufacturing gate sidewalls that avoids recessing A method of manufacturing a semiconductor device comprising removing a first oxide layer deposited over a semiconductor substrate, thereby exposing source and drain regions of the substrate. The...
45	7510955	Method of fabricating multi-fin field effect transistor A multi-fin field effect transistor includes a substrate, an oxide layer, a conductive layer, a gate oxide layer, and a doped region is provided. The substrate is surrounded by a trench, and there...
46	7510923	Slim spacer implementation to improve drive current Slim spacers are implemented in transistor fabrication. More particularly, wide sidewall spacers are initially formed and used to guide dopants into source/drain regions in a semiconductor...
47	7507626	Floating gate of flash memory device and method of forming the same Disclosed is a floating gate of a flash memory device, wherein a tunneling oxide layer is formed on a semiconductor substrate, and a floating gate is formed in the shape of a lens having a convex...
48	7504309	Pre-silicide spacer removal A method forms a gate conductor over a substrate, and simultaneously forms spacers on sides of the gate conductor and a gate cap on the top of the gate conductor. Isolation regions are formed in...
49	7501317	Method of manufacturing semiconductor device A junction leak current of a transistor including a silicide layer provided on a source/drain region is to be suppressed. After forming a gate electrode over a chip-side surface of a silicon...
50	7494886	Uniaxial strain relaxation of biaxial-strained thin films using ion implantation A method for achieving uniaxial strain on originally biaxial-strained thin films after uniaxial strain relaxation induced by ion implantation is provided. The biaxial-strained thin film receives...

Matches 1 - 50 out of 1114

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