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7605407 |
Composite stressors with variable element atomic concentrations in MOS devices
A semiconductor device includes a semiconductor substrate, a gate stack on the semiconductor substrate, and a stressor adjacent the gate stack and having at least a portion in the semiconductor...
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7605043 |
Semiconductor device and manufacturing method for the same
A semiconductor device includes a first diffusion region including germanium atoms and first impurity atoms, provided on a surface layer of a semiconductor substrate, the first impurity atoms...
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7605042 |
SOI bottom pre-doping merged e-SiGe for poly height reduction
Semiconductor device structures, and methods for making such structures, are described that provide for fully-doped transistor source/drain regions while reducing or even avoiding boron penetration...
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7595261 |
Method and system for manufacturing semiconductor device having less variation in electrical characteristics
A method of manufacturing a semiconductor device, which has a gate electrode and a pair of diffusion layers formed in a semiconductor substrate on sides of the gate electrode, includes forming an...
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7592242 |
Apparatus and method for controlling diffusion
A method and device for reducing a dopant diffusion rate in a doped semiconductor region is provided. The methods and devices include selecting a plurality of dopant elements. Selection of a...
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7592232 |
Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device, includes the steps of forming a dummy gate insulating film and a dummy gate electrode, forming source and drain regions, forming a first...
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7588990 |
Dynamic surface annealing of implanted dopants with low temperature HDPCVD process for depositing a high extinction coefficient optical absorber layer
A plasma enhanced physical vapor deposition process deposits an amorphous carbon layer on an ion-implanted wafer for use in dynamic surface annealing of the wafer with an intense line beam of a...
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7586160 |
Method of manufacturing a semiconductor integrated circuit and semiconductor integrated circuit
A semiconductor integrated circuit is provided in which a CMOS transistor is formed on a first conductivity type semiconductor film provided on a first conductivity type supporting substrate...
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7585763 |
Methods of fabricating integrated circuit devices using anti-reflective coating as implant blocking layer
A patterned anti-reflective coating may be used as a selective implant-blocking layer during fabrication of an integrated circuit transistor. In particular, the anti-reflective coating may be used...
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7585738 |
Method of forming a fully silicided semiconductor device with independent gate and source/drain doping and related device
A method of forming a fully silicided semiconductor device with independent gate and source/drain doping and related device. At least some of the illustrative embodiments are methods comprising...
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7585737 |
Method of manufacturing double diffused drains in semiconductor devices
A method of manufacturing double diffused drains in a semiconductor device. An embodiment comprises forming a gate dielectric layer on a substrate, and masking and patterning the gate dielectric...
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7572706 |
Source/drain stressor and method therefor
A method for forming a semiconductor device is provided. The method includes forming a gate structure overlying a substrate. The method further includes forming a sidewall spacer adjacent to the...
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7569464 |
Method for manufacturing a semiconductor device having improved across chip implant uniformity
The present invention provides a method for manufacturing a semiconductor device, which includes forming a gate structure over a substrate, and forming a stack of layers on the substrate and at...
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7569455 |
Manufacturing method of semiconductor device
A manufacturing method of a CMOS semiconductor device includes using, in an nMOS, spike RTA (first annealing) together with ultra-rapid rising/falling temperature annealing (second annealing) whose...
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7566624 |
Method for the production of transistor structures with LDD
A method for producing a transistor structure with a lightly doped drain (LDD) includes structuring a gate electrode on a gate dielectric. The method also includes etching the semiconductor body or...
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7564056 |
Method for manufacturing a semiconductor device
Embodiments relate to a method for manufacturing a semiconductor device. In embodiments, the method may include forming a gate electrode on the semiconductor substrate, forming a pattern having a...
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7563682 |
LDMOS transistor device, integrated circuit, and fabrication method thereof
An LDMOS transistor device in an integrated circuit comprises a semiconductor substrate ( 10 ), a gate region ( 1 ) including a gate semiconductor layer region ( 2; 2′; 151 ) on top of a gate...
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7563663 |
Method of manufacturing semiconductor device with offset sidewall structure
A method of manufacturing a semiconductor device with NMOS and PMOS transistors is provided. The semiconductor device can lessen a short channel effect, can reduce gate-drain current leakage, and...
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7560350 |
Method for forming strained semiconductor device and method for forming source/drain region
A method for forming a strained semiconductor device is described. A substrate including a first semiconductor material and having a first conductivity type is provided. A semiconductor layer of a...
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7560326 |
Silicon/silcion germaninum/silicon body device with embedded carbon dopant
A semiconductor structure and method of manufacturing a semiconductor device, and more particularly, an NFET device. The devices includes a stress receiving layer provided over a stress inducing...
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7557023 |
Implantation of gate regions in semiconductor device fabrication
A semiconductor fabrication method. The method includes providing a semiconductor structure which includes (i) a semiconductor layer, (ii) a gate dielectric layer on the semiconductor layer, and...
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7553726 |
Method of fabricating nonvolatile memory device
A method of fabricating nonvolatile memory devices may involve forming separate floating gates on a semiconductor substrate, forming control gates on the semiconductor substrate, conformally...
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7553720 |
Non-volatile memory device and fabrication method thereof
A non-volatile memory device includes a buffer oxide film on a substrate; a polysilicon layer on the buffer oxide film; a silicon oxy-nitride (SiON) layer on the polysilicon layer, a first...
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7553705 |
Semiconductor device and method of manufacturing the same
Problems in prior art regarding an n-channel TFT in the source/drain gettering method are solved. In the n-channel TFT, its source/drain regions contain only an n-type impurity. Therefore, compared...
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7550807 |
Semiconductor memory
In the non-volatile semiconductor memory in which an N-type source diffusion layer and an N-type drain diffusion layer are formed on a P-type well formed on a substrate: the source diffusion layer...
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7550356 |
Method of fabricating strained-silicon transistors
A method of fabricating strained-silicon transistors includes providing a semiconductor substrate, in which the semiconductor substrate includes a gate, at least a spacer, and a source/drain...
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7544573 |
Semiconductor device including MOS field effect transistor having offset spacers or gate sidewall films on either side of gate electrode and method of manufacturing the same
First and second impurity doped regions are formed in a semiconductor substrate. A first gate electrode is formed on the first impurity doped region with a first gate insulation film interposed...
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7538003 |
Method for fabricating MOS transistor
A method for fabricating a metal oxide semiconductor (MOS) transistor comprises forming a source region of a first conductivity type and a drain region of the first conductivity type, which are...
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7538001 |
Transistor gate forming methods and integrated circuits
A transistor gate forming method includes forming a first and a second transistor gate. Each of the two gates includes a lower metal layer and an upper metal layer. The lower metal layer of the...
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7534689 |
Stress enhanced MOS transistor and methods for its fabrication
A stress enhanced MOS transistor and methods for its fabrication are provided. In one embodiment the method comprises forming a gate electrode overlying and defining a channel region in a...
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7524695 |
Image sensor and pixel having an optimized floating diffusion
An active pixel includes a a photosensitive element formed in a semiconductor substrate. A transfer transistor is formed between the photosensitive element and a floating diffusion and selectively...
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7521326 |
Semiconductor device and manufacturing method thereof
It is an object of the present invention to provide a semiconductor device superior in the decrease in leak current due to a short-channel effect and a manufacturing method thereof. In a process of...
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7521316 |
Methods of forming gate structures for semiconductor devices
Methods of forming a semiconductor device may include forming a tunnel oxide layer on a semiconductor substrate, forming a gate structure on the tunnel oxide layer, forming a leakage barrier oxide,...
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7510943 |
Semiconductor devices and methods of manufacture thereof
A first gate dielectric of a first transistor is disposed over a workpiece in a first region, and a second gate dielectric of a second transistor is disposed over the workpiece in a second region....
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7504328 |
Schottky barrier source/drain n-mosfet using ytterbium silicide
A method of fabricating an N-type Schottky barrier Source/Drain Transistor (N-SSDT) with ytterbium silicide (YbSi 2-x ) for source and drain is presented. The fabrication of YbSi 2-x is compatible...
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7501317 |
Method of manufacturing semiconductor device
A junction leak current of a transistor including a silicide layer provided on a source/drain region is to be suppressed. After forming a gate electrode over a chip-side surface of a silicon...
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7494881 |
Methods for selective placement of dislocation arrays
Misfit dislocations are selectively placed in layers formed over substrates. Thicknesses of layers may be used to define distances between misfit dislocations and surfaces of layers formed over...
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7494857 |
Advanced activation approach for MOS devices
A method of forming a semiconductor structure includes providing a semiconductor substrate; forming a gate dielectric over the semiconductor substrate; forming a gate electrode on the gate...
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7488658 |
Stressed semiconductor device structures having granular semiconductor material
A method of fabricating a semiconductor device structure, includes: providing a substrate, providing an electrode on the substrate, forming a recess in the electrode, the recess having an opening,...
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7485925 |
High voltage metal oxide semiconductor transistor and fabricating method thereof
A high voltage MOS transistor including a substrate, a well, a gate insulation layer, a gate, two drift regions, a channel region, a source/drain region and an isolation structure is provided. The...
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7485536 |
Abrupt junction formation by atomic layer epitaxy of in situ delta doped dopant diffusion barriers
A method including forming a channel region between source and drain regions in a substrate, the channel region including a first dopant profile; and forming a barrier layer between the channel...
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7485520 |
Method of manufacturing a body-contacted finfet
A silicon containing fin is formed on a semiconductor substrate. A silicon oxide layer is formed around the bottom of the silicon containing fin. A gate dielectric is formed on the silicon...
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7482226 |
Semiconductor memory device
A drain ( 7 ) includes a lightly-doped shallow impurity region ( 7 a ) aligned with a control gate ( 5 ), and a heavily-doped deep impurity region ( 7 b ) aligned with a sidewall film ( 8 ) and...
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7482218 |
Low-capacitance input/output and electrostatic discharge circuit for protecting an integrated circuit from electrostatic discharge
A transistor formed on a semiconductor substrate of a first conductivity type in a well formed in the substrate and doped with the first conductivity type to an impurity level higher than that of...
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7482212 |
Semiconductor device and manufacturing method thereof
A method of manufacturing a semiconductor device including forming a trench on a first surface of a silicon substrate, forming a thermal oxide layer and a deposited oxide layer on the trench and...
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7482210 |
Method of fabricating semiconductor device having junction isolation insulating layer
A semiconductor device and a method for fabricating the same are provided. The provided semiconductor device includes a field oxide layer formed in a semiconductor substrate to define an active...
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7479437 |
Method to reduce contact resistance on thin silicon-on-insulator device
A method of reducing contact resistance on a silicon-on-insulator includes exposing sidewalls and a portion of a top surface of a source/drain region of the device, forming a porous silicon layer...
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7479433 |
Method for manufacturing semiconductor device
A method of manufacturing a semiconductor device includes depositing a mask material to be patterned into a desired target pattern on an underlying material; patterning the mask material into a...
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7473607 |
Method of manufacturing a multi-workfunction gates for a CMOS circuit
A method of manufacturing a device includes doping a low voltage threshold area and a high voltage threshold area. Gate structures are formed over the low voltage threshold and high voltage...
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7473606 |
Method for fabricating metal-oxide semiconductor transistors
A method for fabricating a metal-oxide semiconductor transistor is disclosed. First, a semiconductor substrate having a gate structure thereon is provided, and a spacer is formed around the gate...
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