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7625800 Method of fabricating MOS transistor  
A method for fabricating a MOS transistor is suitable for modifying the configuration of a gate electrode. The method includes coating a first oxide layer on a semiconductor substrate and removing...
7615454 Embedded stressed nitride liners for CMOS performance improvement  
The present invention provides a semiconducting device including a gate region positioned on a mesa portion of a substrate; and a nitride liner positioned on the gate region and recessed surfaces...
7611936 Method to control uniformity/composition of metal electrodes, silicides on topography and devices using this method  
A method for depositing metals on surfaces is provided which comprises (a) providing a substrate ( 103 ) having a horizontal surface ( 107 ) and a vertical surface ( 105 ); (b) depositing a first...
7605030 Hafnium tantalum oxynitride high-k dielectric and metal gates  
Electronic apparatus and methods may include a hafnium tantalum oxynitride film on a substrate for use in a variety of electronic systems. The hafnium tantalum oxynitride film may be structured as...
7605087 Methods of forming semiconductor devices using di-block polymer layers  
A method of forming a semiconductor device is provided. An interlayer dielectric is formed on a substrate. A di-block polymer layer that includes a plurality of first polymer blocks and a plurality...
7601599 Semiconductor device and method for manufacturing the same  
A method for manufacturing a semiconductor device includes the steps of (a) forming a first insulating film pattern, which has a first portion and a second portion separated from the first portion...
7598536 Semiconductor device having load resistor and method of fabricating the same  
A semiconductor device includes a semiconductor substrate having a resistor region, an isolation layer disposed in the resistor region, the isolation layer defining active regions, first conductive...
7588982 Methods of forming semiconductor constructions and flash memory cells  
Some embodiments include methods of forming flash memory cells and semiconductor constructions, and some embodiments include semiconductor constructions. Some embodiments may include a method in...
7569455 Manufacturing method of semiconductor device  
A manufacturing method of a CMOS semiconductor device includes using, in an nMOS, spike RTA (first annealing) together with ultra-rapid rising/falling temperature annealing (second annealing) whose...
7569437 Formation of transistor having a strained channel region including a performance enhancing material composition utilizing a mask pattern  
By forming a semiconductor alloy in a silicon-based active semiconductor region prior to the gate patterning, material characteristics of the semiconductor alloy itself may also be exploited in...
7566603 Method for manufacturing semiconductor device having metal silicide layer  
A method for manufacturing a semiconductor device having a metal silicide layer comprises forming a structure including a plurality of gate stacks formed on a semiconductor substrate, forming a...
7566624 Method for the production of transistor structures with LDD  
A method for producing a transistor structure with a lightly doped drain (LDD) includes structuring a gate electrode on a gate dielectric. The method also includes etching the semiconductor body or...
7560326 Silicon/silcion germaninum/silicon body device with embedded carbon dopant  
A semiconductor structure and method of manufacturing a semiconductor device, and more particularly, an NFET device. The devices includes a stress receiving layer provided over a stress inducing...
7560776 Semiconductor device, electronic apparatus, method of manufacturing semiconductor device, and method of manufacturing electronic apparatus  
A semiconductor device includes first and second electrodes disposed apart from each other on a substrate, a gate electrode disposed so as to face the first and second electrodes and to cover at...
7557023 Implantation of gate regions in semiconductor device fabrication  
A semiconductor fabrication method. The method includes providing a semiconductor structure which includes (i) a semiconductor layer, (ii) a gate dielectric layer on the semiconductor layer, and...
7550337 Dual gate dielectric SRAM  
An SRAM cell structure containing a PFET gate dielectric having a thicker effective oxide thickness (EOT) than an NFET gate dielectric and methods of manufacturing the same is provided. The PFET...
7550356 Method of fabricating strained-silicon transistors  
A method of fabricating strained-silicon transistors includes providing a semiconductor substrate, in which the semiconductor substrate includes a gate, at least a spacer, and a source/drain...
7544575 Dual metal silicide scheme using a dual spacer process  
A semiconductor process and apparatus provide a polysilicon structure ( 10 ) and source/drain regions ( 12, 14 ) formed adjacent thereto in which a dual silicide scheme is used to form first...
7545023 Semiconductor transistor  
A semiconductor transistor includes a substrate, a gate insulating layer positioned on the surface of the substrate, a gate positioned on the gate insulating layer, a channel region positioned in...
7537981 Silicon on insulator device and method of manufacturing the same  
An isolated semiconductor device and method for producing the isolated semiconductor device in which the device includes a silicon-on-insulator (SOI) device formed on a substrate. A dielectric film...
7537990 Method of manufacturing semiconductor devices  
A method of manufacturing semiconductor devices includes: preparing a semiconductor substrate over which a laminated structure including an insulating layer is formed; forming over the insulating...
7534665 Method of manufacturing semiconductor device  
In a semiconductor device manufacturing method of the present invention, a polysilicon film and a silicon nitride film are deposited on an upper surface of an epitaxial layer. Patterning is...
7531373 Methods of forming a conductive interconnect in a pixel of an imager and in other integrated circuitry  
A method of forming conductive interconnects includes forming a node of a circuit component on a substrate. A conductive metal line is formed at a first metal routing level that is elevationally...
7524695 Image sensor and pixel having an optimized floating diffusion  
An active pixel includes a a photosensitive element formed in a semiconductor substrate. A transfer transistor is formed between the photosensitive element and a floating diffusion and selectively...
7521316 Methods of forming gate structures for semiconductor devices  
Methods of forming a semiconductor device may include forming a tunnel oxide layer on a semiconductor substrate, forming a gate structure on the tunnel oxide layer, forming a leakage barrier oxide,...
7498602 Protecting silicon germanium sidewall with silicon for strained silicon/silicon mosfets  
Raised Si/SiGe source and drain regions include epitaxially grown silicon on SiGe sidewalls. The epi silicon prevents adverse effects of Ge during silicidation, including Ge out diffusion and...
7494871 Semiconductor memory devices and methods for forming the same  
A semiconductor memory device can include select transistors and cell transistors on a semiconductor substrate. An insulation layer covers the select transistors and the cell transistors. The bit...
7491595 Creating high voltage FETs with low voltage process  
An integrated circuit (IC) includes a high voltage first-conductivity type field effect transistor (HV-first-conductivity FET) and a high voltage second-type field effect transistor...
7488658 Stressed semiconductor device structures having granular semiconductor material  
A method of fabricating a semiconductor device structure, includes: providing a substrate, providing an electrode on the substrate, forming a recess in the electrode, the recess having an opening,...
7485520 Method of manufacturing a body-contacted finfet  
A silicon containing fin is formed on a semiconductor substrate. A silicon oxide layer is formed around the bottom of the silicon containing fin. A gate dielectric is formed on the silicon...
7482210 Method of fabricating semiconductor device having junction isolation insulating layer  
A semiconductor device and a method for fabricating the same are provided. The provided semiconductor device includes a field oxide layer formed in a semiconductor substrate to define an active...
7479432 CMOS transistor junction regions formed by a CVD etching and deposition sequence  
This invention adds to the art of replacement source-drain cMOS transistors. Processes may involve etching a recess in the substrate material using one equipment set, then performing deposition in...
7479422 Semiconductor device with stressors and method therefor  
A method for forming a semiconductor device includes providing a substrate region having a first material and a second material overlying the first material, wherein the first material has a...
7473975 Fully silicided metal gate semiconductor device structure  
A method for forming a semiconductor device structure, comprising the steps of independently forming source/drain surface metal silicide layers and a fully silicided metal gate in a polysilicon...
7473593 Semiconductor transistors with expanded top portions of gates  
A method for forming a semiconductor transistor with an expanded top portion of a gate The gate is expanded through implanting atoms in the top portion of transistor's gate electrode region. The...
7465953 Positioning of nanoparticles and fabrication of single election devices  
The present invention includes single electron structures and devices comprising a substrate having an upper surface, one or more dielectric layers formed on the upper surface of the substrate and...
7465635 Method for manufacturing a gate sidewall spacer using an energy beam treatment  
The present invention provides a method for manufacturing a semiconductor device. The method for manufacturing the semiconductor device, among other steps, may include forming a gate structure over...
7465616 Method of forming a field effect transistor  
In one implementation, a method of forming a field effect transistor includes etching an opening into source/drain area of a semiconductor substrate. The opening has a base comprising...
7452777 Self-aligned trench MOSFET structure and method of manufacture  
A trench gate FET is formed as follows. A well region is formed in a silicon region. A plurality of active gate trenches and a termination trench are simultaneously formed in an active region and a...
7439143 Flash memory device and method of manufacturing the same  
Disclosed is a flash memory device. The flash memory device includes a plurality of trench lines in an isolation region of a semiconductor device, a common source region along a word line (WL)...
7435659 Method for manufacturing a semiconductor device having an alignment feature formed using an N-type dopant and a wet oxidation process  
The present invention provides a method for manufacturing a semiconductor device having an alignment feature. The method for manufacturing the semiconductor device, among other steps, may include...
7429517 CMOS transistor using high stress liner layer  
A MOS transistor structure comprising a gate dielectric layer ( 30 ), a gate electrode ( 40 ), and source and drain regions ( 70 ) are formed in a semiconductor substrate ( 10 ). First second and...
7425490 Reducing reactions between polysilicon gate electrodes and high dielectric constant gate dielectrics  
In a metal gate replacement process, a gate electrode stack may be formed of a dielectric covered by a sacrificial metal layer covered by a polysilicon gate electrode. In subsequent processing of...
7422949 High voltage transistor and method of manufacturing the same  
The present invention relates to a high voltage transistor and method of manufacturing the same. The high voltage transistor includes: a channel region which is formed in a semiconductor substrate;...
7419892 Semiconductor devices including implanted regions and protective layers and methods of forming the same  
Methods of forming a semiconductor device include forming a protective layer on a semiconductor layer, implanting ions having a first conductivity type through the protective layer into the...
7413956 Semiconductor device manufacturing method  
Disclosed are a semiconductor device and a method for manufacturing the same. The semiconductor device includes a semiconductor substrate, in which active and inactive regions are separated by a...
7405130 Method of manufacturing a semiconductor device with a notched gate electrode  
A silicon nitride film having a thickness of 3 nm or less is formed on the surfaces of a P-well and N-well, as well as on the upper and side surfaces of a gate electrode, in which the silicon...
7405131 Method and structure to prevent silicide strapping of source/drain to body in semiconductor devices with source/drain stressor  
The example embodiments disclose devices and methods to prevent silicide strapping of the Source/Drain to Body in semiconductor devices with S/D stressor. We provide isolation regions in the...
7402451 Optimized transistor for imager device  
An imager device that has mitigated dark current leakage and punch-through protection. The transistor associated with the photoconversion device is formed with a single (i.e, one-sided) active area...
7384852 Sub-lithographic gate length transistor using self-assembling polymers  
A semiconductor structure including at least one transistor located on a surface of a semiconductor substrate, wherein the at least one transistor has a sub-lithographic channel length, is...
Matches 1 - 50 out of 482 1 2 3 4 5 6 7 8 9 10 >