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7622356 Method of fabricating metal oxide semiconductor field effect transistor  
There are provided a method for fabricating a MOSFET. The method includes: substrate, forming a semiconductor substrate, a germanium layer by implanting germanium (Ge) ions into a semiconductor...
7550355 Low-leakage transistor and manufacturing method thereof  
A boron ion stream may be used to implant ions, such as boron ions, into the sidewalls of an active area, such as an NFET active area. The boron ion stream has both vertical tilt and horizontal...
7508032 High voltage device with low on-resistance  
A high-voltage transistor device has a first well region with a first conductivity type in a semiconductor substrate, and a second well region with a second conductivity type in the semiconductor...
7498636 Semiconductor device and method of manufacturing the same  
Variations in characteristics of transistors and a deterioration of a gate oxide film are reduced in a WP step. A method of manufacturing a semiconductor device of the present invention includes...
7494883 Semiconductor device having a trench isolation and method of fabricating the same  
The present invention provides a method of fabricating a semiconductor device in which deterioration in a transistor characteristic is prevented by preventing a channel stop implantation layer from...
7491614 Methods for forming channel stop for deep trench isolation prior to deep trench etch  
Methods of manufacturing a semiconductor structure are disclosed including a deep trench isolation in which a channel stop is formed in the form of an embedded impurity region in the substrate...
7429505 Method of fabricating fin field effect transistor using isotropic etching technique  
Methods of fabricating a fin field effect transistor (FinFET) are disclosed. Embodiments of the invention provide methods of fabricating FinFETs by optimizing a method for forming the fin so that a...
7425752 Semiconductor device channel termination  
A semiconductor device has a channel termination region for using a trench ( 30 ) filled with field oxide ( 32 ) and a channel stopper ring ( 18 ) which extends from the first major surface ( 8 )...
7416930 Method for producing an oxide confined semiconductor laser  
A method for producing an oxide confined semiconductor laser uses a dual platform to synchronously produce a light emitting active area and a wire bonding area on a semiconductor material and use a...
7250340 Method of fabricating programmable structure including discontinuous storage elements and spacer control gates in a trench  
A method of fabricating a semiconductor storage cell that includes first and second source/drain regions underlying first and second trenches defined in a semiconductor substrate. Sidewalls of the...
7247569 Ultra-thin Si MOSFET device structure and method of manufacture  
The present invention comprises a method for forming an ultra-thin channel MOSFET and the ultra-thin channel MOSFET produced therefrom. Specifically, the method comprises providing an SOI substrate...
7238563 Semiconductor device having isolation region and method of manufacturing the same  
A trench isolation region is formed in a surface region of a semiconductor substrate to form a MOS type element region. A mask layer having an opening portion is formed on the semiconductor layer,...
7235460 Method of forming active and isolation areas with split active patterning  
A process for forming isolation and active regions, wherein the patterning of an oxidation-barrier active stack is performed separately in the PMOS and NMOS regions. After the active stack is in...
7221035 Semiconductor structure avoiding poly stringer formation  
The present invention discloses a semiconductor structure avoiding the poly stringer formation in semiconductor processing. A semiconductor device is divided into a memory cell area and a...
7214591 Method of fabricating high-voltage MOS device  
A HV-MOS device is described, including a substrate, a gate dielectric layer and a gate, a channel region, two doped regions as a source and a drain, a field isolation layer between the gate and at...
7211482 Method of forming a memory cell having self-aligned contact regions  
A memory cell of a semiconductor device and a method for forming the same, wherein the memory cell includes a substrate having active regions and field regions, a gate layer formed over the...
7208381 Doping mask and methods of manufacturing charge transfer image device and microelectronic device using the same  
Provided are a doping mask and methods of manufacturing a charge transfer image device and a microelectronic device using the same. The method includes forming a photoresist film on an entire...
7195982 Method for manufacturing anti-punch through semiconductor device  
A method for manufacturing an anti-punch through semiconductor device is described. The method is applied to a substrate having a plurality of device isolation structures in parallel arrangements...
7166515 Implanted hidden interconnections in a semiconductor device for preventing reverse engineering  
A camouflaged interconnection for interconnecting two spaced-apart regions of a common conductivity type in an integrated circuit or device and a method of forming same. The camouflaged...
7153733 Method of fabricating fin field effect transistor using isotropic etching technique  
Methods of fabricating a fin field effect transistor (FinFET) are disclosed. Embodiments of the invention provide methods of fabricating FinFETs by optimizing a method for forming the fin so that a...
7154177 Semiconductor device with edge structure  
A semiconductor device has an edge termination region ( 15 ) having a plurality of trenches ( 17 ). Conductive material ( 20 ) and insulating material ( 19 ) is formed at the trenches, and surface...
7105389 Method of manufacturing semiconductor device having impurity region under isolation region  
In formation of a source/drain region of an NMOS transistor, a gate-directional extension region < 41 a > of an N + block region < 41> in an N + block resist film < 51 <...
7091560 Method and structure to decrease area capacitance within a buried insulator device  
Method and structure to decrease area capacitance within a buried insulator device structure are disclosed. A portion of the substrate layer of a buried insulator structure opposite the insulator...
6953738 Method and apparatus for forming an SOI body-contacted transistor  
A method for forming a silicon-on-insulator transistor ( 80 ) includes forming an active region ( 82 ) overlying an insulating layer ( 122 ), wherein a portion of the active region provides an...
6921701 Method of manufacturing and structure of semiconductor device (DEMOS) with field oxide structure  
A method of forming a semiconductor device includes forming a body region of a semiconductor substrate and forming a drift region adjacent at least a portion of the body region. A dopant is used to...
6917077 Protection diode for improved ruggedness of a radio frequency power transistor and self-defining method to manufacture such protection diode  
A semiconductor arrangement including: a substrate having a substrate layer ( 13 ) with an upper and lower surface, the substrate layer ( 13 ) being of a first conductivity type; a first...
6884686 Method of manufacturing and structure of semiconductor device with floating ring structure  
A high voltage semiconductor device includes a drain region disposed within a semiconductor substrate. The semiconductor device further includes a field oxide layer disposed outwardly from the...
6867104 Method to form a structure to decrease area capacitance within a buried insulator device  
Method to form a structure to decrease area capacitance within a buried insulator device structure is disclosed. A portion of the substrate layer of a buried insulator structure opposite the...
6852599 Method for fabricating MOS transistors  
A method for fabricating a metal oxide semiconductor (MOS) transistor, which can reduce the junction capacitance without degradation of transistor characteristics including forming a buffer oxide...
6821858 Semiconductor devices and methods for manufacturing the same  
Certain embodiments relate to semiconductor devices having an improved dielectric strength and methods for manufacturing the same. A semiconductor device 1000 may have a field effect transistor ...
6770517 Semiconductor device and method for fabricating the same  
In a silicon layer formed on an insulator layer, a lattice defect region is formed to be adjacent to a channel region and source/drain regions, and the lower part of the channel region functions as...
6762103 Method of forming an isolation film in a semiconductor device  
Disclosed is a method of forming an isolation film in semiconductor devices using a shallow trench. Trenches are formed in silicon substrates of a memory cell region and a peripheral circuit...
6682976 Method for manufacturing a nonvolatile semiconductor memory device  
A method for manufacturing a semiconductor memory device includes forming an isolation layer adjacent a diffusion region over a substrate that also has a stacked gate region. A gate oxide layer is...
6673660 Method of manufacturing semiconductor element  
According to the present invention, a semiconductor device to use a SOI substrate performing insulation by a LOCOS method in which an oxide resistivety film provided on a silicon layer is used,...
6660595 Implantation method for simultaneously implanting in one region and blocking the implant in another region  
A method of fabricating different transistor structures with the same mask. A masking layer ( 214 ) has two openings ( 204, 202 ) that expose two transistor areas ( 304,302 ). The width of the...
6649481 Methods of fabricating a semiconductor device structure for manufacturing high-density and high-performance integrated-circuits  
The invention discloses methods of fabricating a semiconductor device structure having low source/drain junction capacitances and low junction leakage currents. The low source/drain junction...
6617217 Reduction in well implant channeling and resulting latchup characteristics in shallow trench isolation by implanting wells through nitride  
Retrograde wells are formed by implanting through nitride films ( 40 ). Nitride films ( 40 ) are formed after STI ( 20 ) formation. By selectively masking a portion of the wafer with photoresist (...
6611027 Protection transistor with improved edge structure  
A metal-oxide-semiconductor protection transistor is formed in an active region of a semiconductor layer. The active region includes source and drain diffusion layers, which may be partly...
6583018 Method of ion implantation  
An ion implantation method which can accurately control the effective dose amount even in ion implantation at a very low energy. This ion implantation method comprises the steps of carrying out...
6576957 Etch-stopped SOI back-gate contact  
The buried oxide region has a layer added which etches selectively with respect to oxide, allowing the contacts to a gate or to a back gate to be created without overetching into the buried oxide...
6562697 Methods of implanting ions into different active areas to provide active areas having increased ion concentrations adjacent to isolation structures  
Active areas of integrated circuits can be formed by implanting first ions into a first active area of a substrate adjacent to an isolation structure in the substrate and between a source and a...
6537888 Method for fabricating a semiconductor device reducing junction leakage current and narrow width effect  
A semiconductor device for reducing junction leakage current and mitigating the narrow width effect, and a fabrication method thereof, are provided. The semiconductor device includes a...
6531355 LDMOS device with self-aligned RESURF region and method of fabrication  
A RESURF LDMOS transistor ( 64 ) includes a RESURF region ( 42 ) that is self-aligned to a LOCOS field oxide region ( 44 ). The self-alignment produces a stable breakdown voltage BVdss by...
6500723 Method for forming a well under isolation and structure thereof  
A number of small wells under the isolation layer are formed using the same mask made of photoresist and implant step that is used for the regular wells. The small wells are formed close enough...
6489657 Semiconductor device with improved channel stopper  
A semiconductor device comprising a high withstand voltage MOS transistor of an offset drain/offset source structure easing a high electric field generated between a channel and a parasitic channel...
6482718 Method of manufacturing semiconductor device  
A method of manufacturing a semiconductor device is provided which, even if device dimensions decrease, prevents degradation in the operating characteristics of semiconductor elements which are...
6479338 CMOS device and method of manufacturing the same  
A semiconductor substrate having a first conductivity type is first prepared. Then, a well region is formed in the substrate so as to have a second conductivity type opposite to the first...
6472279 Method of manufacturing a channel stop implant in a semiconductor device  
The present invention provides a method of manufacturing a semiconductor device, and a related method manufacturing an integrated circuit. In one embodiment, the method of manufacturing a...
6461921 Semiconductor device having channel stopper portions integrally formed as part of a well  
The work surface of a p-type silicon substrate has a section where an E type MOSFET is formed, and a section where an I type MOSFET having a threshold voltage of about 0.1V is formed. The MOSFET is...
6362035 Channel stop ion implantation method for CMOS integrated circuits  
A method for incorporating an ion implanted channel stop layer under field isolation for a twin-well CMOS process is described in which the layer is placed directly under the completed field...
Matches 1 - 50 out of 252 1 2 3 4 5 6 >