|
Match
|
Document |
Document Title |
|
|
6797587 |
Active region corner implantation method for fabricating a semiconductor integrated circuit microelectronic fabrication
Within a method for forming an isolation region within a semiconductor substrate, there is, prior to forming the isolation region within an isolation trench formed adjoining an active region of a...
|
|
|
6764922 |
Method of formation of an oxynitride shallow trench isolation
An oxynitride material is used to form shallow trench isolation regions in an integrated circuit structure. The oxynitride may be used for both the trench liner and trench fill material. The...
|
|
|
6762103 |
Method of forming an isolation film in a semiconductor device
Disclosed is a method of forming an isolation film in semiconductor devices using a shallow trench. Trenches are formed in silicon substrates of a memory cell region and a peripheral circuit...
|
|
|
6762104 |
Method for fabricating semiconductor device with improved refresh characteristics
Disclosed is a method for fabricating a semiconductor device wherein boron-halo ion implantation is performed only to a bit-line contact part while masking a storage node contact part. The method...
|
|
|
6750107 |
Method and apparatus for isolating a SRAM cell
A static random access memory cell comprising a first inverter including a first p-channel pullup transistor, and a first n-channel pulldown transistor in series with the first p-channel pullup...
|
|
|
6750066 |
Precision high-K intergate dielectric layer
A semiconductor device which includes a precision high-K dielectric and formed on a semiconductor substrate and a method of forming the same. The semiconductor device includes at least one...
|
|
|
6746908 |
Temperature controlling method, thermal treating apparatus, and method of manufacturing semiconductor device
A temperature control method is provided which is capable of performing quick, accurate, and error-free soaking control over all wafer areas to be thermally treated at a target temperature without...
|
|
|
6734524 |
Electronic component and method of manufacturing same
An electronic component includes a semiconductor substrate ( 110 ), an epitaxial semiconductor layer ( 120, 221, 222 ) over the semiconductor substrate, and a semiconductor region ( 130, 230 ) in...
|
|
|
6709936 |
Narrow high performance MOSFET device design
The present invention provides a narrow/short high performance MOS device structure that includes a rectangular-shaped semiconductor substrate region having a first conductivity type. A region of...
|
|
|
6693341 |
Semiconductor device
When an element isolation film is formed by the LOCOS technique, as an underlying buffer layer of an oxidation resisting film, a pad oxidation film and pad poly-Si film are used. When an element is...
|
|
|
6682976 |
Method for manufacturing a nonvolatile semiconductor memory device
A method for manufacturing a semiconductor memory device includes forming an isolation layer adjacent a diffusion region over a substrate that also has a stacked gate region. A gate oxide layer is...
|
|
|
6670260 |
Transistor with local insulator structure
A thin filmed fully-depleted silicon-on-insulator (SOI) metal oxide semiconductor field defect transistor (MOSFET) utilizes a local insulation structure. The local insulative structure includes a...
|
|
|
6660620 |
Method of forming noble metal pattern
A process for high resolution patterning of noble metals, such as platinum, for forming various semiconductor devices, such as capacitors or wiring patterns, is disclosed. A layer of noble metal,...
|
|
|
6656806 |
SOI structure and method of producing same
A Silicon On Insulator (SOI) structure and method of producing an SOI structure that can prevent a short circuit between a Local Inter-Connect (LIC) and a well in the SOI structure is disclosed....
|
|
|
6656795 |
Method of manufacturing semiconductor memory element
A method of manufacturing a semiconductor memory element is disclosed. The method includes arranging a mask on the upper surface of a semiconductor substrate, using the mask to conduct exposure,...
|
|
|
6613632 |
Fabrication method for a silicon nitride read-only memory
A fabrication method for a read-only memory with a silicon nitride floating gate is provided. A first oxide layer and a silicon nitride layer are sequentially formed on a substrate. The silicon...
|
|
|
6596584 |
Method for fabricating a self-aligned source line flash memory device
A method for fabricating a flash memory device having a self-aligned source includes providing a semiconductor substrate having a source region separated from a drain region by a channel region....
|
|
|
6579769 |
Semiconductor device manufacturing method including forming FOX with dual oxidation
In a method of manufacturing a semiconductor device, there are comprised the steps of forming an oxidation preventing layer on a surface of a semiconductor substrate, forming a first window in the...
|
|
|
6579767 |
Method for forming aluminum oxide as a gate dielectric
A method for forming a gate structure begins by preparing a semiconductor substrate provided with an isolation region formed therein. A thin SiO 2 layer is thermally grown on top of the...
|
|
|
6579777 |
Method of forming local oxidation with sloped silicon recess
A method of forming a localized oxidation having reduced bird's beak encroachment in a semiconductor device by providing an opening in the silicon substrate that has sloped sidewalls with a taper...
|
|
|
6576957 |
Etch-stopped SOI back-gate contact
The buried oxide region has a layer added which etches selectively with respect to oxide, allowing the contacts to a gate or to a back gate to be created without overetching into the buried oxide...
|
|
|
6566207 |
Semiconductor device fabricating method
A method of fabricating a semiconductor device in which a LOCOS profile characteristic is applied to a normal shallow trench isolation (STI) structure thereby lowering compressive stress that is...
|
|
|
6562723 |
Hybrid stack method for patterning source/drain areas
A method of manufacturing an integrated circuit which reduces damage to the underlying base layer and the created oxide structures is disclosed herein. The method includes providing a hybrid stack...
|
|
|
6534401 |
Method for selectively oxidizing a silicon/metal composite film stack
A method of selectively oxidizing a composite film. According to the present invention a substrate of having a composite film comprising of lower silicon film, a barrier layer, and upper metal film...
|
|
|
6534352 |
Method for fabricating a MOSFET device
Disclosed is a MOSFET fabrication method capable of forming an ultra shallow junction while ensuring stability in controlling threshold voltage. The disclosed method relies on the use of a...
|
|
|
6514828 |
Method of fabricating a highly reliable gate oxide
An ultra-thin gate oxide layer of hafnium oxide (HfO 2 ) and a method of formation are disclosed. The ultra-thin gate oxide layer of hafnium oxide (HfO 2 ) is formed by a two-step process. A thin...
|
|
|
6514834 |
Method of manufacturing a semiconductor device having a low leakage current
A field oxide film is provided in the surface of a semiconductor substrate. An interlayer insulating film is provided on the semiconductor substrate so as to cover an active layer. A contact hole...
|
|
|
6509234 |
Method of fabricating an ultra-thin fully depleted SOI device with T-shaped gate
A method of forming a fully depleted semiconductor-on-insulator (SOI) field effect transistor (FET). The method includes forming a T-shaped gate electrode formed at least in part in a recess formed...
|
|
|
6489205 |
Semiconductor device and method for manufacturing the same
There is described a method for manufacturing a semiconductor device, in which an isolation oxide film having a superior dimensional accuracy and an isolation oxide film of a high withstanding...
|
|
|
6486034 |
Method of forming LDMOS device with double N-layering
The tradeoff between breakdown voltage and on-resistance for LDMOS devices has been improved by having two epitaxial N− regions instead of the single epitaxial N− region that is used by devices...
|
|
|
6482718 |
Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device is provided which, even if device dimensions decrease, prevents degradation in the operating characteristics of semiconductor elements which are...
|
|
|
6472277 |
Method for fabricating a semiconductor device with an improved short channel effect
A semiconductor device includes a semiconductor substrate having a trench in its surface, an insulating film in the trench, a doped conductive layer on the insulating film, a gate insulation film...
|
|
|
6468870 |
Method of fabricating a LDMOS transistor
A method of manufacturing a LDHOS transistor having a dielectric block under the gate electrode. A high voltage well, low voltage well (LV PW), and field oxide regions having bird beaks are...
|
|
|
6420224 |
Stepper alignment mark formation with dual field oxide process
A semiconductor photomask set for producing wafer alignment accuracy in a semiconductor fabrication process. The photomask set produces an alignment mark that is accurate for subsequent fabrication...
|
|
|
6399462 |
Method and structure for isolating integrated circuit components and/or semiconductor active devices
A method of forming a field oxide or isolation region in a semiconductor die. A nitride layer (over an oxide layer disposed over a substrate) is patterned and subsequently etched so that the...
|
|
|
6396113 |
Active trench isolation structure to prevent punch-through and junction leakage
A semiconductor device capable of controlling an electric potential of an electric conductor to reduce both a leakage caused by a punch-through and a junction leakage in a trench isolating...
|
|
|
6380018 |
Semiconductor device and method for the production thereof
A semiconductor device having two or more types of separation oxide film are formed on the substrate of the semiconductor device by different methods so as to correspond with element types formed...
|
|
|
6368916 |
Method for fabricating nonvolatile semiconductor memory device
The method for fabricating a nonvolatile semiconductor memory device comprises the step of forming an insulation film 14 on a semiconductor substrate 10 ; the step of introducing an impurity...
|
|
|
6365457 |
Method for manufacturing nonvolatile memory device using self-aligned source process
There is provided a method for manufacturing a nonvolatile memory device using a self-aligned source (SAS) process. The method has the steps of forming a field oxide film on a semiconductor...
|
|
|
6365490 |
Process to improve the flow of oxide during field oxidation by fluorine doping
A method of forming isolation structures in semiconductor substrates comprising exposing a region of the semiconductor simultaneously to a transforming agent and to a viscosity reducing agent so...
|
|
|
6352908 |
Method for reducing nitride residue in a LOCOS isolation area
A method of forming an isolation structure includes the steps of: providing a silicon substrate; forming an upper pad oxide layer superjacent a top surface of the substrate, and a lower pad oxide...
|
|
|
6342431 |
Method for eliminating transfer gate sacrificial oxide
A method of forming a semiconductor device, includes forming a layer of oxide on a semiconductor substrate, forming a layer of silicon nitride on the oxide layer, forming isolation regions in the...
|
|
|
6319795 |
Method for fabricating VLSI devices having trench isolation regions
A process for fabricating a VLSI device comprising trench isolation regions. The trench isolation regions of a VLSI device is fabricated by a process comprising the following steps: Depositing and...
|
|
|
6309949 |
Semiconductor isolation process to minimize weak oxide problems
A process for forming an isolation region while substantially eliminating weak oxide effects, comprising the steps of obtaining a semiconductor substrate patterned with a plurality of mesas with...
|
|
|
6300220 |
Process for fabricating isolation structure for IC featuring grown and buried field oxide
An isolation structure having both deep and shallow components is formed in a semiconductor workpiece by etching the workpiece to define raised precursor active device regions separated by sunken...
|
|
|
6297129 |
Methods of forming integrated circuitry, and methods of forming dynamic random access memory circuitry
Memory integrated circuitry includes an array of memory cells formed over a semiconductive substrate and occupying area thereover, at least some memory cells of the array being formed in lines of...
|
|
|
6297108 |
Method of forming a high voltage MOS transistor on a semiconductor wafer
The present invention provides a method of forming a doped region with a DDD on a semiconductor wafer. The semiconductor wafer comprises a silicon substrate, a pad oxide layer, and a silicon...
|
|
|
6294817 |
Source/drain-on insulator (S/DOI) field effect transistor using oxidized amorphous silicon and method of fabrication
Source and drain regions of field effect transistors are fabricated with an electrically insulating layer formed thereunder so as to reduce junction capacitance between each and a semiconductor...
|
|
|
6291311 |
Semiconductor device and method for producing same
On the surface of a field oxide film (3 of FIG. 2e) formed-on a substrate region where the effective thickness in the vertical direction of a substrate is diminished due to the presence of a...
|
|
|
6281083 |
Methods of forming field effect transistor gates, and methods of forming integrated circuitry
A method of forming integrated circuitry includes forming a field effect transistor gate over a substrate. The gate comprises semiconductive material conductively doped with a conductivity...
|