Patents in Class 438/296

Matches 51 - 100 out of 641

Match	Document	Document Title
51	7488659	Structure and methods for stress concentrating spacer A stress-concentrating spacer structure is a stack of an upper gate spacer with a low Young's modulus and a lower gate spacer with a high Young's modulus. The stacked spacer structure surrounds the...
52	7485542	Method for producing bit lines for UCP flash memories A semiconductor device can be fabricated by forming a floating gate layer over a semiconductor body. The floating gate layer is at least partially arranged over an insulation region in the...
53	7468302	Method of forming trench type isolation film of semiconductor device A method of forming a trench type isolation film of a semiconductor device, including the steps of sequentially forming a pad oxide film and a nitride film for a hard mask on a semiconductor...
54	7468301	PMOS transistor with increased effective channel length in the peripheral region and a multi-height substrate In manufacturing a PMOS transistor, a semiconductor substrate having an active region and a field region is formed with a hard mask layer, which covers a center portion of the active region on the...
55	7456067	Method with high gapfill capability for semiconductor devices A method of performing an STI gapfill process for semiconductor devices is provided. In a specific embodiment of the invention, the method includes forming an stop layer overlying a substrate. In...
56	7439131	Flash memory device having resistivity measurement pattern and method of forming the same A flash memory device has a resistivity measurement pattern and method of forming the same. A trench is formed in an isolation film in a Self-Aligned Floating Gate (SAFG) scheme. The trench is...
57	7439141	Shallow trench isolation approach for improved STI corner rounding A method for performing shallow trench isolation during semiconductor fabrication that improves trench corner rounding is disclosed. The method includes etching trenches into a silicon substrate...
58	7440255	Capacitor constructions and methods of forming A capacitor construction includes a first electrode and a layer between the first electrode and a surface supporting the capacitor construction. The capacitor construction can exhibit a lower RC...
59	7439139	Fully-depleted castellated gate MOSFET device and method of manufacture thereof A fully depleted castellated-gate MOSFET device is disclosed along with a method of making the same. The device has robust I/O applications, and includes a semiconductor substrate body having an...
60	7435656	Semiconductor device of transistor structure having strained semiconductor layer The semiconductor device comprises a p type Si substrate 10 ; a SiGe buffer layer 12 formed on the p type Si substrate 10 and having element isolation grooves 16 formed in the surface, which...
61	7435654	Analog capacitor having at least three high-k dielectric layers, and method of fabricating the same There are provided an analog capacitor having at least three high-k dielectric layers, and a method of fabricating the same. The analog capacitor includes a lower electrode, an upper electrode, and...
62	7432148	Shallow trench isolation by atomic-level silicon reconstruction Methods of forming an improved shallow trench isolation (STI) region are disclosed. Several exemplary techniques are proposed for treating STI sidewalls to improve the silicon (Si) surface at the...
63	7429512	Method for fabricating flash memory device A method of fabricating a flash memory device. A DDD ion is implanted into a high voltage PMOS transistor and into source and drain junctions of a cell transistor in order to facilitate a pinch-off...
64	7425489	Self-aligned shallow trench isolation A method of making a semiconductor structure includes etching an isolation oxide. The isolation oxide is in a substrate, a gate layer is on the substrate, a patterned metallic layer is on the gate...
65	7422960	Method of forming gate arrays on a partial SOI substrate The invention includes methods for utilizing partial silicon-on-insulator (SOI) technology in combination with fin field effect transistor (finFET) technology to form transistors particularly...
66	7413952	Methods of forming a plurality of circuit components and methods of forming a plurality of structures suspended elevationally above a substrate A plurality of capacitor electrode openings is formed within capacitor electrode-forming material. A first set of the openings is formed to a depth which is greater within the capacitor...
67	7407864	Polysilazane perhydride solution and method of manufacturing a semiconductor device using the same Disclosed is a method of manufacturing a semiconductor device comprising forming an element isolation trench in a semiconductor substrate, coating a polysilazane perhydride solution on the...
68	7402492	Method of manufacturing a memory device having improved erasing characteristics In a method of manufacturing a memory device having improved erasing characteristics, the method includes sequentially forming a tunneling oxide layer, a charge storing layer, and a blocking oxide...
69	7396728	Methods of improving drive currents by employing strain inducing STI liners A method forms a semiconductor device comprising isolation structures that selectively induce strain into active regions of NMOS and PMOS devices. Form a hard mask layer over a semiconductor body....
70	7396729	Methods of forming semiconductor devices having a trench with beveled corners A semiconductor device is formed by providing a substrate. A trench is formed in the substrate. Beveled surfaces are formed at upper portions of sidewalls of the trench opposite a bottom surface of...
71	7393751	Semiconductor structure including laminated isolation region A semiconductor structure and a related method for fabrication thereof include an isolation region located within an isolation trench within a semiconductor substrate. The isolation region...
72	7387929	Capacitor in semiconductor device and method of manufacturing the same The present invention relates to a capacitor in semiconductor device and a method of manufacturing the same, wherein, owing to formation of a lower electrode and an upper electrode into a stack...
73	7384854	Method of forming low capacitance ESD robust diodes A method of forming a diode having a capacitance below 0.1 pF and a breakdown voltage of at least 500V. The method including forming an anode of a first conductivity type and a cathode of a second...
74	7384836	Integrated circuit transistor insulating region fabrication method A transistor of an integrated circuit is provided. A first doped well region is formed in a well layer at a first active region. At least part of the first doped well region is adjacent to a gate...
75	7381625	Deterministic process for constructing nanodevices A method is provided for constructing a nanodevice. The method includes: fabricating an electrode on a substrate; forming a nanogap across the electrode; dispersing a plurality of nanoobjects onto...
76	7381603	Semiconductor structure with improved on resistance and breakdown voltage performance In one embodiment, a lateral FET cell is formed in a body of semiconductor material. The lateral FET cell includes a super junction structure formed in a drift region between a drain contact and a...
77	7374974	Thyristor-based device with trench dielectric material A thyristor-based semiconductor device includes a thyristor body that has at least one region in the substrate and a thyristor control port in a trenched region of the device substrate. According...
78	7371645	Method of manufacturing a field effect transistor device with recessed channel and corner gate device Fabrication of recessed channel array transistors (RCAT) with a corner gate device includes forming pockets between a semiconductor fin that includes a gate groove and neighboring shallow trench...
79	7368353	Trench power MOSFET with reduced gate resistance A method for manufacturing a trench type power semiconductor device which includes process steps for forming proud gate electrodes in order to decrease the resistivity thereof.
80	7368346	Method for forming gate structure in flash memory device Device isolation insulation layers passing through an insulation layer and a substrate, are formed, and a portion of them is removed. The insulation layer is removed. A gate oxide layer and a first...
81	7368401	Integrated circuit having a doped porous dielectric and method of manufacturing the same In one aspect of the invention, a method for forming an integrated circuit having an at least substantially doped porous dielectric includes forming a semiconductor device. The semiconductor device...
82	7364975	Semiconductor device fabrication methods Methods of fabricating semiconductor devices are disclosed. In a preferred embodiment, a method of fabricating a semiconductor device includes providing a workpiece including a plurality of active...
83	7361551	Method for making an integrated circuit having an embedded non-volatile memory A method for forming a portion of a semiconductor device includes: patterning gate stack layers overlying a substrate into a gate stack; implanting dopant ions to form shallow source/drain...
84	7358142	Method for forming a FinFET by a damascene process A device isolation film and an active region are formed on a semiconductor substrate, using a first mask pattern to expose only a formation region of the device isolation film. Only the device...
85	7358144	Method for fabricating semiconductor device A method for fabricating a semiconductor device includes forming first, second, and third device structures in a semiconductor substrate. Each device structure includes a first film, a second film...
86	7354834	Semiconductor devices and methods to form trenches in semiconductor devices Semiconductor devices and methods of fabricating the same are disclosed. One example method may include forming sequentially a pad oxide film and a silicon nitride film on an entire surface of a...
87	7354818	Process for high voltage superjunction termination A method of manufacturing a semiconductor device having an active region and a termination region includes providing a semiconductor substrate having first and second main surfaces opposite to each...
88	7344949	Non-volatile memory device and method of fabricating the same A method of fabricating an a non-volatile memory includes forming trench isolation regions in an inactive region of a semiconductor substrate, adjacent trench isolation regions defining respective...
89	7338870	Methods of fabricating semiconductor devices Methods of recovering damage on a semiconductor device by performing a hydrogen annealing process are disclosed. An example disclosed method includes forming an STI structure on a semiconductor...
90	7338850	Method for manufacturing device isolation film of semiconductor device A method for manufacturing device isolation film of semiconductor device is disclosed. The method utilizes a plasma oxidation of a liner nitride film exposed by etching a liner oxide the film in...
91	7335564	Method for forming device isolation layer of semiconductor device A method for forming a device isolation device of a semiconductor device is disclosed. The method includes the steps of forming a moat pattern for forming a trench on a semiconductor substrate,...
92	7326621	Method of fabricating a recess channel array transistor using a mask layer with a high etch selectivity with respect to a silicon substrate A method of fabricating a recess channel array transistor. Using a mask layer pattern having a high etch selectivity with respect to a silicon substrate, the silicon substrate and an isolation...
93	7323394	Method of producing element separation structure A method of producing an element separation structure includes the steps of: forming a first thermal oxide film on the substrate; forming a silicon nitride film on the first thermal oxide film;...
94	7316958	Masks for fabricating semiconductor devices and methods of forming mask patterns Masks for fabricating a semiconductor device and methods of forming mask patterns are provided which are capable of enhancing the breakdown voltage of the fabricated semiconductor device by...
95	7314803	Method for producing a semiconductor structure In a method for producing a semiconductor structure a semiconductor a substrate with a top surface is provided. A gate dielectric layer is provided on the top surface and on the gate dielectric...
96	7306998	Formation of abrupt junctions in devices by using silicide growth dopant snowplow effect A method of forming an abrupt junction device with a semiconductor substrate is provided. A gate dielectric is formed on a semiconductor substrate, and a gate is formed on the gate dielectric. A...
97	7303962	Fabricating method of CMOS and MOS device A complementary metal-oxide-semiconductor (CMOS) device comprising a substrate, a first type of metal-oxide-semiconductor (MOS) transistor, a second type of MOS transistor, an etching stop layer, a...
98	7303951	Method of manufacturing a trench isolation region in a semiconductor device A method of manufacturing a semiconductor device for preventing dielectric breakdown of gate electrodes attributable to needle-like protrusions caused inside a trench in the step of forming element...
99	7297604	Semiconductor device having dual isolation structure and method of fabricating the same In a semiconductor device having a dual isolation structure, and a method of fabricating the same, an epitaxial layer is formed on the entire surface of the semiconductor device. A device region...
100	7279381	Method for fabricating cell transistor of flash memory A method for fabricating a cell transistor of a flash memory including a device isolation film is disclosed, to prevent the mouse bite and the residue of a gate electrode, which includes the steps...

Matches 51 - 100 out of 641

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