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7625807 Methods and systems to mitigate etch stop clipping for shallow trench isolation fabrication  
The present invention facilitates semiconductor fabrication by maintaining shape and density of an etch stop layer ( 206 ) during trench fill operations. The shape and density of the etch stop...
7608488 Semiconductor memory device and method of manufacturing the same  
A manufacturing method of a semiconductor memory device for manufacturing a first semiconductor device and a second semiconductor device wherein a cell array ratio is smaller than that of the first...
7605028 Method of forming a memory device having a storage transistor  
A memory device and a method of forming the memory device. The memory device comprises a storage transistor at a surface of a substrate comprising a body portion between first and second...
7598590 Semiconductor chip and method for manufacturing the same and semiconductor device  
The semiconductor chip 1 has a semiconductor substrate 10 . In the present embodiment, the semiconductor substrate 10 , which is an SOI substrate, is constituted by comprising a support...
7595253 Method of forming the semiconductor device  
Example embodiments provide a semiconductor device and a method of forming the same. According to the method, a capping insulation pattern may be formed to cover the top surface of a filling...
7588982 Methods of forming semiconductor constructions and flash memory cells  
Some embodiments include methods of forming flash memory cells and semiconductor constructions, and some embodiments include semiconductor constructions. Some embodiments may include a method in...
7585736 Method of manufacturing semiconductor device with regard to film thickness of gate oxide film  
A method of manufacturing a semiconductor device includes steps (a) to (d). The step (a) is a step of forming a first insulating film and a nitride film on a semiconductor substrate in this order....
7576387 MOS transistor and method of manufacturing a MOS transistor  
The MOS transistor ( 1 ) of the invention comprises a gate electrode ( 10 ), a channel region ( 4 ), a drain contact region ( 6 ) and a drain extension region ( 7 ) mutually connecting the channel...
7560775 Transistor and transistor manufacturing method  
In a transistor of the invention, at a boundary between gate oxide 112 formed on a silicon substrate 101 of a device formation region 10 and a device isolation film 110 adjoining the gate...
7557395 Trench MOSFET technology for DC-DC converter applications  
A trench power semiconductor device including a recessed termination structure.
7550355 Low-leakage transistor and manufacturing method thereof  
A boron ion stream may be used to implant ions, such as boron ions, into the sidewalls of an active area, such as an NFET active area. The boron ion stream has both vertical tilt and horizontal...
7541636 Memory cell comprising one MOS transistor with an isolated body having a reinforced memory effect  
A memory cell with one transistor on a floating body region isolated by its lower surface by a junction. According to the present invention, the junction is non-planar and, for example, includes a...
7541247 Guard ring structures for high voltage CMOS/low voltage CMOS technology using LDMOS (lateral double-diffused metal oxide semiconductor) device fabrication  
A semiconductor structure and a method for forming the same. The method includes providing a semiconductor structure. The semiconductor structure includes a semiconductor substrate. The method...
7541240 Integration process flow for flash devices with low gap fill aspect ratio  
A non-volatile memory is formed having shallow trench isolation structures between floating gates and having control gates extending between floating gates where shallow trench isolation dielectric...
7541233 Semiconductor device and method of manufacturing the same  
A semiconductor device comprises a semiconductor substrate, and a non-volatile memory cell provided on the semiconductor substrate, the non-volatile memory cell comprising a tunnel insulating film...
7537985 Double gate isolation  
A double-gated fin-type field effect transistor (FinFET) structure has electrically isolated gates. In a method for manufacturing the FinFET structure, a fin, having a gate dielectric on each...
7534687 Semiconductor device and method for manufacturing the same  
A semiconductor device, comprises: a transistor having structured to include a gate electrode formed on a semiconductor layer on a semiconductor substrate via a gate insulating film, and a source...
7528033 Semiconductor device with a dummy gate and a method of manufacturing a semiconductor device with a dummy gate  
A dummy gate may be formed over an isolation layer. A sidewall spacer may be formed next to the dummy gate. The dummy gate and the sidewall spacer may substantially cover or completely cover the...
7514334 Thin film plate phase change RAM circuit and manufacturing method  
A memory device comprising a access circuits, an electrode layer over the access circuits, an array of phase change memory bridges over the electrode layer, and a plurality of bit lines over the...
7510926 Technique for providing stress sources in MOS transistors in close proximity to a channel region  
A strained semiconductor material may be positioned in close proximity to the channel region of a transistor, such as an SOI transistor, while reducing or avoiding undue relaxation effects of metal...
7498233 Method of forming an insulation layer structure having a concave surface and method of manufacturing a memory device using the same  
A method of forming an isolation layer structure for a semiconductor device includes forming a first structure on a substrate, the first structure including an insulation layer pattern having a...
7488659 Structure and methods for stress concentrating spacer  
A stress-concentrating spacer structure is a stack of an upper gate spacer with a low Young's modulus and a lower gate spacer with a high Young's modulus. The stacked spacer structure surrounds the...
7479445 Methods of forming field effect transistors having t-shaped gate electrodes using carbon-based etching masks  
Methods of forming field effect transistors include forming a first electrically insulating layer comprising mostly carbon on a surface of a semiconductor substrate and patterning the first...
7468301 PMOS transistor with increased effective channel length in the peripheral region and a multi-height substrate  
In manufacturing a PMOS transistor, a semiconductor substrate having an active region and a field region is formed with a hard mask layer, which covers a center portion of the active region on the...
7462544 Methods for fabricating transistors having trench gates  
A transistor including an active region and methods thereof. The active region may include corners with at least one of a rectangular, curved or rounded shape. The methods may include isotropically...
7446012 Lateral PNP transistor and the method of manufacturing the same  
The present invention relates to a lateral PNP transistor and the method of manufacturing the same. The medium doping N-type base area and the light doping P − collector area were first...
7439131 Flash memory device having resistivity measurement pattern and method of forming the same  
A flash memory device has a resistivity measurement pattern and method of forming the same. A trench is formed in an isolation film in a Self-Aligned Floating Gate (SAFG) scheme. The trench is...
7436030 Strained MOSFETs on separated silicon layers  
A method of fabricating and a structure of an IC incorporating strained MOSFETs on separated silicon layers are disclosed. N-channel field effect transistors (nFET) and P-channel FETs (pFET) are...
7432163 Method of manufacturing semiconductor device that includes forming adjacent field regions with a separating region therebetween  
A method of manufacturing a semiconductor device comprises the steps of: preparing a semiconductor substrate, the semiconductor substrate having first and second predetermined regions; forming a...
7384836 Integrated circuit transistor insulating region fabrication method  
A transistor of an integrated circuit is provided. A first doped well region is formed in a well layer at a first active region. At least part of the first doped well region is adjacent to a gate...
7361540 Method of reducing noise disturbing a signal in an electronic device  
Certain aspects of a method for reducing noise disturbing at least one signal in an electronic device may comprise shielding a first layer doped with a first dopant from a signaling layer employing...
7348638 Rotational shear stress for charge carrier mobility modification  
A semiconductor structure and its method of fabrication utilize a semiconductor substrate having an active region mesa surrounded by an isolation trench. A first isolation region having a first...
7348254 Method of fabricating fin field-effect transistors  
A method of fabricating a fin field-effect transistor that may enable a reduction in the number of process steps, by forming the fin structure by etching away a predetermined thickness of an...
7338870 Methods of fabricating semiconductor devices  
Methods of recovering damage on a semiconductor device by performing a hydrogen annealing process are disclosed. An example disclosed method includes forming an STI structure on a semiconductor...
7332387 MOSFET structure and method of fabricating the same  
A MOSFET structure and a method of forming it are described. The thickness of a portion of the gate dielectric layer of the MOSFET structure adjacent to the drain region is increased to form a...
7326608 Fin field effect transistor and method of manufacturing the same  
In a fin field effect transistor (FET), an active pattern protrudes in a vertical direction from a substrate and extends across the substrate in a first horizontal direction. A first silicon...
7323392 High performance transistor with a highly stressed channel  
A MOS transistor having a highly stressed channel region and a method for forming the same are provided. The method includes forming a first semiconductor plate over a semiconductor substrate,...
7306998 Formation of abrupt junctions in devices by using silicide growth dopant snowplow effect  
A method of forming an abrupt junction device with a semiconductor substrate is provided. A gate dielectric is formed on a semiconductor substrate, and a gate is formed on the gate dielectric. A...
7303964 Self-aligned STI SONOS  
Methods 300 and 350 are disclosed for fabricating shallow isolation trenches and structures in multi-bit SONOS flash memory devices. One method aspect 300 comprises forming 310 a...
7303963 Method for manufacturing cell transistor  
Disclosed herein is a method of manufacturing a cell transistor which can achieve an improvement in a short-channel effect of a cell transistor as well as an improvement in a refresh characteristic...
7297608 Method for controlling properties of conformal silica nanolaminates formed by rapid vapor deposition  
A method employing atomic layer deposition rapid vapor deposition (RVD) conformally deposits a dielectric material on small features of a substrate surface. The resulting dielectric film is then...
7291534 Method of manufacturing semiconductor device  
A method of manufacturing a semiconductor device has the steps of: preparing a semiconductor substrate having a structure in which first and second active regions are isolated by a field oxide;...
7282413 Semiconductor device including nonvolatile memory and method for fabricating the same  
A semiconductor device including a nonvolatile memory and the fabrication method of the same is described formed on a semiconductor substrate. According to the semiconductor device, a second gate...
7271069 Semiconductor device having a plurality of different layers and method therefor  
Mechanical stress control may be achieved using materials having selected elastic moduli. These materials may be selectively formed by implantation, may be provided as a plurality of buried layers...
7271068 Method of manufacture of semiconductor device  
A power MISFET, which has a desired gate breakdown voltage, can be manufactured will controlling an increase in parasitic capacitance. After depositing a polycrystalline silicon film on a substrate...
7259071 Semiconductor device with dual gate oxides  
A method for making a semiconductor device having a first active region and a second active region includes providing first and second isolation structures defining the first active region on a...
7250335 Methods of fabricating integrated circuit devices including self-aligned contacts with increased alignment margin  
An integrated circuit device, e.g., a memory device, includes a substrate, and a plurality of rows of active regions in the substrate, the active regions arranged in a staggered pattern such that...
7244641 Process sequence and mask layout to reduce junction leakage for a dual gate MOSFET device  
A method of forming a thin gate insulator layer comprises forming an active region surrounded by STI regions; forming a first insulator layer on the active device region; forming a patterned...
7244632 Complementary metal oxide semiconductor image sensor and method for fabricating the same  
A complementary metal oxide semiconductor image sensor and a method for fabricating the same are disclosed, wherein a width of a depletion area of a photodiode is varied by variably applying a back...
7233046 Semiconductor device and fabrication method thereof  
A semiconductor device and fabrication method thereof restrains an amplified current between input voltage Vin and ground voltage Vss, and first and second n-wells are biased into internal voltage...
Matches 1 - 50 out of 307 1 2 3 4 5 6 7 >