Patents in Class 438/279

Matches 1 - 50 out of 354

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Match	Document	Document Title
1	7625798	Method of producing semiconductor memory A semiconductor memory includes a plurality of memory cell transistors each having a laminated gate. A method of producing the semiconductor memory includes the steps of: forming a plurality of...
2	7622373	Memory device having implanted oxide to block electron drift, and method of manufacturing the same A memory device includes a substrate, a first gate stack overlying the substrate, a second gate stack overlying the substrate and spaced apart from the first gate stack, an oxide region formed at a...
3	7615445	Methods of reducing coupling between floating gates in nonvolatile memory A nonvolatile memory array includes floating gates that have an inverted-T shape in cross section along a plane that is perpendicular to the direction along which floating cells are connected...
4	7608512	Integrated circuit structure with improved LDMOS design A semiconductor integrated circuit including an LDMOS device structure comprises a semiconductor layer with a pair of spaced-apart field effect gate structures over an upper surface of the...
5	7608506	Body-contacted semiconductor structures and methods of fabricating such body-contacted semiconductor structures A semiconductor structure for a dynamic random access memory (DRAM) cell array that includes a plurality of vertical memory cells built on a semiconductor-on-insulator (SOI) wafer and a body...
6	7589373	Semiconductor device The present invention provides a semiconductor device, which includes a substrate and a sensing memory device. The substrate includes a metal-oxide-semiconductor transistor having a gate. The...
7	7585733	Method of manufacturing semiconductor device having multiple gate insulation films A method of manufacturing a semiconductor device includes the steps of: preparing a semiconductor substrate having first and second element forming regions, the first and second element forming...
8	7585720	Dual stress liner device and method A dual stress liner manufacturing method and device is described. Overlapping stress liner layers of opposite effect (e.g., tensile versus compression) may be deposited over portions of the device,...
9	7563654	Method of manufacturing semiconductor device for formation of pin transistor A method for manufacturing a semiconductor device is disclosed. The method includes the steps of defining a trench into a field region of a semiconductor substrate having an active region and the...
10	7560770	MOSFET device suppressing electrical coupling between adjoining recess gates and method for manufacturing the same A MOSFET device comprises a semiconductor substrate having a gate area, a storage node contact area and a bit line contact area. A first groove is defined at a first depth in the gate area and a...
11	7557024	Single poly CMOS imager More complete charge transfer is achieved in a CMOS or CCD imager by reducing the spacing in the gaps between gates in each pixel cell, and/or by providing a lightly doped region between adjacent...
12	7550350	Methods of forming flash memory device The present disclosure relates to methods of forming a flash memory device. A plurality of cells, a plurality of select transistors, and a transistor are formed over a semiconductor substrate...
13	7537998	Method for forming salicide in semiconductor device Forming salicide in a semiconductor device includes the steps of: forming a first and a second gate oxide film and in a non-salicide region and a salicide region, the first gate oxide film being...
14	7534682	Semiconductor memory device with a stacked gate including a floating gate and a control gate and method of manufacturing the same A semiconductor memory device includes first and second MOS transistors. The first MOS transistor is formed on a region enclosed by a first element isolating region and includes a first gate...
15	7534665	Method of manufacturing semiconductor device In a semiconductor device manufacturing method of the present invention, a polysilicon film and a silicon nitride film are deposited on an upper surface of an epitaxial layer. Patterning is...
16	7531404	Semiconductor device having a metal gate electrode formed on an annealed high-k gate dielectric layer A method of forming a transistor gate stack having an annealed gate dielectric layer begins by providing a substrate that includes a first and second spacer separated by a trench. A conformal...
17	7528444	Efficient transistor structure An integrated circuit comprises a first drain region having a generally rectangular shape. First, second, third and fourth source regions have a generally rectangular shape and that are arranged...
18	7514325	Fin-FET having GAA structure and methods of fabricating the same Example embodiments of the present invention relate to a semiconductor device and methods of fabricating the same. Other example embodiments of the present invention relate to a fin-field effect...
19	7514318	Method for fabricating non-volatile memory cells A method for fabricating non-volatile memory cells is provided. The method includes providing a substrate, forming a first dopant region in the substrate, forming a second dopant region in the...
20	7498253	Local interconnection method and structure for use in semiconductor device A local interconnection wiring structure method for forming the same reduces the likelihood of a short between a local interconnection layer of gate electrodes and an active region by forming a...
21	7491605	Zero cost non-volatile memory cell with write and erase features A method for making a semiconductor structure of a memory device includes forming a capacitor having a gate dielectric between a gate conductor and a dopant region of a first conductivity type...
22	7462903	Methods for fabricating semiconductor devices and contacts to semiconductor devices Methods for fabricating semiconductor structures and contacts to semiconductor structures are provided. A method comprises providing a substrate and forming a gate stack on the substrate. The gate...
23	7456439	Vertical thyristor-based memory with trench isolation and its method of fabrication A semiconductor device may comprise a plurality of memory cells. A memory cell may comprise a thyristor, at least a portion of which is formed in a pillar of semiconductor material. The pillar may...
24	7445993	Method of fabricating non-volatile memory A method of fabricating non-volatile memory is provided. A plurality of first memory cells is formed on the memory cell region of a substrate. Each first memory cell comprises a first composite...
25	7429524	Transistor design self-aligned to contact The present invention provides a method of manufacturing a transistor device, a transistor device, and a method for manufacturing an integrated circuit. In one aspect, the method of manufacturing a...
26	7422949	High voltage transistor and method of manufacturing the same The present invention relates to a high voltage transistor and method of manufacturing the same. The high voltage transistor includes: a channel region which is formed in a semiconductor substrate;...
27	7422945	Cell based integrated circuit and unit cell architecture therefor In a unit cell, a first conductive type active region and a second conductive type active region are provided. Those two active regions extend in a first direction. Each of the active regions have...
28	7417291	Method for manufacturing semiconductor integrated circuit device Disclosed is a technique for reducing the leak current by reducing contamination of metal composing a polymetal gate of a MISFET. Of a polycrystalline silicon film, a WN film, a W film, and a cap...
29	7410851	Low voltage superjunction MOSFET A power semiconductor switching device such as a power MOSFET that includes breakdown voltage enhancement regions formed by self-alignment.
30	7405110	Methods of forming implant regions relative to transistor gates The invention includes methods of forming implant regions between and/or under transistor gates. In one aspect, a pair of transistor gates is partially formed, and a layer of conductive material is...
31	7399671	Disposable pillars for contact formation Sacrificial plugs for forming contacts in integrated circuits, as well as methods of forming connections in integrated circuit arrays are disclosed. Various pattern transfer and etching steps can...
32	7393737	Semiconductor device and a method of manufacturing the same A semiconductor device which, in spite of the existence of a dummy active region, eliminates the need for a larger chip area and improves the surface flatness of the semiconductor substrate. In the...
33	7364973	Method of manufacturing NOR-type mask ROM device and semiconductor device including the same A method of manufacturing a NOR-type mask ROM device includes forming a first gate electrode for an OFF cell and a second gate electrode for an ON cell on a semiconductor substrate of a first...
34	7364959	Method for manufacturing a MOS transistor A method for manufacturing a MOS transistor integrated into a chip of semi-conductive material comprising a first and a second active region which extend from the inside of the chip to a surface of...
35	7348245	Semiconductor device and a method of manufacturing the same Manufacturing method of a semiconductor device for forming a rewritable nonvolatile memory cell including a first field effect transistor for memory, a circuit including a second field effect...
36	7348241	Cell structure of EPROM device and method for fabricating the same Provided are a cell structure of an EPROM device and a method for fabricating the same. The cell structure includes a gate stack, which includes a first floating gate, an insulating pattern...
37	7348221	Process for manufacturing a semiconductor device, a semiconductor device and a high-frequency circuit A process for manufacturing a semiconductor device, provides that a silicide layer is formed, an amorphous semiconductor layer is applied both to the silicide layer and to an open monocrystalline...
38	7338868	Method for forming gate oxide layer in semiconductor device A method for forming gate oxide layers of a semiconductor device including defining a first, a second, and a third device region by forming device isolation regions on a semiconductor substrate....
39	7338867	Semiconductor device having contact pads and method for manufacturing the same Semiconductor devices have gate structures on a semiconductor substrate with first spacers on sidewalls of the respective gate structures. First contact pads are positioned between the gate...
40	7335558	Method of manufacturing NAND flash memory device A method of manufacturing a NAND flash memory device, including the steps of providing a semiconductor substrate in which a cell region and a select transistor region are defined; simultaneously...
41	7332420	Method for manufacturing semiconductor device A method for manufacturing a semiconductor device having a P-type MOSFET and an N-type MOSFET, the method comprising the steps of: forming a gate insulating film, a non-doped polysilicon film, a...
42	7323383	Method for fabricating an NROM memory cell arrangement In the method, trenches ( 9 ) are etched and, in between, bit lines ( 8 ) are in each case arranged on doped source drain/regions ( 3 ). Dopant is introduced into the bottoms of the trenches ( 9 )...
43	7312124	Method of manufacturing a semiconductor device A method of manufacturing a semiconductor device includes forming first and second active regions and a field region in a surface of a substrate; forming a first gate insulating film in the first...
44	7291882	Programmable and erasable digital switch device and fabrication method and operating method thereof A programmable and erasable digital switch device is provided. An N-type memory transistor and a P-type memory transistor are formed over a substrate. The N-type memory transistor includes a first...
45	7288449	Method of manufacturing an ESD protection device with the same mask for both LDD and ESD implantation A method of manufacturing a semiconductor device having a first and second transistor of an ESD protection and internal circuit respectively. The method includes the steps of providing a substrate,...
46	7285467	Methods of fabricating static random access memories (SRAMS) having vertical transistors Unit cells of a static random access memory (SRAM) are provided including an integrated circuit substrate and first and second active regions. The first active region is provided on the integrated...
47	7282401	Method and apparatus for a self-aligned recessed access device (RAD) transistor gate A method used in fabrication of a recessed access device transistor gate has increased tolerance for mask misalignment. One embodiment of the invention comprises forming a vertical spacing layer...
48	7279419	Formation of self-aligned contact plugs Methods of forming a contact structure for semiconductor assemblies are described. One method provides process steps to create an inner dielectric isolation layer after the contact region is...
49	7271441	Semiconductor device and method for fabricating the same The semiconductor device includes a first semiconductor region of a first conductivity type partially extending to a top face of a semiconductor substrate; a second semiconductor region of a second...
50	7247540	Methods of forming field effect transistors having recessed channel regions Methods of forming field effect transistors include the steps of forming a first electrically insulating layer on a semiconductor substrate having a plurality of trench isolation regions therein...

Matches 1 - 50 out of 354

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