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7612619 |
Phase detector device and method thereof
A device and method for phase detection are disclosed. The device includes a phase differential module that provides a phase difference signal based on the phase difference between a data signal...
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7608522 |
Method for fabricating a hybrid orientation substrate
A method for fabricating a hybrid orientation substrate includes steps of providing a direct silicon bonding (DSB) wafer having a first substrate with (100) crystalline orientation and a second...
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7608512 |
Integrated circuit structure with improved LDMOS design
A semiconductor integrated circuit including an LDMOS device structure comprises a semiconductor layer with a pair of spaced-apart field effect gate structures over an upper surface of the...
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7608500 |
Method of forming semiconductor device includeing forming control gate layer over each region and removing a portion of the tunnel insulating layer on the low voltage region
Provided is a method of forming a semiconductor device. A tunnel insulating layer is formed on a substrate having a cell region and a low voltage region. First and second charge storage gate...
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7605038 |
Semiconductor device and manufacturing method thereof
A high voltage semiconductor deice and a manufacturing method thereof are provided. The high voltage semiconductor device comprises: second conductive type drift regions disposed spaced from each...
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7601596 |
Semiconductor device with trench transistors and method for manufacturing such a device
According to one embodiment, a method for manufacturing a semiconductor device includes forming trenches in a first side of a semiconductor material and forming a thick oxide layer on the trenches...
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7601577 |
Work function control of metals
Forming metal gate transistors that have different work functions is disclosed. In one example, a first metal, which is a ‘mid gap’ metal, is manipulated in first and second regions by second...
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7598139 |
Single chip data processing device with embedded nonvolatile memory and method thereof
A device is described comprising a substrate of a first conductivity type having a first dopant concentration, a first well formed in the substrate, a second well of the first conductivity type...
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7595262 |
Manufacturing method for an integrated semiconductor structure
A manufacturing method for an integrated semiconductor structure and a corresponding semiconductor structure is disclosed. The method includes forming a peripheral circuitry in a peripheral device...
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7589005 |
Methods of forming semiconductor structures and systems for forming semiconductor structures
A method and system for forming a semiconductor structure includes forming at least one material layer over a substrate. At least one portion of the material layer is etched with at least one first...
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7588986 |
Method of manufacturing a semiconductor device
According to an exemplary embodiment of the present invention, a method of manufacturing a semiconductor device having active regions including a SONOS device region, a high voltage device region,...
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7588978 |
Method for forming semiconductor device
Embodiments relate to a method for forming a semiconductor device in which a first oxide layer may be deposited over a surface of a semiconductor substrate including high-voltage (HV) and...
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7585786 |
Methods of forming spin-on-glass insulating layers in semiconductor devices and associated semiconductor device
Methods of forming an insulating layer in a semiconductor device are provided in which a metal oxide layer is formed on a semiconductor structure that includes a plurality of gap regions thereon. A...
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7585736 |
Method of manufacturing semiconductor device with regard to film thickness of gate oxide film
A method of manufacturing a semiconductor device includes steps (a) to (d). The step (a) is a step of forming a first insulating film and a nitride film on a semiconductor substrate in this order....
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7575975 |
Method for forming a planar and vertical semiconductor structure having a strained semiconductor layer
Forming a semiconductor structure includes providing a substrate having a strained semiconductor layer overlying an insulating layer, providing a first device region for forming a first plurality...
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7572690 |
Method of fabricating CMOS thin film transistor (TFT) and CMOS TFT fabricated using the same
A method of fabricating a CMOS thin film transistor (TFT) and a CMOS TFT fabricated using the method involve provision of a substrate having a first region and a second region. A first...
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7569447 |
Method of forming transistor structure having stressed regions of opposite types
A method of fabrication is provided in which a field effect transistor (FET) is formed having a channel region and source and drain regions adjacent to the channel region. A first stressed region...
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7563680 |
Substrate having silicon germanium material and stressed silicon nitride layer
A method of fabricating a semiconductor device includes providing a region having doped silicon region on a substrate, and forming a silicon germanium material adjacent to the region on the...
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7560772 |
Semiconductor integrated circuit device and manufacturing method thereof
After silicon oxide film ( 9 ) is formed on the surface of a semiconductor substrate ( 1 ), the silicon oxide film ( 9 ) in a region in which a gate insulation film having a small effective...
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7560388 |
Self-aligned pitch reduction
A method providing features in a dielectric layer is provided. A sacrificial layer is formed over the dielectric layer. A set of sacrificial layer features is etched into the sacrificial layer. A...
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7560319 |
Method for fabricating a semiconductor device
A method of fabricating a semiconductor device includes forming an insulation layer structure on a single-crystalline silicon substrate, forming a first insulation layer structure pattern...
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7560312 |
Void formation for semiconductor junction capacitance reduction
Semiconductor structures having a decreased semiconductor junction capacitance of a semiconductor junction within an active semiconductor layer may be fabricated using an ion implantation and...
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7557004 |
Method for fabricating semiconductor device
The method for fabricating the semiconductor device includes the steps of: forming an insulating film 20 , a conductive film 22 and an insulating film 24 over a semiconductor substrate 10 ...
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7547592 |
PMOS depletable drain extension made from NMOS dual depletable drain extensions
In accordance with an embodiment of the invention, there is an integrated circuit device having a complementary integrated circuit structure comprising a first MOS device. The first MOS device...
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7544567 |
Method of manufacturing a flash memory device
In a method of manufacturing an SONOS type flash memory device, a first oxide layer and a buffer poly layer are formed over a surface of a semiconductor except for a memory cell region of a cell...
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7544555 |
Method of manufacturing semiconductor device
A dummy oxide film having a film thickness that is the same as that of a gate oxide film of a high voltage transistor is formed on a gate electrode of a transistor, and the dummy oxide film and the...
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7538000 |
Method of forming double gate transistors having varying gate dielectric thicknesses
Double gate transistors ( 12, 13 ) having different bottom gate dielectric thicknesses are formed on a first wafer ( 101 ) by forming a first gate dielectric layer ( 107 ); removing part of the...
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7537997 |
Ensuring migratability of circuits by masking portions of the circuits while improving performance of other portions of the circuits
Mechanisms for ensuring the migratability of circuits into future technologies while minimizing fabrication costs and maintaining or improving power efficiency are provided. A mask layer is...
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7534684 |
Methods of forming non-volatile memory devices having a multi-layered charge storage layer
A non-volatile memory device includes a substrate having a first region and a second region. A first gate electrode is disposed on the first region. A multi-layered charge storage layer is...
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7534682 |
Semiconductor memory device with a stacked gate including a floating gate and a control gate and method of manufacturing the same
A semiconductor memory device includes first and second MOS transistors. The first MOS transistor is formed on a region enclosed by a first element isolating region and includes a first gate...
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7534677 |
Method of fabricating a dual gate oxide
A method of fabricating a dual gate oxide of a semiconductor device includes forming a first gate insulation layer over an entire surface of a substrate, removing a portion of the first gate...
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7531404 |
Semiconductor device having a metal gate electrode formed on an annealed high-k gate dielectric layer
A method of forming a transistor gate stack having an annealed gate dielectric layer begins by providing a substrate that includes a first and second spacer separated by a trench. A conformal...
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7528041 |
Method of manufacturing semiconductor device that utilizes oxidation prevention film to form thick and thin gate insulator portions
A method of manufacturing a semiconductor device, including including preparing a semiconductor substrate having first to fourth active regions and field oxides, the third and fourth active regions...
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7528026 |
Method for reducing silicide defects by removing contaminants prior to drain/source activation
By consuming a surface portion of polysilicon material or silicon material after implantation and prior to activation of dopants, contaminants may be efficiently removed, thereby significantly...
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7517761 |
Method for manufacturing semiconductor device
The invention is directed to a method for manufacturing a field plate of a high voltage device. The field plate is located on a drift region of a substrate, wherein an isolation structure is...
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7517760 |
Semiconductor device manufacturing method including three gate insulating films
After protective insulating films are formed on first to third active regions, the protective insulating films formed on the first and third active regions are removed. Subsequently, an insulating...
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7514318 |
Method for fabricating non-volatile memory cells
A method for fabricating non-volatile memory cells is provided. The method includes providing a substrate, forming a first dopant region in the substrate, forming a second dopant region in the...
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7514304 |
MOSFET having channel in bulk semiconductor and source/drain on insulator, and method of fabrication
A MOSFET device ( 100 ) in a mono-crystalline semiconductor material ( 101 ) of a first conductivity type, which comprises a source and a drain of the opposite conductivity type, each having...
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7512017 |
Integration of planar and tri-gate devices on the same substrate
An apparatus including a first diffusion formed on a substrate, the first diffusion including a pair of channels, each of which separates a source from a drain; a second diffusion formed on the...
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7510943 |
Semiconductor devices and methods of manufacture thereof
A first gate dielectric of a first transistor is disposed over a workpiece in a first region, and a second gate dielectric of a second transistor is disposed over the workpiece in a second region....
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7504308 |
Method of dual bird's beak LOCOS isolation
A method of dual bird's beak LOCOS may reduce a design rule for a more cost-effective logic device formation. The method may also form a LOCOS layer having a smooth bird's beak to fabricate a...
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7504278 |
Image sensor and method for manufacturing the same
An image sensor is disclosed where individual photo diodes of the respective unit cells separated by an element isolating layer are physically integrated into a single large scale pixel formed...
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7494879 |
Method for forming a gate insulating layer of a semiconductor device
Embodiments relate to a method for forming a gate insulating layer, which may include forming a device isolation layer being divided into a device active region and a device isolation region,...
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7494878 |
Metal-oxide-semiconductor transistor and method of forming the same
A method of manufacturing a MOS transistor device. First, a semiconductor substrate having a gate structure is prepared. The gate structure has two sidewalls and a liner on the sidewalls....
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7492014 |
Semiconductor device
A semiconductor device wherein the same metal gate material is used for both an n-channel CMOS transistor and a p-channel CMOS transistor and a manufacturing method therefor are disclosed. The...
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7491605 |
Zero cost non-volatile memory cell with write and erase features
A method for making a semiconductor structure of a memory device includes forming a capacitor having a gate dielectric between a gate conductor and a dopant region of a first conductivity type...
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7488658 |
Stressed semiconductor device structures having granular semiconductor material
A method of fabricating a semiconductor device structure, includes: providing a substrate, providing an electrode on the substrate, forming a recess in the electrode, the recess having an opening,...
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7488652 |
Manufacturing method of gate oxidation films
After forming a field insulating film 12 on a substrate, sacrificing or gate oxidation films are formed as oxidation films 14 a and 14 b . An ion implantation layer 18 is formed by one or...
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7485521 |
Self-aligned dual stressed layers for NFET and PFET
Methods are disclosed for forming self-aligned dual stressed layers for enhancing the performance of NFETs and PFETs. In one embodiment, a sacrificial layer is used to remove a previously deposited...
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7482233 |
Embedded non-volatile memory cell with charge-trapping sidewall spacers
An IC includes both “volatile” CMOS transistors (FETs) and embedded non-volatile memory (NVM) cells, both including polysilicon gate structures, sidewall oxide layers, sidewall spacer...
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